From patchwork Thu Sep 1 01:29:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 602017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0D82C0502C for ; Thu, 1 Sep 2022 01:30:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229555AbiIABaV (ORCPT ); Wed, 31 Aug 2022 21:30:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45344 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232632AbiIAB35 (ORCPT ); Wed, 31 Aug 2022 21:29:57 -0400 Received: from mail-m11873.qiye.163.com (mail-m11873.qiye.163.com [115.236.118.73]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B0FE55BC for ; Wed, 31 Aug 2022 18:29:49 -0700 (PDT) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m11873.qiye.163.com (Hmail) with ESMTPA id 2587E9004C1; Thu, 1 Sep 2022 09:29:47 +0800 (CST) From: Jianqun Xu To: linus.walleij@linaro.org, heiko@sntech.de Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, Jianqun Xu Subject: [PATCH v1 1/3] gpio: rockchip: make gpio work without cru module Date: Thu, 1 Sep 2022 09:29:41 +0800 Message-Id: <20220901012944.2634398-3-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901012944.2634398-1-jay.xu@rock-chips.com> References: <20220901012944.2634398-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFJSktLSjdXWS1ZQUlXWQ8JGhUIEh9ZQVkaTBkZVkxOTEtMS0sZS0MZH1UTARMWGhIXJB QOD1lXWRgSC1lBWU5DVUlJVUxVSkpPWVdZFhoPEhUdFFlBWU9LSFVKSktISkxVSktLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MTI6PDo5KD02Qk0LMQ4VFipC LwxPCTRVSlVKTU1KQkJOTENMTEhNVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUlCQkg3Bg++ X-HM-Tid: 0a82f6ab24322eafkusn2587e9004c1 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org In some case the system may has no builtin cru module, the gpio driver will fail to get periph clock and debounce clock. On rockchip SoCs, the pclk and dbg clk are default to be enabled and ungated, the gpio possible to work without cru module. This patch makes gpio work fine without cru module. Signed-off-by: Jianqun Xu --- drivers/gpio/gpio-rockchip.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index a4c4e4584f5b..1da0324445cc 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -195,6 +195,9 @@ static int rockchip_gpio_set_debounce(struct gpio_chip *gc, unsigned int cur_div_reg; u64 div; + if (!bank->db_clk) + return -ENOENT; + if (bank->gpio_type == GPIO_TYPE_V2 && !IS_ERR(bank->db_clk)) { div_debounce_support = true; freq = clk_get_rate(bank->db_clk); @@ -654,8 +657,10 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank) return -EINVAL; bank->clk = of_clk_get(bank->of_node, 0); - if (IS_ERR(bank->clk)) - return PTR_ERR(bank->clk); + if (IS_ERR(bank->clk)) { + bank->clk = NULL; + dev_warn(bank->dev, "works without clk pm\n"); + } clk_prepare_enable(bank->clk); id = readl(bank->reg_base + gpio_regs_v2.version_id); @@ -666,9 +671,8 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank) bank->gpio_type = GPIO_TYPE_V2; bank->db_clk = of_clk_get(bank->of_node, 1); if (IS_ERR(bank->db_clk)) { - dev_err(bank->dev, "cannot find debounce clk\n"); - clk_disable_unprepare(bank->clk); - return -EINVAL; + bank->db_clk = NULL; + dev_warn(bank->dev, "works without debounce clk pm\n"); } } else { bank->gpio_regs = &gpio_regs_v1; From patchwork Thu Sep 1 01:29:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 602018 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C07B6ECAAD5 for ; Thu, 1 Sep 2022 01:30:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230045AbiIABaV (ORCPT ); Wed, 31 Aug 2022 21:30:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232678AbiIAB3z (ORCPT ); Wed, 31 Aug 2022 21:29:55 -0400 Received: from mail-m11873.qiye.163.com (mail-m11873.qiye.163.com [115.236.118.73]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B72D614D for ; Wed, 31 Aug 2022 18:29:50 -0700 (PDT) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m11873.qiye.163.com (Hmail) with ESMTPA id 598899004C8; Thu, 1 Sep 2022 09:29:48 +0800 (CST) From: Jianqun Xu To: linus.walleij@linaro.org, heiko@sntech.de Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, Jianqun Xu Subject: [PATCH 2/3] gpio: rockchip: get pinctrl node from 'gpio-ranges' property Date: Thu, 1 Sep 2022 09:29:43 +0800 Message-Id: <20220901012944.2634398-5-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901012944.2634398-1-jay.xu@rock-chips.com> References: <20220901012944.2634398-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFJSktLSjdXWS1ZQUlXWQ8JGhUIEh9ZQVkaSRhIVh1KGU0aGB1OQxpOH1UTARMWGhIXJB QOD1lXWRgSC1lBWU5DVUlJVUxVSkpPWVdZFhoPEhUdFFlBWU9LSFVKSktITkhVSktLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NC46NRw5TD0xCU0WSA4VFho* CkMwFA5VSlVKTU1KQkJOTENDQ01NVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUlCSkM3Bg++ X-HM-Tid: 0a82f6ab28f32eafkusn598899004c8 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The dt nodes for rockchip soc designes as pinctrl: pinctrl { gpio { }; }; Currently, we get the pinctrl dt node from parent of gpio, this patch try to get pinctrl dt node from 'gpio-ranges' property. After this patch, the dt nodes possible to be gpio { gpio-ranges = <&pinctrl xxx>; }; pinctrl: pinctrl { }; then the gpio driver could register as platform device itself, but not populate from pinctrl driver. Signed-off-by: Jianqun Xu --- drivers/gpio/gpio-rockchip.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index 1da0324445cc..46c54dff92db 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -690,6 +690,9 @@ rockchip_gpio_find_bank(struct pinctrl_dev *pctldev, int id) int i, found = 0; info = pinctrl_dev_get_drvdata(pctldev); + if (!info) + return NULL; + bank = info->ctrl->pin_banks; for (i = 0; i < info->ctrl->nr_banks; i++, bank++) { if (bank->bank_num == id) { @@ -705,15 +708,16 @@ static int rockchip_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; - struct device_node *pctlnp = of_get_parent(np); + struct device_node *pctlnp = NULL; struct pinctrl_dev *pctldev = NULL; struct rockchip_pin_bank *bank = NULL; struct rockchip_pin_output_deferred *cfg; static int gpio; int id, ret; - if (!np || !pctlnp) - return -ENODEV; + pctlnp = of_parse_phandle(np, "gpio-ranges", 0); + if (!pctlnp) + pctlnp = of_get_parent(np); pctldev = of_pinctrl_get(pctlnp); if (!pctldev) From patchwork Thu Sep 1 01:29:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 602563 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7F78ECAAD1 for ; Thu, 1 Sep 2022 01:30:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229711AbiIABaW (ORCPT ); Wed, 31 Aug 2022 21:30:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231754AbiIABaB (ORCPT ); Wed, 31 Aug 2022 21:30:01 -0400 Received: from mail-m11873.qiye.163.com (mail-m11873.qiye.163.com [115.236.118.73]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B65722B26 for ; Wed, 31 Aug 2022 18:29:56 -0700 (PDT) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m11873.qiye.163.com (Hmail) with ESMTPA id E17D79004C5; Thu, 1 Sep 2022 09:29:48 +0800 (CST) From: Jianqun Xu To: linus.walleij@linaro.org, heiko@sntech.de Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, Jianqun Xu Subject: [PATCH 3/3] dt-bindings: gpio: rockchip,gpio add optional 'gpio-ranges' Date: Thu, 1 Sep 2022 09:29:44 +0800 Message-Id: <20220901012944.2634398-6-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901012944.2634398-1-jay.xu@rock-chips.com> References: <20220901012944.2634398-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFJSktLSjdXWS1ZQUlXWQ8JGhUIEh9ZQVlDQxlDVk5KTU9JQxgdTU5DT1UTARMWGhIXJB QOD1lXWRgSC1lBWU5DVUlJVUxVSkpPWVdZFhoPEhUdFFlBWU9LSFVKSktISkxVSktLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6OSo6Qxw6Vj04N00xSAhIFi4v DjoKCQtVSlVKTU1KQkJOTENCTktPVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUlIS0g3Bg++ X-HM-Tid: 0a82f6ab2b1d2eafkusne17d79004c5 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add a optional property 'gpio-ranges', such as gpio-ranges = <&pinctrl 0 0 32>; When the gpio nodes are under pinctrl, the property 'gpio-ranges' is a optional property, but when they are under root node, the property 'gpio-ranges' is a required property. Signed-off-by: Jianqun Xu --- .../devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml index d4e42c2b995b..7a075fcea75f 100644 --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml @@ -49,7 +49,12 @@ required: - interrupt-controller - "#interrupt-cells" -additionalProperties: false +additionalProperties: true + gpio-ranges: + maxItems: 1 + description: | + The property is a optional if gpio node under pinctrl node; + but it is a required property if the gpio is under root node. examples: - |