From patchwork Thu Sep 1 05:48:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 601787 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp207927mae; Wed, 31 Aug 2022 22:51:42 -0700 (PDT) X-Google-Smtp-Source: AA6agR64Lh8VJGLb3Lghqif6Nhr/jxwLwhFzjfPH4kJTIbdU7/2v/41IfmaYJQB5xFZzPskVD+Bp X-Received: by 2002:ac8:5c8e:0:b0:343:5983:a246 with SMTP id r14-20020ac85c8e000000b003435983a246mr22420529qta.153.1662011502749; Wed, 31 Aug 2022 22:51:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662011502; cv=none; d=google.com; s=arc-20160816; b=i7aflapxPsTo+edeiAbCJnJPilDVdy4dW/CYx0nk4GEjqteI9sQ1PkTHKZzuUe/Z5x Gqc5qw/7Jux1WxFxt9zcawgDI3HaoFmsd7gH4F0u21SdlfN/l0Ls6blVMIsvfFNjJ7mH nBYELkXcb5NhRqLHSKKW+EX8eNhW9G15JZ56dFcc3f7k48VSopf8kEUBtuXE/Q/e5ywY GjOQyXTVIZ/zwVoTFrvuKIkaSCJSm96hecfGoYG/OvJyixivAd17nyHG6WX+5P04+cqK YV1gO0RPLZLMGwWSShIt3pyLDcSX7RNHL8cHI7z9HzUm4b8MSlwfmNNltN493mUfACa1 51zA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=U/h2PuXjGmHqeTevSKtXVEUhLbvpxvYx+D8DjCnF93A=; b=riZD03WwgCaTs+ddaLQ8xexE47Gl+SD86sVmorLfb4dv2zdYfX1IV0FIG0KyaEii7H LUPXpcV9pUYpVztPcv7IgS1WiFHKkZDW3MXBfpXvrOQGKE7GULgGa0ZMHr/qGACr/nEP vdmDODCeop5erObFndZCDQwu5RKW1a503M6eYrhMxCm8tOwzIQK6iTkvqf8ZPyfhZVHe 6SwuujF9tbs90+7mGUscgekZAvVtsAVXMOYSK2fVNin1PLx+EgxeX8n8mHyvahUpoNFk mfX7A9Cmtqc1GNIjaD+P6LEmlaMVi97eT8zp8ITPqOhBJ7DvF0n3KbA57XLepfKqmq+m o0tQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aZ2eXVYn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id e23-20020ac80117000000b003429b184f09si9926818qtg.774.2022.08.31.22.51.42 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 31 Aug 2022 22:51:42 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aZ2eXVYn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:33808 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oTd78-00074m-A1 for patch@linaro.org; Thu, 01 Sep 2022 01:51:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36218) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oTd4P-00073r-Eu for qemu-devel@nongnu.org; Thu, 01 Sep 2022 01:48:54 -0400 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]:39426) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oTd4K-0002Sn-RM for qemu-devel@nongnu.org; Thu, 01 Sep 2022 01:48:51 -0400 Received: by mail-wm1-x32b.google.com with SMTP id i188-20020a1c3bc5000000b003a7b6ae4eb2so706508wma.4 for ; Wed, 31 Aug 2022 22:48:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=U/h2PuXjGmHqeTevSKtXVEUhLbvpxvYx+D8DjCnF93A=; b=aZ2eXVYnP0GT4VRMHKspmAvo2o7RKWyg0XCUPZHTag0jRpDd94OUohCVq7rx4ey/dp T/qabEpYT8fT1MpZufzRuCeKiaq9vHf5dgz6FStMbr3MTTMFcGmOlfG2mUTYz1MY7gRV DohQL5CIrLXc6Sa6ytJeEyKQ250B8e4gtGK2IPfxM7Y4oika2HM3PUH1zioBOedjp8sp ZZUkH/nd2lrzxATzgEFlQOCsXVHN2Zwe8xs7P77nKFBPlCMg9v3/DOZFzuimCDO4JHjv 7g/3BV4itrHhH9tyPP/np48k1GfpU1LBfyga0QXi7pAd/KdqO9jFHSaF/IgqN9Diw3sJ uC1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=U/h2PuXjGmHqeTevSKtXVEUhLbvpxvYx+D8DjCnF93A=; b=s+kEie0bKspGJW6KXN0sdkEHcZm+tnsq8qG50T+ZSMYPunQlOMP8Xhd3a62FqIx7xr tKQz/qQeyiFiX1saPfPUwNkk077EYaAPZ36m/2W1vwVd8S/HdcVN2S9zAYIeux2Tb6JU stDYWlypDikMw9abipfbtHLZcv6qSMwSGIPxnV3loXi0GzGrprmam4AZeFF6jaBTCbL/ sv12M/yV7kLw+wjLDqtXJNmXLnyxv5kJdyDwaSwfkKstFsdhMtZyz9s30JlgB/nuSU3w ADPEWE4ieIRso+z3iP7uLaL64+qIl6OWHu8iNLCUC8JpFTW/SKaOniq7W5yTQB8FyTSR /ZAg== X-Gm-Message-State: ACgBeo3gRbm6crJsWXCgI2aFnzcsuo82zBOvGKnV9+vbGuUqNZcHCd69 hrWkVzS29Fhxyan3doGUYG6Gm1Zp1asNhr5KU98= X-Received: by 2002:a05:600c:35d4:b0:3a6:18ba:1585 with SMTP id r20-20020a05600c35d400b003a618ba1585mr4026091wmq.48.1662011327263; Wed, 31 Aug 2022 22:48:47 -0700 (PDT) Received: from localhost.localdomain ([87.192.221.83]) by smtp.gmail.com with ESMTPSA id q13-20020adff78d000000b0022533c4fa48sm13429938wrp.55.2022.08.31.22.48.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 Aug 2022 22:48:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 1/4] target/avr: Support probe argument to tlb_fill Date: Thu, 1 Sep 2022 06:48:40 +0100 Message-Id: <20220901054843.31646-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220901054843.31646-1-richard.henderson@linaro.org> References: <20220901054843.31646-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" While there are no target-specific nonfaulting probes, generic code may grow some uses at some point. Note that the attrs argument was incorrect -- it should have been MEMTXATTRS_UNSPECIFIED. Just use the simpler interface. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/avr/helper.c | 46 ++++++++++++++++++++++++++++----------------- 1 file changed, 29 insertions(+), 17 deletions(-) diff --git a/target/avr/helper.c b/target/avr/helper.c index db76452f9a..82284f8997 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -102,38 +102,50 @@ bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr) { - int prot = 0; - MemTxAttrs attrs = {}; + int prot, page_size = TARGET_PAGE_SIZE; uint32_t paddr; address &= TARGET_PAGE_MASK; if (mmu_idx == MMU_CODE_IDX) { - /* access to code in flash */ + /* Access to code in flash. */ paddr = OFFSET_CODE + address; prot = PAGE_READ | PAGE_EXEC; - if (paddr + TARGET_PAGE_SIZE > OFFSET_DATA) { + if (paddr >= OFFSET_DATA) { + /* + * This should not be possible via any architectural operations. + * There is certainly not an exception that we can deliver. + * Accept probing that might come from generic code. + */ + if (probe) { + return false; + } error_report("execution left flash memory"); abort(); } - } else if (address < NUMBER_OF_CPU_REGISTERS + NUMBER_OF_IO_REGISTERS) { - /* - * access to CPU registers, exit and rebuilt this TB to use full access - * incase it touches specially handled registers like SREG or SP - */ - AVRCPU *cpu = AVR_CPU(cs); - CPUAVRState *env = &cpu->env; - env->fullacc = 1; - cpu_loop_exit_restore(cs, retaddr); } else { - /* access to memory. nothing special */ + /* Access to memory. */ paddr = OFFSET_DATA + address; prot = PAGE_READ | PAGE_WRITE; + if (address < NUMBER_OF_CPU_REGISTERS + NUMBER_OF_IO_REGISTERS) { + /* + * Access to CPU registers, exit and rebuilt this TB to use + * full access in case it touches specially handled registers + * like SREG or SP. For probing, set page_size = 1, in order + * to force tlb_fill to be called for the next access. + */ + if (probe) { + page_size = 1; + } else { + AVRCPU *cpu = AVR_CPU(cs); + CPUAVRState *env = &cpu->env; + env->fullacc = 1; + cpu_loop_exit_restore(cs, retaddr); + } + } } - tlb_set_page_with_attrs(cs, address, paddr, attrs, prot, - mmu_idx, TARGET_PAGE_SIZE); - + tlb_set_page(cs, address, paddr, prot, mmu_idx, page_size); return true; } From patchwork Thu Sep 1 05:48:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 601786 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp207919mae; Wed, 31 Aug 2022 22:51:42 -0700 (PDT) X-Google-Smtp-Source: AA6agR6eAGQ7oZbMvZvXvgP0rksd93p+hQ3MU/oWQSz7BJhqz116FwRVmxwQyBMwaXF+bBkX9PnY X-Received: by 2002:a05:620a:4450:b0:6bb:c19a:c022 with SMTP id w16-20020a05620a445000b006bbc19ac022mr17970828qkp.240.1662011501923; Wed, 31 Aug 2022 22:51:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662011501; cv=none; d=google.com; s=arc-20160816; b=QxCuM/riZ7anVPndnCL5/vDW9LucjW3z5y+256T1ZV5u0TheUuRJV5FkX79kFKhv7a VpYRuIHpi4G+Tj8RW+iXS0TJ88sEGhtLAoiqC0yahNXhaWNAlWjQIWdXgBj6SlS1Dxe3 XaBJU8v4oJX9JXaEvOvt6aT8hDtx/kmIGbrAyEIlToQ0HLf9NB58Xj/ji98/IFLpBsiB JqZVaVXbY17jQpPxvTnyU843NiixYB8EoOooAa1rh+MB3NxQXIllltphMhxUZzEE56ty fp8F64ZbGAePamR08P5UllV0RXzv2GzASqIZdfbDI6UZCdcDh893O8iE3lar6/pJdpSX 1KaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=pnrkcB7u5z1U6ZLIT5ewwpikaStb8NPbw7XF1+tgjNM=; b=DH8L0ivCHHVpYoLhh8y3HDUz9HgKup5Ut6skHKvdMF16KyIe1Sz89s9eUBCxDkHpgb GJD7dIQ6d/a0PRWNTU9428mwdo0kNVK7jHKoQXOKF5jtJCQD8tcpAO2PZz+IvZNX7/tE OXnlFSlWJmnU3TFU4wPAaW7haKZ3uGOXAaY510z9BqpD0KKY0a7QLmAdCE0JOxjY/8R9 bDVdwzJ8T5Vg9HdhfUcixsqNNSxrTWvveCrUVRHzp2K2BuJgC8wV9e0XSMtFnxSl3gh8 mGhOxYKjlGQgRi2z/MCQEQJHX9+JiU9saPaDbg0eT106bFO9+uPqtQ2K1n4nfPAOvF1a k4eg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=n2yKUHL4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Reviewed-by: Michael Rolnik Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/avr/helper.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target/avr/helper.c b/target/avr/helper.c index 82284f8997..9614ccf3e4 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -29,14 +29,13 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { bool ret = false; - CPUClass *cc = CPU_GET_CLASS(cs); AVRCPU *cpu = AVR_CPU(cs); CPUAVRState *env = &cpu->env; if (interrupt_request & CPU_INTERRUPT_RESET) { if (cpu_interrupts_enabled(env)) { cs->exception_index = EXCP_RESET; - cc->tcg_ops->do_interrupt(cs); + avr_cpu_do_interrupt(cs); cs->interrupt_request &= ~CPU_INTERRUPT_RESET; @@ -47,7 +46,7 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) if (cpu_interrupts_enabled(env) && env->intsrc != 0) { int index = ctz32(env->intsrc); cs->exception_index = EXCP_INT(index); - cc->tcg_ops->do_interrupt(cs); + avr_cpu_do_interrupt(cs); env->intsrc &= env->intsrc - 1; /* clear the interrupt */ if (!env->intsrc) { From patchwork Thu Sep 1 05:48:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 601788 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp209396mae; Wed, 31 Aug 2022 22:54:50 -0700 (PDT) X-Google-Smtp-Source: AA6agR40YQge244ZO4RXqJTOiKVuuBWN6ghXLB32HTFGfevU3JdIuw4XuXV+jKpEaAyIHfRW19B4 X-Received: by 2002:a05:6214:f21:b0:498:fada:9416 with SMTP id iw1-20020a0562140f2100b00498fada9416mr19646360qvb.84.1662011690587; Wed, 31 Aug 2022 22:54:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662011690; cv=none; d=google.com; s=arc-20160816; b=w9948O4N4LYzcUdDypXi8dp/hEIJFkOrPoWr7DbwjTMHkeLJijVM7vnvHkQcoCBy+N y5nPhZtDpGvS78pHxJlAQSE8gd4Xa9EdHSOaldXUAzJRRrzpqk+5MXd/IZ+skUj9529N cTFOUhnccbEx2DcgOk6iyZURN71a47OiEczwAqOVNCQ9ZL+7F7VSEUb0Q8wFLY7/Ha0q rEGXGCRPSVgyl85e9BLq0qCMU8xFHpvtOErybQmCmpMyQK4Fu6BenUp4qExgeRWi9DXc 9TrxblqL6iJ8Rxbg0p9IV8tpkyagJsO46cL4//0h/un+tKSzJfYKp0TB4ZN1CBDC3rLa 7VmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=onqIs+XT2WZfG8WtGyXgNUrHr/Df9zcYrXD6nOSwGCs=; b=Dbnl8B/I7o2Uh56IC+oD7DrdpJGmkzaXoYM0+lCbBwKehfvwRFG3y49/RcpimeFdCw XWmuCJUnP08BDCjtlqVqkkgG/UdmV7V5nlDHlf2DJsu1MxmbySaDr+gnyfVx2DdD46WN SX2XMjTgDJ6in18kLLOWri6eRi8w8UbriZWlfzbjqHWX6uCabyYo76tL//dO2OCqZbke GcKhcnTdGHZxKoYYmpq+J09M7US+UywGpdDJTRSZ6OVVzPiNeYPqMn68IaO7kSiEsizq permaCI+UU3HVQ4qRCF7IffdfksvPJ2YpceTNyCBdqsIK7trAbLFokv+BH9O2gvPjmxX qhqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="uQBW/8tn"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Reviewed-by: Michael Rolnik Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/avr/helper.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/target/avr/helper.c b/target/avr/helper.c index 9614ccf3e4..34f1cbffb2 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -28,7 +28,6 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { - bool ret = false; AVRCPU *cpu = AVR_CPU(cs); CPUAVRState *env = &cpu->env; @@ -38,8 +37,7 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) avr_cpu_do_interrupt(cs); cs->interrupt_request &= ~CPU_INTERRUPT_RESET; - - ret = true; + return true; } } if (interrupt_request & CPU_INTERRUPT_HARD) { @@ -52,11 +50,10 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) if (!env->intsrc) { cs->interrupt_request &= ~CPU_INTERRUPT_HARD; } - - ret = true; + return true; } } - return ret; + return false; } void avr_cpu_do_interrupt(CPUState *cs) From patchwork Thu Sep 1 05:48:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 601789 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp209438mae; Wed, 31 Aug 2022 22:54:55 -0700 (PDT) X-Google-Smtp-Source: AA6agR5ju+rSuASMV9PrYSoPYCNVWwO9Pzc+U5OlYED7FBk69J2vbeF3JLVHsSmAnMqs7GcfMzCg X-Received: by 2002:a05:622a:c:b0:344:5f6d:4d9d with SMTP id x12-20020a05622a000c00b003445f6d4d9dmr21812826qtw.366.1662011695467; Wed, 31 Aug 2022 22:54:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662011695; cv=none; d=google.com; s=arc-20160816; b=KowOgkS1uR6FbsqOXKSIxbV0v7i4/W7ZiqlHrT/fatUwNHj8+HiDj1x3mc3MGcTcMi J8+GyUsE2GQYps28L5RKtEO1dyhGSP3WSy6xZSy73bu57WcV3JV2DqU6mMOXSTrqvPa3 xQKq6tOy5YUgJdPeQ1srJxkfs6k/UyOWve5GyDc69beZI+ox+ET9nvFh7bf6nJmiRjfC 9qm7cwYQ2L7V+yz88YKDsm8JUZRjwgPVrqmLMzSqCLs8+0B0g3uBpqc9TK6MZH/xoTLX frqcsmaZla3LZkXnTLijcCl6wgWliAgHmxtWXpe+Dd6M8Z+LLQRbDXpwmUDxqdbuyu3D IrPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=osXM6kebf211jyJTnRVlg1LBiYlRKdmijrWPSS9x4Wo=; b=M3IBs0o66tVMDYdAR/n32qUhbDbZHbN+NWRzFGa5QtqD5p5sdovCOwoMPARw9P7yn4 +VcC1prJDKRNDPtqw+ZUcBZyk/gJLXg4YiMEYMuxUBJiB5IsKTSMvyzkLkhPrMXpGPTb +/EKxKglT7AIvtziwygjlUittenCm/QWrXzy/FR3k30W9miVDIukxWZPmVKaxCwJEKWF VVh8sFjFEx0Q1vnTerJsRC+mJkqRPmL02Zv5hxvrVc8QP3FdjYnbmLKTKF6ygc+/hiff t10sbtxF2HXKG8Ny7rjWEdjset1iJVlGalyV+BOFmpmoTCcoF+bGzfH5WqzaIf4BV9Sn 4UPQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="x2uGWdT/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1118 Reviewed-by: Michael Rolnik Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/avr/helper.c | 9 +++++++++ target/avr/translate.c | 26 ++++++++++++++++++++++---- 2 files changed, 31 insertions(+), 4 deletions(-) diff --git a/target/avr/helper.c b/target/avr/helper.c index 34f1cbffb2..156dde4e92 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -31,6 +31,15 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) AVRCPU *cpu = AVR_CPU(cs); CPUAVRState *env = &cpu->env; + /* + * We cannot separate a skip from the next instruction, + * as the skip would not be preserved across the interrupt. + * Separating the two insn normally only happens at page boundaries. + */ + if (env->skip) { + return false; + } + if (interrupt_request & CPU_INTERRUPT_RESET) { if (cpu_interrupts_enabled(env)) { cs->exception_index = EXCP_RESET; diff --git a/target/avr/translate.c b/target/avr/translate.c index dc9c3d6bcc..026753c963 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -2971,8 +2971,18 @@ static void avr_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) if (skip_label) { canonicalize_skip(ctx); gen_set_label(skip_label); - if (ctx->base.is_jmp == DISAS_NORETURN) { + + switch (ctx->base.is_jmp) { + case DISAS_NORETURN: ctx->base.is_jmp = DISAS_CHAIN; + break; + case DISAS_NEXT: + if (ctx->base.tb->flags & TB_FLAGS_SKIP) { + ctx->base.is_jmp = DISAS_TOO_MANY; + } + break; + default: + break; } } @@ -2989,6 +2999,11 @@ static void avr_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); bool nonconst_skip = canonicalize_skip(ctx); + /* + * Because we disable interrupts while env->skip is set, + * we must return to the main loop to re-evaluate afterward. + */ + bool force_exit = ctx->base.tb->flags & TB_FLAGS_SKIP; switch (ctx->base.is_jmp) { case DISAS_NORETURN: @@ -2997,7 +3012,7 @@ static void avr_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) case DISAS_NEXT: case DISAS_TOO_MANY: case DISAS_CHAIN: - if (!nonconst_skip) { + if (!nonconst_skip && !force_exit) { /* Note gen_goto_tb checks singlestep. */ gen_goto_tb(ctx, 1, ctx->npc); break; @@ -3005,8 +3020,11 @@ static void avr_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) tcg_gen_movi_tl(cpu_pc, ctx->npc); /* fall through */ case DISAS_LOOKUP: - tcg_gen_lookup_and_goto_ptr(); - break; + if (!force_exit) { + tcg_gen_lookup_and_goto_ptr(); + break; + } + /* fall through */ case DISAS_EXIT: tcg_gen_exit_tb(NULL, 0); break;