From patchwork Tue Aug 30 18:29:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 601109 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6291C3DA6B for ; Tue, 30 Aug 2022 18:29:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231235AbiH3S3f (ORCPT ); Tue, 30 Aug 2022 14:29:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230155AbiH3S3e (ORCPT ); Tue, 30 Aug 2022 14:29:34 -0400 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6AF3D65263 for ; Tue, 30 Aug 2022 11:29:32 -0700 (PDT) Received: by mail-pj1-x1029.google.com with SMTP id j9-20020a17090a3e0900b001fd9568b117so9033314pjc.3 for ; Tue, 30 Aug 2022 11:29:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=NF3x2ZuQmc7E5ZKV3Bzdu/rI94Ot3GBmPnTGqOsq+uk=; b=cTeCi1YNZNnhxjJF/bb5tz/6qdHQ8eGVvhqFmNlqm9j9s3imudLob1H3teCiWaNidD vJKF3mF7/Mwqj7ArNNKTylqd3p25F0vT9cD0A5uUEvvFjJOVWjKG+C4K2PFB8mQL8VzT 4qUgBmaWXcOEagw+nvwqw3+f+WnTMF3KXEWKE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=NF3x2ZuQmc7E5ZKV3Bzdu/rI94Ot3GBmPnTGqOsq+uk=; b=rbf2lPdEmF0UNkDdpX695Ic+t7xR7H1A40OJqSlur041Db6aYVUUGHkMuowA8u2/lU FscRNQuQNzhceAOHsOJJZP2mGv0k8A/c7qaRJd+kl1WqfMIHqeU0eF+hjUNRDmOWmWSI ZlUT7G+weIJ/V7JjMBLfVJ5hHlATUyowLpSrBeAZUDFEh6ELiGPdRAwZbHn1W26z1+xu yEevvoUyUFrT5+5gb1Q0OENcuLGWy/+VKdzf+nSbxCSWLdluv79u/MvQQi8ur+IJXf7T Dp4JruDrkKoFluieWwX13ydsAVzGCTHPpH1s60yXz96It5yED4ntufKmhSG3wEEsTJQ1 tmjw== X-Gm-Message-State: ACgBeo1HpgQ8bdhA0CNPbh53B2rT9sC943yfpvxUmb43BzkihJuGG3a4 03Jn3sNfmcMJ7Prr+5Cm1a1C1g== X-Google-Smtp-Source: AA6agR4VzJf1HvOrQa9ExROd+6qMHu90X2VEe7IDxB74ZUaD42s7MsURvnaw4mJYuZQOfHzc0yCLdw== X-Received: by 2002:a17:902:ec8c:b0:175:14e5:9ab7 with SMTP id x12-20020a170902ec8c00b0017514e59ab7mr4710363plg.141.1661884171931; Tue, 30 Aug 2022 11:29:31 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:f016:d779:b6b0:fd9d]) by smtp.gmail.com with ESMTPSA id u202-20020a6279d3000000b0052e37b32618sm9596358pfc.132.2022.08.30.11.29.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Aug 2022 11:29:31 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson Cc: Sibi Sankar , Jimmy Chen , Rob Herring , Douglas Anderson , Andy Gross , Konrad Dybcio , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 1/3] dt-bindings: arm: qcom: document sc7280 and villager board Date: Tue, 30 Aug 2022 11:29:21 -0700 Message-Id: <20220830112818.v9.1.I4fa927a776951095d55c41ddb64149c8c0eae57c@changeid> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog In-Reply-To: <20220830182923.3720287-1-dianders@chromium.org> References: <20220830182923.3720287-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Jimmy Chen This adds a LTE skus for Chromebook Villager to the yaml. Signed-off-by: Jimmy Chen Acked-by: Rob Herring [dianders: adjust LTE as SKU 512; remove two variants of -rev0] Signed-off-by: Douglas Anderson Acked-by: Krzysztof Kozlowski --- Changes in v9: - Squash https://lore.kernel.org/r/20220829084732.1.I9ef7f8b909a7afbef9ff2251a98c67033f37b516@changeid Changes in v2: - ("...: document sc7280 and villager board") new for v2. Documentation/devicetree/bindings/arm/qcom.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index c9b71dc97758..c2e1cbf12a03 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -575,11 +575,21 @@ properties: - const: google,herobrine - const: qcom,sc7280 + - description: Google Villager (rev0) + items: + - const: google,villager-rev0 + - const: qcom,sc7280 + - description: Google Villager (newest rev) items: - const: google,villager - const: qcom,sc7280 + - description: Google Villager with LTE (newest rev) + items: + - const: google,villager-sku512 + - const: qcom,sc7280 + - items: - enum: - lenovo,flex-5g From patchwork Tue Aug 30 18:29:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 601902 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2955C3DA6B for ; Tue, 30 Aug 2022 18:29:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231440AbiH3S3h (ORCPT ); Tue, 30 Aug 2022 14:29:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231375AbiH3S3f (ORCPT ); Tue, 30 Aug 2022 14:29:35 -0400 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B63F6554D for ; Tue, 30 Aug 2022 11:29:34 -0700 (PDT) Received: by mail-pl1-x62d.google.com with SMTP id c2so11944492plo.3 for ; Tue, 30 Aug 2022 11:29:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=IVYpqdrEDbP/yo8j9YBCLt1dmps7l9gRH+pM/+p7PK0=; b=YtBwXyopWXDWizaP52Wx5ett0W5ma68cdHKgYA/VnhL+UajdN+vvPmhpNDqwHZ9sPc 5DYqRxbypI8evgoIWu/JR7TWji1bf2rt0UooPbURH/FOXx9+nvYoiFpIKpz/SG0gKuKS QgE30jPF3qg2lBhkJH5PkmSJlHps93SVXE1Zo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=IVYpqdrEDbP/yo8j9YBCLt1dmps7l9gRH+pM/+p7PK0=; b=AQ25u+yO0OpNsTxuz22NrnegCxi89xY07WtwBBofMYGkXYlOGhZscGFkfRY7POa+r3 IG+4CQZW/k/aODtuUCFas/lUd66x7GRlulGS1uDQL2m7qrg47Nq3284fF5tMspxttbmc 1M+FTx7NwvTZmN0DkTdZB3KTjbk/Cxr1XLYByZIOx18tHfyMF2Ev8vWt2mgRo3ZIgNhG roL7vMkT897vDM5qTrJ6EWoIwPurGTQxsH4wMy7aMoanhhnrEuW58yetOTIrOt52g1V0 oHrQjeWMBpZiaWpeE3ErKt6C+TUHLgZESpzA+NyR1hO3x+tXW4kLceDnojLlF+uN+BK3 tdig== X-Gm-Message-State: ACgBeo3czlSpqbaqLY/top5ttU09fyAcbDtQ6Y3Wv0vVRd2Oi7dTs5Xp JZLmDrn0pSKw5izUnJLKEjSZ5A== X-Google-Smtp-Source: AA6agR6FFNo461tgdKd7kvBaIfB0Xng/tcC7Z0YghFdKfYMadyAPf1NmWkHj0sN8Ld41DQKlDokUtA== X-Received: by 2002:a17:90b:3511:b0:1f4:e0cd:1e04 with SMTP id ls17-20020a17090b351100b001f4e0cd1e04mr25365421pjb.154.1661884173694; Tue, 30 Aug 2022 11:29:33 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:f016:d779:b6b0:fd9d]) by smtp.gmail.com with ESMTPSA id u202-20020a6279d3000000b0052e37b32618sm9596358pfc.132.2022.08.30.11.29.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Aug 2022 11:29:33 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson Cc: Sibi Sankar , Jimmy Chen , Douglas Anderson , Andy Gross , Konrad Dybcio , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 2/3] arm64: dts: qcom: sc7280: Add herobrine-villager-r1 Date: Tue, 30 Aug 2022 11:29:22 -0700 Message-Id: <20220830112818.v9.2.Iceba291b2b70eeca1fdf654a43f0484d34791024@changeid> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog In-Reply-To: <20220830182923.3720287-1-dianders@chromium.org> References: <20220830182923.3720287-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Jimmy Chen This adds sc7280-herobrine-villager-r1.dts for villager device tree files. Herobrine-r1 is exactly the same as -r0 except that it uses a different audio solution (it uses the same one as the CRD). Signed-off-by: Jimmy Chen Reviewed-by: Douglas Anderson Signed-off-by: Douglas Anderson --- (no changes since v7) Changes in v7: - Revise typo 'ARCG' to 'ARCH' in Makefile Changes in v5: - Revise rev0+ to rev0 - Add -r1 line to the Makefile Changes in v4: - ("...: Add herobrine-villager-r1") new for v4 arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sc7280-herobrine-villager-r0.dts | 4 ++-- .../boot/dts/qcom/sc7280-herobrine-villager-r1.dts | 14 ++++++++++++++ 3 files changed, 17 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index fa8f8b66bb02..a62a56fd27cb 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -106,6 +106,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1-lte.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-crd.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-herobrine-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r0.dtb +dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r0.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r0.dts index 2cacafd8faa8..cbd8a2d1ef2a 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r0.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r0.dts @@ -10,8 +10,8 @@ #include "sc7280-herobrine.dtsi" / { - model = "Google Villager (rev0+)"; - compatible = "google,villager", "qcom,sc7280"; + model = "Google Villager (rev0)"; + compatible = "google,villager-rev0", "qcom,sc7280"; }; /* diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1.dts new file mode 100644 index 000000000000..c03b3ae4de50 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Google Villager board device tree source + * + * Copyright 2022 Google LLC. + */ + +#include "sc7280-herobrine-villager-r0.dts" +#include "sc7280-herobrine-audio-wcd9385.dtsi" + +/ { + model = "Google Villager (rev1+)"; + compatible = "google,villager", "qcom,sc7280"; +}; From patchwork Tue Aug 30 18:29:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 601108 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64F4DECAAD8 for ; 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Tue, 30 Aug 2022 11:29:34 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson Cc: Sibi Sankar , Jimmy Chen , Douglas Anderson , Andy Gross , Konrad Dybcio , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 3/3] arm64: dts: qcom: Add LTE SKUs for sc7280-villager family Date: Tue, 30 Aug 2022 11:29:23 -0700 Message-Id: <20220830112818.v9.3.I9313b463b1816d2f7d5149519f6685c291976faf@changeid> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog In-Reply-To: <20220830182923.3720287-1-dianders@chromium.org> References: <20220830182923.3720287-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Jimmy Chen This adds LTE skus for villager device tree files. Signed-off-by: Jimmy Chen Reviewed-by: Sibi Sankar [dianders: adjust LTE as SKU 512; remove two variants of -rev0] Signed-off-by: Douglas Anderson --- Changes in v9: - Squash https://lore.kernel.org/r/20220829084732.2.I22e256d1ebac577a91fac44d1d12919be7111cd4@changeid/ Changes in v6: - Remove v5 accidentally added sc7280-herobrine-herobrine-r1-lte.dts Changes in v5: - Reorder '.dtb' in Makefile - Put the "interconnects" line back Changes in v4: - Reorder 'status' last arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sc7280-chrome-common.dtsi | 11 - .../boot/dts/qcom/sc7280-herobrine-crd.dts | 1 + .../qcom/sc7280-herobrine-herobrine-r1.dts | 1 + .../dts/qcom/sc7280-herobrine-lte-sku.dtsi | 17 + .../dts/qcom/sc7280-herobrine-villager-r0.dts | 321 +---------------- .../qcom/sc7280-herobrine-villager-r1-lte.dts | 14 + .../dts/qcom/sc7280-herobrine-villager-r1.dts | 4 +- .../dts/qcom/sc7280-herobrine-villager.dtsi | 326 ++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-idp.dts | 1 + 10 files changed, 366 insertions(+), 331 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1-lte.dts create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-villager.dtsi diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index a62a56fd27cb..929eeea9bf22 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -107,6 +107,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-crd.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-herobrine-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r0.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r1.dtb +dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r1-lte.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi index cfe2741456a1..25f31c81b2b7 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi @@ -83,17 +83,6 @@ spi_flash: flash@0 { }; }; -/* Modem setup is different on Chrome setups than typical Qualcomm setup */ -&remoteproc_mpss { - status = "okay"; - compatible = "qcom,sc7280-mss-pil"; - iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>; - interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; - memory-region = <&mba_mem>, <&mpss_mem>; - firmware-name = "qcom/sc7280-herobrine/modem/mba.mbn", - "qcom/sc7280-herobrine/modem/qdsp6sw.mbn"; -}; - &remoteproc_wpss { status = "okay"; firmware-name = "ath11k/WCN6750/hw1.0/wpss.mdt"; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts index bc795c480352..7a14bad9c23e 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts @@ -9,6 +9,7 @@ #include "sc7280-herobrine.dtsi" #include "sc7280-herobrine-audio-wcd9385.dtsi" +#include "sc7280-herobrine-lte-sku.dtsi" / { model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)"; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts index c1647a85a371..c1a671968725 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "sc7280-herobrine.dtsi" +#include "sc7280-herobrine-lte-sku.dtsi" / { model = "Google Herobrine (rev1+)"; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi new file mode 100644 index 000000000000..a92eeccd2b2a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Google Herobrine dts fragment for LTE SKUs + * + * Copyright 2022 Google LLC. + */ +/* Modem setup is different on Chrome setups than typical Qualcomm setup */ + +&remoteproc_mpss { + compatible = "qcom,sc7280-mss-pil"; + iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>; + interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; + memory-region = <&mba_mem>, <&mpss_mem>; + firmware-name = "qcom/sc7280-herobrine/modem/mba.mbn", + "qcom/sc7280-herobrine/modem/qdsp6sw.mbn"; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r0.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r0.dts index cbd8a2d1ef2a..73e24cc55a09 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r0.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r0.dts @@ -7,327 +7,10 @@ /dts-v1/; -#include "sc7280-herobrine.dtsi" +#include "sc7280-herobrine-villager.dtsi" +#include "sc7280-herobrine-lte-sku.dtsi" / { model = "Google Villager (rev0)"; compatible = "google,villager-rev0", "qcom,sc7280"; }; - -/* - * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES - * - * Sort order matches the order in the parent files (parents before children). - */ - -&pp3300_codec { - status = "okay"; -}; - -/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ - -ap_tp_i2c: &i2c0 { - status = "okay"; - clock-frequency = <400000>; - - trackpad: trackpad@2c { - compatible = "hid-over-i2c"; - reg = <0x2c>; - pinctrl-names = "default"; - pinctrl-0 = <&tp_int_odl>; - - interrupt-parent = <&tlmm>; - interrupts = <7 IRQ_TYPE_EDGE_FALLING>; - - hid-descr-addr = <0x20>; - vcc-supply = <&pp3300_z1>; - - wakeup-source; - }; -}; - -ts_i2c: &i2c13 { - status = "okay"; - clock-frequency = <400000>; - - ap_ts: touchscreen@10 { - compatible = "elan,ekth6915"; - reg = <0x10>; - pinctrl-names = "default"; - pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>; - - interrupt-parent = <&tlmm>; - interrupts = <55 IRQ_TYPE_LEVEL_LOW>; - - reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>; - - vcc33-supply = <&ts_avdd>; - }; -}; - -&ap_sar_sensor_i2c { - status = "okay"; -}; - -&ap_sar_sensor0 { - status = "okay"; -}; - -&ap_sar_sensor1 { - status = "okay"; -}; - -&mdss_edp { - status = "okay"; -}; - -&mdss_edp_phy { - status = "okay"; -}; - -/* For nvme */ -&pcie1 { - status = "okay"; -}; - -/* For nvme */ -&pcie1_phy { - status = "okay"; -}; - -&pwmleds { - status = "okay"; -}; - -/* For eMMC */ -&sdhc_1 { - status = "okay"; -}; - -/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */ - -&ts_rst_conn { - bias-disable; -}; - -/* PINCTRL - BOARD-SPECIFIC */ - -/* - * Methodology for gpio-line-names: - * - If a pin goes to herobrine board and is named it gets that name. - * - If a pin goes to herobrine board and is not named, it gets no name. - * - If a pin is totally internal to Qcard then it gets Qcard name. - * - If a pin is not hooked up on Qcard, it gets no name. - */ - -&pm8350c_gpios { - gpio-line-names = "FLASH_STROBE_1", /* 1 */ - "AP_SUSPEND", - "PM8008_1_RST_N", - "", - "", - "", - "PMIC_EDP_BL_EN", - "PMIC_EDP_BL_PWM", - ""; -}; - -&tlmm { - gpio-line-names = "AP_TP_I2C_SDA", /* 0 */ - "AP_TP_I2C_SCL", - "SSD_RST_L", - "PE_WAKE_ODL", - "AP_SAR_SDA", - "AP_SAR_SCL", - "PRB_SC_GPIO_6", - "TP_INT_ODL", - "HP_I2C_SDA", - "HP_I2C_SCL", - - "GNSS_L1_EN", /* 10 */ - "GNSS_L5_EN", - "SPI_AP_MOSI", - "SPI_AP_MISO", - "SPI_AP_CLK", - "SPI_AP_CS0_L", - /* - * AP_FLASH_WP is crossystem ABI. Schematics - * call it BIOS_FLASH_WP_OD. - */ - "AP_FLASH_WP", - "", - "AP_EC_INT_L", - "", - - "UF_CAM_RST_L", /* 20 */ - "WF_CAM_RST_L", - "UART_AP_TX_DBG_RX", - "UART_DBG_TX_AP_RX", - "", - "PM8008_IRQ_1", - "HOST2WLAN_SOL", - "WLAN2HOST_SOL", - "MOS_BT_UART_CTS", - "MOS_BT_UART_RFR", - - "MOS_BT_UART_TX", /* 30 */ - "MOS_BT_UART_RX", - "PRB_SC_GPIO_32", - "HUB_RST_L", - "", - "", - "AP_SPI_FP_MISO", - "AP_SPI_FP_MOSI", - "AP_SPI_FP_CLK", - "AP_SPI_FP_CS_L", - - "AP_EC_SPI_MISO", /* 40 */ - "AP_EC_SPI_MOSI", - "AP_EC_SPI_CLK", - "AP_EC_SPI_CS_L", - "LCM_RST_L", - "EARLY_EUD_N", - "", - "DP_HOT_PLUG_DET", - "IO_BRD_MLB_ID0", - "IO_BRD_MLB_ID1", - - "IO_BRD_MLB_ID2", /* 50 */ - "SSD_EN", - "TS_I2C_SDA_CONN", - "TS_I2C_CLK_CONN", - "TS_RST_CONN", - "TS_INT_CONN", - "AP_I2C_TPM_SDA", - "AP_I2C_TPM_SCL", - "PRB_SC_GPIO_58", - "PRB_SC_GPIO_59", - - "EDP_HOT_PLUG_DET_N", /* 60 */ - "FP_TO_AP_IRQ_L", - "", - "AMP_EN", - "CAM0_MCLK_GPIO_64", - "CAM1_MCLK_GPIO_65", - "WF_CAM_MCLK", - "PRB_SC_GPIO_67", - "FPMCU_BOOT0", - "UF_CAM_SDA", - - "UF_CAM_SCL", /* 70 */ - "", - "", - "WF_CAM_SDA", - "WF_CAM_SCL", - "", - "", - "EN_FP_RAILS", - "FP_RST_L", - "PCIE1_CLKREQ_ODL", - - "EN_PP3300_DX_EDP", /* 80 */ - "SC_GPIO_81", - "FORCED_USB_BOOT", - "WCD_RESET_N", - "MOS_WLAN_EN", - "MOS_BT_EN", - "MOS_SW_CTRL", - "MOS_PCIE0_RST", - "MOS_PCIE0_CLKREQ_N", - "MOS_PCIE0_WAKE_N", - - "MOS_LAA_AS_EN", /* 90 */ - "SD_CD_ODL", - "", - "", - "MOS_BT_WLAN_SLIMBUS_CLK", - "MOS_BT_WLAN_SLIMBUS_DAT0", - "HP_MCLK", - "HP_BCLK", - "HP_DOUT", - "HP_DIN", - - "HP_LRCLK", /* 100 */ - "HP_IRQ", - "", - "", - "GSC_AP_INT_ODL", - "EN_PP3300_CODEC", - "AMP_BCLK", - "AMP_DIN", - "AMP_LRCLK", - "UIM1_DATA_GPIO_109", - - "UIM1_CLK_GPIO_110", /* 110 */ - "UIM1_RESET_GPIO_111", - "PRB_SC_GPIO_112", - "UIM0_DATA", - "UIM0_CLK", - "UIM0_RST", - "UIM0_PRESENT_ODL", - "SDM_RFFE0_CLK", - "SDM_RFFE0_DATA", - "WF_CAM_EN", - - "FASTBOOT_SEL_0", /* 120 */ - "SC_GPIO_121", - "FASTBOOT_SEL_1", - "SC_GPIO_123", - "FASTBOOT_SEL_2", - "SM_RFFE4_CLK_GRFC_8", - "SM_RFFE4_DATA_GRFC_9", - "WLAN_COEX_UART1_RX", - "WLAN_COEX_UART1_TX", - "PRB_SC_GPIO_129", - - "LCM_ID0", /* 130 */ - "LCM_ID1", - "", - "SDR_QLINK_REQ", - "SDR_QLINK_EN", - "QLINK0_WMSS_RESET_N", - "SMR526_QLINK1_REQ", - "SMR526_QLINK1_EN", - "SMR526_QLINK1_WMSS_RESET_N", - "PRB_SC_GPIO_139", - - "SAR1_IRQ_ODL", /* 140 */ - "SAR0_IRQ_ODL", - "PRB_SC_GPIO_142", - "", - "WCD_SWR_TX_CLK", - "WCD_SWR_TX_DATA0", - "WCD_SWR_TX_DATA1", - "WCD_SWR_RX_CLK", - "WCD_SWR_RX_DATA0", - "WCD_SWR_RX_DATA1", - - "DMIC01_CLK", /* 150 */ - "DMIC01_DATA", - "DMIC23_CLK", - "DMIC23_DATA", - "", - "", - "EC_IN_RW_ODL", - "HUB_EN", - "WCD_SWR_TX_DATA2", - "", - - "", /* 160 */ - "", - "", - "", - "", - "", - "", - "", - "", - "", - - "", /* 170 */ - "MOS_BLE_UART_TX", - "MOS_BLE_UART_RX", - "", - "", - ""; -}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1-lte.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1-lte.dts new file mode 100644 index 000000000000..f1017809e5da --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1-lte.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Google Villager board device tree source + * + * Copyright 2022 Google LLC. + */ + +#include "sc7280-herobrine-villager-r1.dts" +#include "sc7280-herobrine-lte-sku.dtsi" + +/ { + model = "Google Villager (rev1+) with LTE"; + compatible = "google,villager-sku512", "qcom,sc7280"; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1.dts index c03b3ae4de50..d7aa42ece576 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1.dts @@ -5,7 +5,9 @@ * Copyright 2022 Google LLC. */ -#include "sc7280-herobrine-villager-r0.dts" +/dts-v1/; + +#include "sc7280-herobrine-villager.dtsi" #include "sc7280-herobrine-audio-wcd9385.dtsi" / { diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager.dtsi new file mode 100644 index 000000000000..4566722bf4dd --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager.dtsi @@ -0,0 +1,326 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Google Villager board device tree source + * + * Copyright 2022 Google LLC. + */ + +#include "sc7280-herobrine.dtsi" + +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before children). + */ + +&pp3300_codec { + status = "okay"; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + +ap_tp_i2c: &i2c0 { + status = "okay"; + clock-frequency = <400000>; + + trackpad: trackpad@2c { + compatible = "hid-over-i2c"; + reg = <0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <&tp_int_odl>; + + interrupt-parent = <&tlmm>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + + hid-descr-addr = <0x20>; + vcc-supply = <&pp3300_z1>; + + wakeup-source; + }; +}; + +ts_i2c: &i2c13 { + status = "okay"; + clock-frequency = <400000>; + + ap_ts: touchscreen@10 { + compatible = "elan,ekth6915"; + reg = <0x10>; + pinctrl-names = "default"; + pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>; + + interrupt-parent = <&tlmm>; + interrupts = <55 IRQ_TYPE_LEVEL_LOW>; + + reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>; + + vcc33-supply = <&ts_avdd>; + }; +}; + +&ap_sar_sensor_i2c { + status = "okay"; +}; + +&ap_sar_sensor0 { + status = "okay"; +}; + +&ap_sar_sensor1 { + status = "okay"; +}; + +&mdss_edp { + status = "okay"; +}; + +&mdss_edp_phy { + status = "okay"; +}; + +/* For nvme */ +&pcie1 { + status = "okay"; +}; + +/* For nvme */ +&pcie1_phy { + status = "okay"; +}; + +&pwmleds { + status = "okay"; +}; + +/* For eMMC */ +&sdhc_1 { + status = "okay"; +}; + +/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */ + +&ts_rst_conn { + bias-disable; +}; + +/* PINCTRL - BOARD-SPECIFIC */ + +/* + * Methodology for gpio-line-names: + * - If a pin goes to herobrine board and is named it gets that name. + * - If a pin goes to herobrine board and is not named, it gets no name. + * - If a pin is totally internal to Qcard then it gets Qcard name. + * - If a pin is not hooked up on Qcard, it gets no name. + */ + +&pm8350c_gpios { + gpio-line-names = "FLASH_STROBE_1", /* 1 */ + "AP_SUSPEND", + "PM8008_1_RST_N", + "", + "", + "", + "PMIC_EDP_BL_EN", + "PMIC_EDP_BL_PWM", + ""; +}; + +&tlmm { + gpio-line-names = "AP_TP_I2C_SDA", /* 0 */ + "AP_TP_I2C_SCL", + "SSD_RST_L", + "PE_WAKE_ODL", + "AP_SAR_SDA", + "AP_SAR_SCL", + "PRB_SC_GPIO_6", + "TP_INT_ODL", + "HP_I2C_SDA", + "HP_I2C_SCL", + + "GNSS_L1_EN", /* 10 */ + "GNSS_L5_EN", + "SPI_AP_MOSI", + "SPI_AP_MISO", + "SPI_AP_CLK", + "SPI_AP_CS0_L", + /* + * AP_FLASH_WP is crossystem ABI. Schematics + * call it BIOS_FLASH_WP_OD. + */ + "AP_FLASH_WP", + "", + "AP_EC_INT_L", + "", + + "UF_CAM_RST_L", /* 20 */ + "WF_CAM_RST_L", + "UART_AP_TX_DBG_RX", + "UART_DBG_TX_AP_RX", + "", + "PM8008_IRQ_1", + "HOST2WLAN_SOL", + "WLAN2HOST_SOL", + "MOS_BT_UART_CTS", + "MOS_BT_UART_RFR", + + "MOS_BT_UART_TX", /* 30 */ + "MOS_BT_UART_RX", + "PRB_SC_GPIO_32", + "HUB_RST_L", + "", + "", + "AP_SPI_FP_MISO", + "AP_SPI_FP_MOSI", + "AP_SPI_FP_CLK", + "AP_SPI_FP_CS_L", + + "AP_EC_SPI_MISO", /* 40 */ + "AP_EC_SPI_MOSI", + "AP_EC_SPI_CLK", + "AP_EC_SPI_CS_L", + "LCM_RST_L", + "EARLY_EUD_N", + "", + "DP_HOT_PLUG_DET", + "IO_BRD_MLB_ID0", + "IO_BRD_MLB_ID1", + + "IO_BRD_MLB_ID2", /* 50 */ + "SSD_EN", + "TS_I2C_SDA_CONN", + "TS_I2C_CLK_CONN", + "TS_RST_CONN", + "TS_INT_CONN", + "AP_I2C_TPM_SDA", + "AP_I2C_TPM_SCL", + "PRB_SC_GPIO_58", + "PRB_SC_GPIO_59", + + "EDP_HOT_PLUG_DET_N", /* 60 */ + "FP_TO_AP_IRQ_L", + "", + "AMP_EN", + "CAM0_MCLK_GPIO_64", + "CAM1_MCLK_GPIO_65", + "WF_CAM_MCLK", + "PRB_SC_GPIO_67", + "FPMCU_BOOT0", + "UF_CAM_SDA", + + "UF_CAM_SCL", /* 70 */ + "", + "", + "WF_CAM_SDA", + "WF_CAM_SCL", + "", + "", + "EN_FP_RAILS", + "FP_RST_L", + "PCIE1_CLKREQ_ODL", + + "EN_PP3300_DX_EDP", /* 80 */ + "SC_GPIO_81", + "FORCED_USB_BOOT", + "WCD_RESET_N", + "MOS_WLAN_EN", + "MOS_BT_EN", + "MOS_SW_CTRL", + "MOS_PCIE0_RST", + "MOS_PCIE0_CLKREQ_N", + "MOS_PCIE0_WAKE_N", + + "MOS_LAA_AS_EN", /* 90 */ + "SD_CD_ODL", + "", + "", + "MOS_BT_WLAN_SLIMBUS_CLK", + "MOS_BT_WLAN_SLIMBUS_DAT0", + "HP_MCLK", + "HP_BCLK", + "HP_DOUT", + "HP_DIN", + + "HP_LRCLK", /* 100 */ + "HP_IRQ", + "", + "", + "GSC_AP_INT_ODL", + "EN_PP3300_CODEC", + "AMP_BCLK", + "AMP_DIN", + "AMP_LRCLK", + "UIM1_DATA_GPIO_109", + + "UIM1_CLK_GPIO_110", /* 110 */ + "UIM1_RESET_GPIO_111", + "PRB_SC_GPIO_112", + "UIM0_DATA", + "UIM0_CLK", + "UIM0_RST", + "UIM0_PRESENT_ODL", + "SDM_RFFE0_CLK", + "SDM_RFFE0_DATA", + "WF_CAM_EN", + + "FASTBOOT_SEL_0", /* 120 */ + "SC_GPIO_121", + "FASTBOOT_SEL_1", + "SC_GPIO_123", + "FASTBOOT_SEL_2", + "SM_RFFE4_CLK_GRFC_8", + "SM_RFFE4_DATA_GRFC_9", + "WLAN_COEX_UART1_RX", + "WLAN_COEX_UART1_TX", + "PRB_SC_GPIO_129", + + "LCM_ID0", /* 130 */ + "LCM_ID1", + "", + "SDR_QLINK_REQ", + "SDR_QLINK_EN", + "QLINK0_WMSS_RESET_N", + "SMR526_QLINK1_REQ", + "SMR526_QLINK1_EN", + "SMR526_QLINK1_WMSS_RESET_N", + "PRB_SC_GPIO_139", + + "SAR1_IRQ_ODL", /* 140 */ + "SAR0_IRQ_ODL", + "PRB_SC_GPIO_142", + "", + "WCD_SWR_TX_CLK", + "WCD_SWR_TX_DATA0", + "WCD_SWR_TX_DATA1", + "WCD_SWR_RX_CLK", + "WCD_SWR_RX_DATA0", + "WCD_SWR_RX_DATA1", + + "DMIC01_CLK", /* 150 */ + "DMIC01_DATA", + "DMIC23_CLK", + "DMIC23_DATA", + "", + "", + "EC_IN_RW_ODL", + "HUB_EN", + "WCD_SWR_TX_DATA2", + "", + + "", /* 160 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + + "", /* 170 */ + "MOS_BLE_UART_TX", + "MOS_BLE_UART_RX", + "", + "", + ""; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts index e2e37a0292ad..7559164cdda0 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts @@ -10,6 +10,7 @@ #include #include "sc7280-idp.dtsi" #include "pmr735a.dtsi" +#include "sc7280-herobrine-lte-sku.dtsi" / { model = "Qualcomm Technologies, Inc. sc7280 IDP SKU1 platform";