From patchwork Mon Aug 22 20:18:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 599293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71706C32774 for ; Mon, 22 Aug 2022 20:18:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236135AbiHVUSQ (ORCPT ); Mon, 22 Aug 2022 16:18:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233922AbiHVUSP (ORCPT ); Mon, 22 Aug 2022 16:18:15 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F958C0 for ; Mon, 22 Aug 2022 13:18:12 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id l19so8529973ljg.8 for ; Mon, 22 Aug 2022 13:18:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=MgktskEO9X0PeD1UqQ9k4kASH0M9LMY15mh8Ip3x2Mg=; b=kbwb3dub7jABBLaxAA1Ev1YlZn7DYOi9yQbhSB+7c2BLw94TTdt3wUzfiQk+XrlOO2 eqLYvcLUUYW9/7PFO9EZssAch/J2EjL5UnOj/A/C3GNUd6KBMdpWFEsyeMu3mCtAk8Hb +3x9Etb5yVtqdMJxSU+HcwsGpUZtY986Y/tAtuWXKsJEccFZPfO2hbwQj6lLFtd72T0S IoqdU6v2MBRbqZ90dALgCf8/YObhQ6FGMSGnHrBMlsan3In1xSDhRk8Jz9UUHLLt6R8e eKkEofHmnaZI4eYnwySgSjvhILjrD3fbix3G4THFVft+ZAplG8yYsqVEgHPwhcOfsAhb idZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=MgktskEO9X0PeD1UqQ9k4kASH0M9LMY15mh8Ip3x2Mg=; b=e6x0Z8nG2rmaC9rt45xfsXxkOaByF32fns1Xi3nAFcCWuS95xqTlOxfU30lRD7Mls7 Y00Gx7ZOStGy4SxipYQu0VFwdYXNa4qPS1/fE/EEQgLUyttLFzNaBw3CDcSGi9OtNmiV nLOwMS5aKe/5J3NJ4WJNHC12hi7g3ZRemCPdORDfrh59XPMbfNrrElzePOTrYJ42Y+Xk bSqo9zctlyw1sye0Iq7B88qWVD7sCXP+133azUGP8AhD7kIQwkYSmZcJA+yTrO2/abr0 vihXjl9OeshGujJzCEIVFWzD13U7XX0QpOwOu+0dxHBZqp1YYHZe++rWJltXd08oM+7g jLNw== X-Gm-Message-State: ACgBeo2q4+1GVwKil/dvNObhdpnja4F1RDdLsdfq7ZgwAjyzL6CORQm4 7qTUQbGc0lhvRcWmOcrRFZPS5g== X-Google-Smtp-Source: AA6agR7kQU2ocxwQ/Cai+MbFUu/8SlH1bzq7WVezmo7ITSiHn7Qt9iKeU6wL3RQsaEtzWydR5SgV1A== X-Received: by 2002:a2e:95d6:0:b0:261:c435:80d8 with SMTP id y22-20020a2e95d6000000b00261c43580d8mr3831416ljh.196.1661199490806; Mon, 22 Aug 2022 13:18:10 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h16-20020a2e5310000000b0025e5cd1620fsm2000429ljb.57.2022.08.22.13.18.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 13:18:10 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v3 1/9] dt-bindings: display/msm: split qcom,mdss bindings Date: Mon, 22 Aug 2022 23:18:00 +0300 Message-Id: <20220822201808.347783-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220822201808.347783-1-dmitry.baryshkov@linaro.org> References: <20220822201808.347783-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Split Mobile Display SubSystem (MDSS) root node bindings to the separate yaml file. Changes to the existing (txt) schema: - Added optional "vbif_nrt_phys" region used by msm8996 - Made "bus" and "vsync" clocks optional (they are not used by some platforms) - Added (optional) "core" clock added recently to the mdss driver - Added optional resets property referencing MDSS reset - Defined child nodes pointing to corresponding reference schema. - Dropped the "lut" clock. It was added to the schema by mistake (it is a part of mdp4 schema, not the mdss). Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/display/msm/mdp5.txt | 30 +--- .../devicetree/bindings/display/msm/mdss.yaml | 161 ++++++++++++++++++ 2 files changed, 162 insertions(+), 29 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/mdss.yaml diff --git a/Documentation/devicetree/bindings/display/msm/mdp5.txt b/Documentation/devicetree/bindings/display/msm/mdp5.txt index 43d11279c925..65d03c58dee6 100644 --- a/Documentation/devicetree/bindings/display/msm/mdp5.txt +++ b/Documentation/devicetree/bindings/display/msm/mdp5.txt @@ -2,37 +2,9 @@ Qualcomm adreno/snapdragon MDP5 display controller Description: -This is the bindings documentation for the Mobile Display Subsytem(MDSS) that -encapsulates sub-blocks like MDP5, DSI, HDMI, eDP etc, and the MDP5 display +This is the bindings documentation for the MDP5 display controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 and MSM8996. -MDSS: -Required properties: -- compatible: - * "qcom,mdss" - MDSS -- reg: Physical base address and length of the controller's registers. -- reg-names: The names of register regions. The following regions are required: - * "mdss_phys" - * "vbif_phys" -- interrupts: The interrupt signal from MDSS. -- interrupt-controller: identifies the node as an interrupt controller. -- #interrupt-cells: specifies the number of cells needed to encode an interrupt - source, should be 1. -- power-domains: a power domain consumer specifier according to - Documentation/devicetree/bindings/power/power_domain.txt -- clocks: device clocks. See ../clocks/clock-bindings.txt for details. -- clock-names: the following clocks are required. - * "iface" - * "bus" - * "vsync" -- #address-cells: number of address cells for the MDSS children. Should be 1. -- #size-cells: Should be 1. -- ranges: parent bus address space is the same as the child bus address space. - -Optional properties: -- clock-names: the following clocks are optional: - * "lut" - MDP5: Required properties: - compatible: diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml new file mode 100644 index 000000000000..6a8ec8310f6f --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml @@ -0,0 +1,161 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/mdss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Mobile Display SubSystem (MDSS) + +maintainers: + - Dmitry Baryshkov + - Rob Clark + +description: + This is the bindings documentation for the Mobile Display Subsytem(MDSS) that + encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc. + +properties: + compatible: + enum: + - qcom,mdss + + reg: + minItems: 2 + maxItems: 3 + + reg-names: + minItems: 2 + items: + - const: mdss_phys + - const: vbif_phys + - const: vbif_nrt_phys + + interrupts: + maxItems: 1 + + interrupt-controller: + true + + "#interrupt-cells": + const: 1 + + power-domains: + maxItems: 1 + description: | + The MDSS power domain provided by GCC + + clocks: + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: + true + + resets: + items: + - description: MDSS_CORE reset + +oneOf: + - properties: + clocks: + minItems: 3 + maxItems: 4 + + clock-names: + minItems: 3 + items: + - const: iface + - const: bus + - const: vsync + - const: core + - properties: + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + items: + - const: iface + - const: core + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-controller + - "#interrupt-cells" + - power-domains + - clocks + - clock-names + - "#address-cells" + - "#size-cells" + - ranges + +patternProperties: + "^mdp@[1-9a-f][0-9a-f]*$": + type: object + # TODO: add reference once the mdp5 is converted + + "^dsi@[1-9a-f][0-9a-f]*$": + $ref: dsi-controller-main.yaml# + + "^dsi-phy@[1-9a-f][0-9a-f]*$": + oneOf: + - $ref: dsi-phy-28nm.yaml# + - $ref: dsi-phy-20nm.yaml# + - $ref: dsi-phy-14nm.yaml# + - $ref: dsi-phy-10nm.yaml# + - $ref: dsi-phy-7nm.yaml# + + "^hdmi-phy@[1-9a-f][0-9a-f]*$": + oneOf: + - $ref: /schemas/phy/qcom,hdmi-phy-qmp.yaml# + - $ref: /schemas/phy/qcom,hdmi-phy-other.yaml# + + "^hdmi-tx@[1-9a-f][0-9a-f]*$": + $ref: hdmi.yaml# + +additionalProperties: false + +examples: + - | + #include + #include + mdss@1a00000 { + compatible = "qcom,mdss"; + reg = <0x1a00000 0x1000>, + <0x1ac8000 0x3000>; + reg-names = "mdss_phys", "vbif_phys"; + + power-domains = <&gcc MDSS_GDSC>; + + clocks = <&gcc GCC_MDSS_AHB_CLK>, + <&gcc GCC_MDSS_AXI_CLK>, + <&gcc GCC_MDSS_VSYNC_CLK>; + clock-names = "iface", + "bus", + "vsync"; + + interrupts = ; + + interrupt-controller; + #interrupt-cells = <1>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + }; +... 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Reviewed-by: Rob Herring Signed-off-by: Dmitry Baryshkov --- .../bindings/display/msm/dpu-sc7280.yaml | 148 +++++------------- .../devicetree/bindings/display/msm/mdss.yaml | 19 +++ 2 files changed, 57 insertions(+), 110 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml index f427eec3d3a4..349a454099ad 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml @@ -10,149 +10,77 @@ maintainers: - Krishna Manikandan description: | - Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates - sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree - bindings of MDSS and DPU are mentioned for SC7280. + Device tree bindings for the DPU display controller for SC7280 target. properties: compatible: - const: qcom,sc7280-mdss + const: qcom,sc7280-dpu reg: - maxItems: 1 + items: + - description: Address offset and size for mdp register set + - description: Address offset and size for vbif register set reg-names: - const: mdss - - power-domains: - maxItems: 1 + items: + - const: mdp + - const: vbif clocks: items: - - description: Display AHB clock from gcc - - description: Display AHB clock from dispcc + - description: Display hf axi clock + - description: Display sf axi clock + - description: Display ahb clock + - description: Display lut clock - description: Display core clock + - description: Display vsync clock clock-names: items: + - const: bus + - const: nrt_bus - const: iface - - const: ahb + - const: lut - const: core + - const: vsync interrupts: maxItems: 1 - interrupt-controller: true - - "#address-cells": true - - "#size-cells": true - - "#interrupt-cells": - const: 1 - - iommus: - items: - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0 - - ranges: true - - interconnects: - items: - - description: Interconnect path specifying the port ids for data bus - - interconnect-names: - const: mdp0-mem + power-domains: + maxItems: 1 - resets: - items: - - description: MDSS_CORE reset + operating-points-v2: true -patternProperties: - "^display-controller@[0-9a-f]+$": - type: object - description: Node containing the properties of DPU. + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: | + Contains the list of output ports from DPU device. These ports + connect to interfaces that are external to the DPU hardware, + such as DSI, DP etc. Each output port contains an endpoint that + describes how it is connected to an external interface. properties: - compatible: - const: qcom,sc7280-dpu - - reg: - items: - - description: Address offset and size for mdp register set - - description: Address offset and size for vbif register set - - reg-names: - items: - - const: mdp - - const: vbif - - clocks: - items: - - description: Display hf axi clock - - description: Display sf axi clock - - description: Display ahb clock - - description: Display lut clock - - description: Display core clock - - description: Display vsync clock - - clock-names: - items: - - const: bus - - const: nrt_bus - - const: iface - - const: lut - - const: core - - const: vsync - - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - operating-points-v2: true - - ports: - $ref: /schemas/graph.yaml#/properties/ports - description: | - Contains the list of output ports from DPU device. These ports - connect to interfaces that are external to the DPU hardware, - such as DSI, DP etc. Each output port contains an endpoint that - describes how it is connected to an external interface. - - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF1 (DSI) - - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF5 (EDP) - - required: - - port@0 + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: DPU_INTF1 (DSI) + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: DPU_INTF5 (EDP) required: - - compatible - - reg - - reg-names - - clocks - - interrupts - - power-domains - - operating-points-v2 - - ports + - port@0 required: - compatible - reg - reg-names - - power-domains - clocks - interrupts - - interrupt-controller - - iommus - - ranges + - power-domains + - operating-points-v2 + - ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml index ef1a4b1f7949..25815acd37f3 100644 --- a/Documentation/devicetree/bindings/display/msm/mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml @@ -18,6 +18,7 @@ properties: compatible: enum: - qcom,sc7180-mdss + - qcom,sc7280-mdss - qcom,sdm845-mdss - qcom,mdss @@ -167,6 +168,7 @@ allOf: contains: enum: - qcom,sc7180-mdss + - qcom,sc7280-mdss then: properties: clocks: @@ -206,6 +208,7 @@ patternProperties: "^display-controller@[1-9a-f][0-9a-f]*$": oneOf: - $ref: dpu-sc7180.yaml + - $ref: dpu-sc7280.yaml - $ref: dpu-sdm845.yaml "^displayport-controller@[1-9a-f][0-9a-f]*$": @@ -229,6 +232,14 @@ patternProperties: - $ref: dsi-phy-10nm.yaml# - $ref: dsi-phy-7nm.yaml# + "^edp@[1-9a-f][0-9a-f]*$": + type: object + properties: + compatible: + enum: + - qcom,sc7280-edp + - qcom,sc8180x-edp + "^hdmi-phy@[1-9a-f][0-9a-f]*$": oneOf: - $ref: /schemas/phy/qcom,hdmi-phy-qmp.yaml# @@ -237,6 +248,14 @@ patternProperties: "^hdmi-tx@[1-9a-f][0-9a-f]*$": $ref: hdmi.yaml# + "^phy@[1-9a-f][0-9a-f]*$": + type: object + properties: + compatible: + enum: + - qcom,sc7280-dsi-phy-7nm + - qcom,sc7280-edp-phy + additionalProperties: false examples: From patchwork Mon Aug 22 20:18:04 2022 Content-Type: text/plain; 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Mon, 22 Aug 2022 13:18:14 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h16-20020a2e5310000000b0025e5cd1620fsm2000429ljb.57.2022.08.22.13.18.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 13:18:14 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Rob Herring Subject: [PATCH v3 5/9] dt-bindings: display/msm: move qcom,qcm2290-mdss schema to mdss.yaml Date: Mon, 22 Aug 2022 23:18:04 +0300 Message-Id: <20220822201808.347783-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220822201808.347783-1-dmitry.baryshkov@linaro.org> References: <20220822201808.347783-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move schema for qcom,qcm2290-mdss from dpu-qcm2290.yaml to mdss.yaml so that the dpu file describes only the DPU schema. Reviewed-by: Rob Herring Signed-off-by: Dmitry Baryshkov --- .../bindings/display/msm/dpu-qcm2290.yaml | 140 +++++------------- .../devicetree/bindings/display/msm/mdss.yaml | 24 +++ 2 files changed, 57 insertions(+), 107 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml index 734d14de966d..8027319b1aad 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml @@ -10,146 +10,72 @@ maintainers: - Loic Poulain description: | - Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates - sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS - and DPU are mentioned for QCM2290 target. + Device tree bindings for the DPU display controller for QCM2290 target. properties: compatible: items: - - const: qcom,qcm2290-mdss + - const: qcom,qcm2290-dpu reg: - maxItems: 1 + items: + - description: Address offset and size for mdp register set + - description: Address offset and size for vbif register set reg-names: - const: mdss - - power-domains: - maxItems: 1 + items: + - const: mdp + - const: vbif clocks: items: - - description: Display AHB clock from gcc - - description: Display AXI clock - - description: Display core clock + - description: Display AXI clock from gcc + - description: Display AHB clock from dispcc + - description: Display core clock from dispcc + - description: Display lut clock from dispcc + - description: Display vsync clock from dispcc clock-names: items: - - const: iface - const: bus + - const: iface - const: core + - const: lut + - const: vsync interrupts: maxItems: 1 - interrupt-controller: true - - "#address-cells": true - - "#size-cells": true - - "#interrupt-cells": - const: 1 - - iommus: - items: - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0 - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1 - - ranges: true - - interconnects: - items: - - description: Interconnect path specifying the port ids for data bus - - interconnect-names: - const: mdp0-mem + power-domains: + maxItems: 1 - resets: - items: - - description: MDSS_CORE reset + operating-points-v2: true -patternProperties: - "^display-controller@[0-9a-f]+$": - type: object - description: Node containing the properties of DPU. + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: | + Contains the list of output ports from DPU device. These ports + connect to interfaces that are external to the DPU hardware, + such as DSI. Each output port contains an endpoint that + describes how it is connected to an external interface. properties: - compatible: - items: - - const: qcom,qcm2290-dpu - - reg: - items: - - description: Address offset and size for mdp register set - - description: Address offset and size for vbif register set - - reg-names: - items: - - const: mdp - - const: vbif - - clocks: - items: - - description: Display AXI clock from gcc - - description: Display AHB clock from dispcc - - description: Display core clock from dispcc - - description: Display lut clock from dispcc - - description: Display vsync clock from dispcc - - clock-names: - items: - - const: bus - - const: iface - - const: core - - const: lut - - const: vsync - - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - operating-points-v2: true - - ports: - $ref: /schemas/graph.yaml#/properties/ports - description: | - Contains the list of output ports from DPU device. These ports - connect to interfaces that are external to the DPU hardware, - such as DSI. Each output port contains an endpoint that - describes how it is connected to an external interface. - - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF1 (DSI1) - - required: - - port@0 + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: DPU_INTF1 (DSI1) required: - - compatible - - reg - - reg-names - - clocks - - interrupts - - power-domains - - operating-points-v2 - - ports + - port@0 required: - compatible - reg - reg-names - - power-domains - clocks - interrupts - - interrupt-controller - - iommus - - ranges + - power-domains + - operating-points-v2 + - ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml index 25815acd37f3..8bb7525681de 100644 --- a/Documentation/devicetree/bindings/display/msm/mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml @@ -17,6 +17,7 @@ description: properties: compatible: enum: + - qcom,qcm2290-mdss - qcom,sc7180-mdss - qcom,sc7280-mdss - qcom,sdm845-mdss @@ -142,6 +143,28 @@ allOf: required: - iommus + - if: + properties: + compatible: + contains: + const: qcom,qcm2290-mdss + then: + properties: + clocks: + items: + - description: Display AHB clock from gcc + - description: Display AXI clock + - description: Display core clock + + clock-names: + items: + - const: iface + - const: bus + - const: core + + iommus: + minItems: 2 + - if: properties: compatible: @@ -207,6 +230,7 @@ patternProperties: "^display-controller@[1-9a-f][0-9a-f]*$": oneOf: + - $ref: dpu-qcm2290.yaml - $ref: dpu-sc7180.yaml - $ref: dpu-sc7280.yaml - $ref: dpu-sdm845.yaml From patchwork Mon Aug 22 20:18:06 2022 Content-Type: text/plain; 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Mon, 22 Aug 2022 13:18:17 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h16-20020a2e5310000000b0025e5cd1620fsm2000429ljb.57.2022.08.22.13.18.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 13:18:16 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Rob Herring Subject: [PATCH v3 7/9] dt-bindings: display/mdm: add gcc-bus clock to dpu-smd845 Date: Mon, 22 Aug 2022 23:18:06 +0300 Message-Id: <20220822201808.347783-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220822201808.347783-1-dmitry.baryshkov@linaro.org> References: <20220822201808.347783-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add gcc-bus clock required for the SDM845 DPU device tree node. This change was made in the commit 111c52854102 ("arm64: dts: qcom: sdm845: move bus clock to mdp node for sdm845 target"), but was not reflected in the schema. Reviewed-by: Rob Herring Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/display/msm/dpu-sdm845.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml index 2074e954372f..42ff85e80f45 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml @@ -29,6 +29,7 @@ properties: clocks: items: + - description: Display GCC bus clock - description: Display ahb clock - description: Display axi clock - description: Display core clock @@ -36,6 +37,7 @@ properties: clock-names: items: + - const: gcc-bus - const: iface - const: bus - const: core @@ -114,11 +116,12 @@ examples: <0x0aeb0000 0x2008>; reg-names = "mdp", "vbif"; - clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + clocks = <&gcc GCC_DISP_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, <&dispcc DISP_CC_MDSS_AXI_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>, <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - clock-names = "iface", "bus", "core", "vsync"; + clock-names = "gcc-bus", "iface", "bus", "core", "vsync"; interrupt-parent = <&mdss>; interrupts = <0>; From patchwork Mon Aug 22 20:18:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 599289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6ACFDC48BEA for ; Mon, 22 Aug 2022 20:18:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231355AbiHVUSW (ORCPT ); Mon, 22 Aug 2022 16:18:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45402 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235443AbiHVUSV (ORCPT ); Mon, 22 Aug 2022 16:18:21 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD99164DB for ; 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Note, this removes description of individual DPU port@ nodes. However such definitions add no additional value. The reg values do not correspond to hardware INTF indices. The driver discovers and binds these ports not paying any care for the order of these items. Thus just leave the reference to graph.yaml#/properties/ports and the description. Signed-off-by: Dmitry Baryshkov --- .../bindings/display/msm/dpu-common.yaml | 42 ++++++++++++++++++ .../bindings/display/msm/dpu-msm8998.yaml | 43 ++----------------- .../bindings/display/msm/dpu-qcm2290.yaml | 39 ++--------------- .../bindings/display/msm/dpu-sc7180.yaml | 43 ++----------------- .../bindings/display/msm/dpu-sc7280.yaml | 43 ++----------------- .../bindings/display/msm/dpu-sdm845.yaml | 43 ++----------------- 6 files changed, 62 insertions(+), 191 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-common.yaml diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml new file mode 100644 index 000000000000..14eda883e149 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml @@ -0,0 +1,42 @@ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dpu-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display DPU dt properties (common properties) + +maintainers: + - Dmitry Baryshkov + - Krishna Manikandan + - Rob Clark + +description: | + Common properties for QCom DPU display controller. + +properties: + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + operating-points-v2: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: | + Contains the list of output ports from DPU device. These ports + connect to interfaces that are external to the DPU hardware, + such as DSI, DP etc. + +required: + - compatible + - reg + - reg-names + - clocks + - interrupts + - power-domains + - operating-points-v2 + - ports + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml index 5caf46a1dd88..158bd93a157f 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml @@ -47,45 +47,10 @@ properties: - const: core - const: vsync - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - operating-points-v2: true - ports: - $ref: /schemas/graph.yaml#/properties/ports - description: | - Contains the list of output ports from DPU device. These ports - connect to interfaces that are external to the DPU hardware, - such as DSI, DP etc. Each output port contains an endpoint that - describes how it is connected to an external interface. - - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF1 (DSI1) - - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF2 (DSI2) - - required: - - port@0 - - port@1 - -required: - - compatible - - reg - - reg-names - - clocks - - interrupts - - power-domains - - operating-points-v2 - - ports - -additionalProperties: false +allOf: + - $ref: "/schemas/display/msm/dpu-common.yaml#" + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml index 8027319b1aad..0364261bf3d2 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml @@ -43,41 +43,10 @@ properties: - const: lut - const: vsync - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - operating-points-v2: true - - ports: - $ref: /schemas/graph.yaml#/properties/ports - description: | - Contains the list of output ports from DPU device. These ports - connect to interfaces that are external to the DPU hardware, - such as DSI. Each output port contains an endpoint that - describes how it is connected to an external interface. - - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF1 (DSI1) - - required: - - port@0 - -required: - - compatible - - reg - - reg-names - - clocks - - interrupts - - power-domains - - operating-points-v2 - - ports - -additionalProperties: false +allOf: + - $ref: "/schemas/display/msm/dpu-common.yaml#" + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml index 9d4ec0b60c25..5df1f2d987c9 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml @@ -45,45 +45,10 @@ properties: - const: core - const: vsync - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - operating-points-v2: true - - ports: - $ref: /schemas/graph.yaml#/properties/ports - description: | - Contains the list of output ports from DPU device. These ports - connect to interfaces that are external to the DPU hardware, - such as DSI, DP etc. Each output port contains an endpoint that - describes how it is connected to an external interface. - - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF1 (DSI1) - - port@2: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF0 (DP) - - required: - - port@0 - -required: - - compatible - - reg - - reg-names - - clocks - - interrupts - - power-domains - - operating-points-v2 - - ports - -additionalProperties: false +allOf: + - $ref: "/schemas/display/msm/dpu-common.yaml#" + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml index 349a454099ad..c822da588de0 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml @@ -44,45 +44,10 @@ properties: - const: core - const: vsync - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - operating-points-v2: true - - ports: - $ref: /schemas/graph.yaml#/properties/ports - description: | - Contains the list of output ports from DPU device. These ports - connect to interfaces that are external to the DPU hardware, - such as DSI, DP etc. Each output port contains an endpoint that - describes how it is connected to an external interface. - - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF1 (DSI) - - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF5 (EDP) - - required: - - port@0 - -required: - - compatible - - reg - - reg-names - - clocks - - interrupts - - power-domains - - operating-points-v2 - - ports - -additionalProperties: false +allOf: + - $ref: "/schemas/display/msm/dpu-common.yaml#" + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml index 42ff85e80f45..218c9d0f3fed 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml @@ -43,45 +43,10 @@ properties: - const: core - const: vsync - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - operating-points-v2: true - ports: - $ref: /schemas/graph.yaml#/properties/ports - description: | - Contains the list of output ports from DPU device. These ports - connect to interfaces that are external to the DPU hardware, - such as DSI, DP etc. Each output port contains an endpoint that - describes how it is connected to an external interface. - - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF1 (DSI1) - - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF2 (DSI2) - - required: - - port@0 - - port@1 - -required: - - compatible - - reg - - reg-names - - clocks - - interrupts - - power-domains - - operating-points-v2 - - ports - -additionalProperties: false +allOf: + - $ref: "/schemas/display/msm/dpu-common.yaml#" + +unevaluatedProperties: false examples: - |