From patchwork Tue Feb 5 23:24:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 157538 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp5755122jaa; Tue, 5 Feb 2019 15:25:11 -0800 (PST) X-Google-Smtp-Source: AHgI3IbVrPWbpixUcCTI+jxeOgTUAwbzu8/hUNvPGxs2kzEukOEBLUahVWqPun1jR4T/hsfXLlXv X-Received: by 2002:a17:902:4222:: with SMTP id g31mr7584616pld.240.1549409111346; Tue, 05 Feb 2019 15:25:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549409111; cv=none; d=google.com; s=arc-20160816; b=bQop8e1c/3rUSF6DF3kwVgxyBQzgz82K8TPkKw9PnrT6yCqKMsfx9dx2akgm81G6/l iuZLp2YbmrFCiV3zrZvc53tEVGbL7Acz1Iyk9tFkXsn1iyBtks2X2Ursgn83WAGFT59y eg8cdPB4izKXrLuM50f8bwp9D5rhBfoBlyj6gTNvAor2QzjDxsIS4ZwQSn7VsT/qe+SI 22kq5k4YRtFXPPWl6vMXope956NlJvs6Voe/Tns4Vu+gdXsQPuqJToFOf7F7Vws0iapK 97uptevM7DLWlGAfch8WIeQRS9OKQF4SIQfFJPsTg5skpP2yAQqR1Y2rYvtqfidbu5Ka 3+Jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=Ccqi0PrQP2++Gk2Iw5QSemotnIhaAp8U4DdCM+tifrE=; b=vA3cS1fXdF3yI/tRqAD3e1Gx5U38dVocf6u8kJELG7YFZnp+6QBmvYyKZjaN69dqPg Ku5ilBaOLEYW2iQLt/n687iwmBBDWEyXJybLXFt1QXRFQX3CW1jhcTs20UuMEOgMdT7w FLCD5OrPAG5P2sApcDi7Nnad37OsnoY1l3W0vLAHtxZ+5gmtNXebAbVFInn187OJR0hF esrHwkr8hBhTvxaitW11S/sP448i4SJUzEd/vrfKr5VaSCWzxRgZoNGO8dZPNi9RPwo7 ub4ApAEsLhKNAPAn6XgnxGU259aU9opcTGzFadyXtFHV+n5eBqXYJeJQOKU5VgiKiqAT ZOtA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LK6FWzrI; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id g136sm5926917pfb.154.2019.02.05.15.25.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Feb 2019 15:25:00 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/6] coresight: cpu-debug: Support for CA73 CPUs Date: Tue, 5 Feb 2019 16:24:53 -0700 Message-Id: <20190205232458.7074-2-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190205232458.7074-1-mathieu.poirier@linaro.org> References: <20190205232458.7074-1-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Leo Yan This patch is to add the AMBA device ID for CA73 CPU, so that CPU debug module can be initialized successfully when a SoC contain CA73 CPUs. This patch has been verified on 96boards Hikey960. Signed-off-by: Leo Yan Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-cpu-debug.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.17.1 diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hwtracing/coresight/coresight-cpu-debug.c index 45b2460f3166..e8819d750938 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -668,6 +668,10 @@ static const struct amba_id debug_ids[] = { .id = 0x000bbd08, .mask = 0x000fffff, }, + { /* Debug for Cortex-A73 */ + .id = 0x000bbd09, + .mask = 0x000fffff, + }, { 0, 0 }, }; From patchwork Tue Feb 5 23:24:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 157543 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp5755410jaa; Tue, 5 Feb 2019 15:25:30 -0800 (PST) X-Google-Smtp-Source: AHgI3IaOdgpcGX/hX7qKJxMaUOcWPpx2mN142eEv+APnzpEwUInA3qXQwICeOEwwrkB7Ycr9I7hM X-Received: by 2002:a17:902:28e6:: with SMTP id f93mr7559919plb.239.1549409129951; Tue, 05 Feb 2019 15:25:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549409129; cv=none; d=google.com; s=arc-20160816; b=XpqJ5A0Rz87F2azK8U7uz+gPBuP/0jpCu+7vG4ChzhNaY1Vp2mMMuda8pflueeW1KP cpDIINakcIFd+qiG2OvATj2ERAYR9IvbY8o53WoU50W9X46HUlKJ2coK5adgkuSzXjl0 CQlHjwM7pcNRlwwuGfc2zg3aJlhf7LQyd032hh4fUCvWZuMUCFAiQWspldlrYYosFRca cy1wUEeEXq7xgcGm7mQ3q+9JEMHPM3XJfIM/vd2wmEPnBjZhJ+6Pnldd2MJhNRkeXj8Q 0J61ep3OQ4raT2Klx9tVTdPayXzZfcKds6KwZFJxiHNrtMRd1UL4/rYRCM7DACqnqjty l6Ew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=e6pkWcYABKD3ejWDgmD7yJDvlBAzURnOywHEGbKPVIw=; b=RwU+XATKlGLGGKIdKKGmQdq9fuRSuNapHbCF3qwWJrLl2yG+u5oCtFzLSYdR8b8NIH XNLDpAL2jqOnhDWq9jnLpGDhWKg7hdlxH+JKDGbek2AA56/GxEUyq7o12HCsvvAgkvHk nbOgkhNjB4joXdE9vldlUA3t8SM7Tx1iTZQ55F5567NEjAGwIavu1odxT87lChLUzIw5 IH2mg4HlXiosyFe9BwfWeTSm7BH6HDjyGOrfzHNeo7KB9ajkVsZScuifu4LT+1tg4vly Om7LT9BqVLDOWY9xFbTLYVgrVthxMeLjL1yWwEpgenBlEZ83RD4gwPdCjhdZMJJfiF34 7jvw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x+rHdm2H; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id g136sm5926917pfb.154.2019.02.05.15.25.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Feb 2019 15:25:02 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/6] coresight: stm: Remove set but not used variable 'res_size' Date: Tue, 5 Feb 2019 16:24:54 -0700 Message-Id: <20190205232458.7074-3-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190205232458.7074-1-mathieu.poirier@linaro.org> References: <20190205232458.7074-1-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: YueHaibing Fixes gcc '-Wunused-but-set-variable' warning: drivers/hwtracing/coresight/coresight-stm.c: In function 'stm_probe': drivers/hwtracing/coresight/coresight-stm.c:796:9: warning: variable 'res_size' set but not used [-Wunused-but-set-variable] It never used since introduction in commit 237483aa5cf4 ("coresight: stm: adding driver for CoreSight STM component") Signed-off-by: YueHaibing Tested-by: Leo Yan Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-stm.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) -- 2.17.1 diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c index ef339ff22090..f07825df5c7a 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -793,7 +793,7 @@ static int stm_probe(struct amba_device *adev, const struct amba_id *id) struct stm_drvdata *drvdata; struct resource *res = &adev->res; struct resource ch_res; - size_t res_size, bitmap_size; + size_t bitmap_size; struct coresight_desc desc = { 0 }; struct device_node *np = adev->dev.of_node; @@ -833,15 +833,11 @@ static int stm_probe(struct amba_device *adev, const struct amba_id *id) drvdata->write_bytes = stm_fundamental_data_size(drvdata); - if (boot_nr_channel) { + if (boot_nr_channel) drvdata->numsp = boot_nr_channel; - res_size = min((resource_size_t)(boot_nr_channel * - BYTES_PER_CHANNEL), resource_size(res)); - } else { + else drvdata->numsp = stm_num_stimulus_port(drvdata); - res_size = min((resource_size_t)(drvdata->numsp * - BYTES_PER_CHANNEL), resource_size(res)); - } + bitmap_size = BITS_TO_LONGS(drvdata->numsp) * sizeof(long); guaranteed = devm_kzalloc(dev, bitmap_size, GFP_KERNEL); From patchwork Tue Feb 5 23:24:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 157539 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp5755134jaa; Tue, 5 Feb 2019 15:25:11 -0800 (PST) X-Google-Smtp-Source: AHgI3IY8Kol5GBlUWSsHO5GHqKTMFaZPnAVOVELHwxl15Ip3wFsDC3YbEG7U458g1DeddUkXg8O2 X-Received: by 2002:a63:26c1:: with SMTP id m184mr6384969pgm.367.1549409111715; Tue, 05 Feb 2019 15:25:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549409111; cv=none; d=google.com; s=arc-20160816; b=iaUNTclgcHnOs0FDPUBu6rv6Xi3gMxN+JgaCOSOQ/DEXFQfIk6X7WR4w67HgKQTCBz 2lOaDIdMNjc9xikubxiw5r9+96DuhfZg8bviw7gEZSHRd1AcBkUDCW460saTUlkKhzbQ KepkyM1ibx2cRN1D/isJ2jyBFHO5DHwPP10Qkn02VkhiUDTowWNw6SNduMHg4i8rac2n Gywnt+NYEKXmXw0D5t2WXUTiI9AqxiHey3/08kcRNIr/pmic57ojJp0NF72DjM76jczF V2Lg7rBu1LdlmEQ1jtt8cqFZbunpFcYfYT1/nUROnWjWhlOjpXBB5nad0ZVz7qvbheAN zItg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=WNp4gohR0kMr5GUi8PqSACf2MyhhTlb9SKT3Z79/9T4=; b=RwMufulwiBMWhEq/GfzUoWXAq5E13a+rIF5ZUp038SJXxK3iCC6ULElXi6tLAuIDy+ om5w1DaE+/2sPW4RRR9re/pYHSDw5c7MyMHNHD7tqicMl9Kk1atAtVC91WG/bdyIu7tf Hr1dyQoDpBFyUg5I6viUSFSVr2EEhQqktcBgPxgsa6Rt1U0Pj0nYYFRQ+XhHyRUwEzgt vqdotfaIbckKYift8N53sZmrtT1sGte3b84WXDLyP8N8qHC2JnvFLVHFm4+LXOBqsYCp kDBMdRjli0AoW/StrNMNhwXv379nn8yGR276C/ZsHLBKU39OZKUe8eDlMMO21ynBTdTP lKsw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CTFmUd1N; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id g136sm5926917pfb.154.2019.02.05.15.25.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Feb 2019 15:25:03 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/6] coresight: Use of_node_name_eq for node name comparisons Date: Tue, 5 Feb 2019 16:24:55 -0700 Message-Id: <20190205232458.7074-4-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190205232458.7074-1-mathieu.poirier@linaro.org> References: <20190205232458.7074-1-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rob Herring Convert string compares of DT node names to use of_node_name_eq helper instead. This removes direct access to the node name pointer. Cc: Mathieu Poirier Cc: Alexander Shishkin Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/of_coresight.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index 89092f83567e..7045930fc958 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -80,8 +80,8 @@ static struct device_node *of_coresight_get_port_parent(struct device_node *ep) * Skip one-level up to the real device node, if we * are using the new bindings. */ - if (!of_node_cmp(parent->name, "in-ports") || - !of_node_cmp(parent->name, "out-ports")) + if (of_node_name_eq(parent, "in-ports") || + of_node_name_eq(parent, "out-ports")) parent = of_get_next_parent(parent); return parent; From patchwork Tue Feb 5 23:24:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 157542 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp5755318jaa; Tue, 5 Feb 2019 15:25:23 -0800 (PST) X-Google-Smtp-Source: AHgI3IY0dnuXwVmfwRh9IIQqoJuovSSx/3kwdfgCTmCr7CYiXg/l4MdO95ugAXhpyY0MfuktkizQ X-Received: by 2002:a65:47ca:: with SMTP id f10mr6987367pgs.166.1549409123658; Tue, 05 Feb 2019 15:25:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549409123; cv=none; d=google.com; s=arc-20160816; b=mzUpWgFmS30S51ARPWU7ex08lXlg8u7Zq+d3zVsrcYtZeun/8RtMJ5Zddx7PjHsGin D6Zf8fDAXit32nPr4a4VKeROAQvJJjlUzx3hJt0l6T8wdakGGSbw8rbpsqjxdF/+AxiB C51XxKsnCg5I246blhxczPz+2IUubF97Bi+eQLvVgd1qjn2kcc4GxvPYY09+JoI1yWct k2MzcIgUZcD0WcLv+Yx/9TMIX4JMHVQ1BxnpIp3yAKE2Zk8cmlYpiXcU6EmT50bXD05Q /Ug1LJNd7xVMo//DeMY9iM3sJtIOiCJcsNIY5NPUMrwfLF3CyW/voimvBZv79IvIpGjn Gmiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=MDOVaEZRoG9B5WvSdx3N1/m5BAdIo/VwcdxFaAGLjXA=; b=mcIIvmsKao9DtlDo1asRkZAABE6bKIeNJ9uP+BxfkAZcfVmV5EjGEEQ4vlvLrEwSIj JJGLipMA/ZWXcS9utzn3gGdvEgSFiduRxOiywuNd3CbL7An/y22lUO4Cpw3erzssDIrI Eb1L9rRlsYwv68IGrQeoHjhkSwXt/tN7aQlT8QPuaJyvuVAfpS5mrOfahSnyD4Puse+N kcKtgJ1W59rTl3+ozshCUVwMTiAaxXGRCHhM9Ro37eUDthwOspoV5dHEcVtlA2gjSW1B UerTKLVSSjuWZXyMMX/hkefFwjoqhyP7coZJlJTJNOJi+pGEnPM/FzdmCWCzReMxfJPN fREA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sFZuH6s6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id g136sm5926917pfb.154.2019.02.05.15.25.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Feb 2019 15:25:04 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/6] perf/aux: Make perf_event accessible to setup_aux() Date: Tue, 5 Feb 2019 16:24:56 -0700 Message-Id: <20190205232458.7074-5-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190205232458.7074-1-mathieu.poirier@linaro.org> References: <20190205232458.7074-1-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When pmu::setup_aux() is called the coresight PMU needs to know which sink to use for the session by looking up the information in the event's attr::config2 field. As such simply replace the cpu information by the complete perf_event structure and change all affected customers. Signed-off-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose Acked-by: Peter Zijlstra (Intel) --- arch/s390/kernel/perf_cpum_sf.c | 6 +++--- arch/x86/events/intel/bts.c | 4 +++- arch/x86/events/intel/pt.c | 5 +++-- drivers/hwtracing/coresight/coresight-etm-perf.c | 6 +++--- drivers/perf/arm_spe_pmu.c | 6 +++--- include/linux/perf_event.h | 2 +- kernel/events/ring_buffer.c | 2 +- 7 files changed, 17 insertions(+), 14 deletions(-) -- 2.17.1 diff --git a/arch/s390/kernel/perf_cpum_sf.c b/arch/s390/kernel/perf_cpum_sf.c index bfabeb1889cc..1266194afb02 100644 --- a/arch/s390/kernel/perf_cpum_sf.c +++ b/arch/s390/kernel/perf_cpum_sf.c @@ -1600,7 +1600,7 @@ static void aux_sdb_init(unsigned long sdb) /* * aux_buffer_setup() - Setup AUX buffer for diagnostic mode sampling - * @cpu: On which to allocate, -1 means current + * @event: Event the buffer is setup for, event->cpu == -1 means current * @pages: Array of pointers to buffer pages passed from perf core * @nr_pages: Total pages * @snapshot: Flag for snapshot mode @@ -1612,8 +1612,8 @@ static void aux_sdb_init(unsigned long sdb) * * Return the private AUX buffer structure if success or NULL if fails. */ -static void *aux_buffer_setup(int cpu, void **pages, int nr_pages, - bool snapshot) +static void *aux_buffer_setup(struct perf_event *event, void **pages, + int nr_pages, bool snapshot) { struct sf_buffer *sfb; struct aux_buffer *aux; diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c index a01ef1b0f883..7cdd7b13bbda 100644 --- a/arch/x86/events/intel/bts.c +++ b/arch/x86/events/intel/bts.c @@ -77,10 +77,12 @@ static size_t buf_size(struct page *page) } static void * -bts_buffer_setup_aux(int cpu, void **pages, int nr_pages, bool overwrite) +bts_buffer_setup_aux(struct perf_event *event, void **pages, + int nr_pages, bool overwrite) { struct bts_buffer *buf; struct page *page; + int cpu = event->cpu; int node = (cpu == -1) ? cpu : cpu_to_node(cpu); unsigned long offset; size_t size = nr_pages << PAGE_SHIFT; diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c index 9494ca68fd9d..c0e86ff21f81 100644 --- a/arch/x86/events/intel/pt.c +++ b/arch/x86/events/intel/pt.c @@ -1114,10 +1114,11 @@ static int pt_buffer_init_topa(struct pt_buffer *buf, unsigned long nr_pages, * Return: Our private PT buffer structure. */ static void * -pt_buffer_setup_aux(int cpu, void **pages, int nr_pages, bool snapshot) +pt_buffer_setup_aux(struct perf_event *event, void **pages, + int nr_pages, bool snapshot) { struct pt_buffer *buf; - int node, ret; + int node, ret, cpu = event->cpu; if (!nr_pages) return NULL; diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index abe8249b893b..f21eb28b6782 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -177,15 +177,15 @@ static void etm_free_aux(void *data) schedule_work(&event_data->work); } -static void *etm_setup_aux(int event_cpu, void **pages, +static void *etm_setup_aux(struct perf_event *event, void **pages, int nr_pages, bool overwrite) { - int cpu; + int cpu = event->cpu; cpumask_t *mask; struct coresight_device *sink; struct etm_event_data *event_data = NULL; - event_data = alloc_event_data(event_cpu); + event_data = alloc_event_data(cpu); if (!event_data) return NULL; INIT_WORK(&event_data->work, free_event_data); diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c index 8e46a9dad2fa..7cb766dafe85 100644 --- a/drivers/perf/arm_spe_pmu.c +++ b/drivers/perf/arm_spe_pmu.c @@ -824,10 +824,10 @@ static void arm_spe_pmu_read(struct perf_event *event) { } -static void *arm_spe_pmu_setup_aux(int cpu, void **pages, int nr_pages, - bool snapshot) +static void *arm_spe_pmu_setup_aux(struct perf_event *event, void **pages, + int nr_pages, bool snapshot) { - int i; + int i, cpu = event->cpu; struct page **pglist; struct arm_spe_pmu_buf *buf; diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 1d5c551a5add..3e49b2144808 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -409,7 +409,7 @@ struct pmu { /* * Set up pmu-private data structures for an AUX area */ - void *(*setup_aux) (int cpu, void **pages, + void *(*setup_aux) (struct perf_event *event, void **pages, int nr_pages, bool overwrite); /* optional */ diff --git a/kernel/events/ring_buffer.c b/kernel/events/ring_buffer.c index 4a9937076331..857308295f63 100644 --- a/kernel/events/ring_buffer.c +++ b/kernel/events/ring_buffer.c @@ -658,7 +658,7 @@ int rb_alloc_aux(struct ring_buffer *rb, struct perf_event *event, goto out; } - rb->aux_priv = event->pmu->setup_aux(event->cpu, rb->aux_pages, nr_pages, + rb->aux_priv = event->pmu->setup_aux(event, rb->aux_pages, nr_pages, overwrite); if (!rb->aux_priv) goto out; From patchwork Tue Feb 5 23:24:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 157541 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp5755222jaa; Tue, 5 Feb 2019 15:25:16 -0800 (PST) X-Google-Smtp-Source: AHgI3Ib18OK3vxXk+cwBkzqBS7mtj6vlqwfRBaGXLLbdnOCtnChaF6NJuEeWdW6BwoiIn76BMyHZ X-Received: by 2002:a63:4706:: with SMTP id u6mr6535457pga.95.1549409116839; Tue, 05 Feb 2019 15:25:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549409116; cv=none; d=google.com; s=arc-20160816; b=swQjoFjo88GIPh7QuoLwSkQXugj6q5XnvSz/GsFzUAsZDhHMH6+zl1TXxUMM6+1d7t BfuTVOIEztO8DT+0egp3URbVa/6IDUqtIsktQAfX+9QG4O/iIcuCYh2hvXqXmUzcI20p POJGpYfXgl6bFoIvEN1wnXvLuNP1VYHvjmn+jOhJJRDhAvKDqB3eAs3LdUO2z7lGgKgA ZeJg2xwGezOZvZGjztFPp1SUF5Gmw6826qFIuLAxVl9bwsozNX1iJ8l4MjXmo03qCitM UHdISLH8q9Mf+ZGLGZuT/lIIqHXDeXSd+GrcVyYKtMSZaEck3mxsDlNQYmXjsQr2HrdX dFKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=T/vUeT1ORrN3V6Xm/Q75X5Mtmayi18DWRftVV4tUDww=; b=N1DZzlgJulIqI8RSdXQNzLjWSr4XLg+kZ70I0tU69uX8Z0YLJ4TxQOZLR2pC3lqwmc MBdihBZxOXfSKVCghkVLvhILZhnAsxQ5yqX9HQh6udIwdFsfbffWLQpumcYZ43CRmWiM Ewweoi2n4IcZBNuUsx7kKgD+S+sHNqgoj9LPKgvOyUrRS4SanZ+GYp3sNe2/cnvE5AiD NQAcDx0BG2fj8wTTAhFVVvj7wxNtat6kncSUFgdf+ZYHkAMINK6RXENmwstRUWgEC3Va Pc4Hyp34Ja2jluf5n6I4Sx8b0xWHmkCy+7+lEpcAX+637z5sHzlQLXuEMefjN625GfoM mn5g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bstSTAmY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id g136sm5926917pfb.154.2019.02.05.15.25.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Feb 2019 15:25:05 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/6] coresight: perf: Add "sinks" group to PMU directory Date: Tue, 5 Feb 2019 16:24:57 -0700 Message-Id: <20190205232458.7074-6-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190205232458.7074-1-mathieu.poirier@linaro.org> References: <20190205232458.7074-1-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a "sinks" directory entry so that users can see all the sinks available in the system in a single place. Individual sink are added as they are registered with the coresight bus. Signed-off-by: Mathieu Poirier Acked-by: Peter Zijlstra (Intel) Reviewed-by: Suzuki K Poulose --- .../hwtracing/coresight/coresight-etm-perf.c | 82 +++++++++++++++++++ .../hwtracing/coresight/coresight-etm-perf.h | 6 +- drivers/hwtracing/coresight/coresight.c | 18 ++++ include/linux/coresight.h | 7 +- 4 files changed, 110 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index f21eb28b6782..cdbdb28dc175 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -43,8 +44,18 @@ static const struct attribute_group etm_pmu_format_group = { .attrs = etm_config_formats_attr, }; +static struct attribute *etm_config_sinks_attr[] = { + NULL, +}; + +static const struct attribute_group etm_pmu_sinks_group = { + .name = "sinks", + .attrs = etm_config_sinks_attr, +}; + static const struct attribute_group *etm_pmu_attr_groups[] = { &etm_pmu_format_group, + &etm_pmu_sinks_group, NULL, }; @@ -479,6 +490,77 @@ int etm_perf_symlink(struct coresight_device *csdev, bool link) return 0; } +static ssize_t etm_perf_sink_name_show(struct device *dev, + struct device_attribute *dattr, + char *buf) +{ + struct dev_ext_attribute *ea; + + ea = container_of(dattr, struct dev_ext_attribute, attr); + return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var)); +} + +int etm_perf_add_symlink_sink(struct coresight_device *csdev) +{ + int ret; + unsigned long hash; + const char *name; + struct device *pmu_dev = etm_pmu.dev; + struct device *pdev = csdev->dev.parent; + struct dev_ext_attribute *ea; + + if (csdev->type != CORESIGHT_DEV_TYPE_SINK && + csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) + return -EINVAL; + + if (csdev->ea != NULL) + return -EINVAL; + + if (!etm_perf_up) + return -EPROBE_DEFER; + + ea = devm_kzalloc(pdev, sizeof(*ea), GFP_KERNEL); + if (!ea) + return -ENOMEM; + + name = dev_name(pdev); + /* See function coresight_get_sink_by_id() to know where this is used */ + hash = hashlen_hash(hashlen_string(NULL, name)); + + ea->attr.attr.name = devm_kstrdup(pdev, name, GFP_KERNEL); + if (!ea->attr.attr.name) + return -ENOMEM; + + ea->attr.attr.mode = 0444; + ea->attr.show = etm_perf_sink_name_show; + ea->var = (unsigned long *)hash; + + ret = sysfs_add_file_to_group(&pmu_dev->kobj, + &ea->attr.attr, "sinks"); + + if (!ret) + csdev->ea = ea; + + return ret; +} + +void etm_perf_del_symlink_sink(struct coresight_device *csdev) +{ + struct device *pmu_dev = etm_pmu.dev; + struct dev_ext_attribute *ea = csdev->ea; + + if (csdev->type != CORESIGHT_DEV_TYPE_SINK && + csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) + return; + + if (!ea) + return; + + sysfs_remove_file_from_group(&pmu_dev->kobj, + &ea->attr.attr, "sinks"); + csdev->ea = NULL; +} + static int __init etm_perf_init(void) { int ret; diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h index da7d9336a15c..015213abe00a 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.h +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h @@ -59,6 +59,8 @@ struct etm_event_data { #ifdef CONFIG_CORESIGHT int etm_perf_symlink(struct coresight_device *csdev, bool link); +int etm_perf_add_symlink_sink(struct coresight_device *csdev); +void etm_perf_del_symlink_sink(struct coresight_device *csdev); static inline void *etm_perf_sink_config(struct perf_output_handle *handle) { struct etm_event_data *data = perf_get_aux(handle); @@ -70,7 +72,9 @@ static inline void *etm_perf_sink_config(struct perf_output_handle *handle) #else static inline int etm_perf_symlink(struct coresight_device *csdev, bool link) { return -EINVAL; } - +int etm_perf_add_symlink_sink(struct coresight_device *csdev) +{ return -EINVAL; } +void etm_perf_del_symlink_sink(struct coresight_device *csdev) {} static inline void *etm_perf_sink_config(struct perf_output_handle *handle) { return NULL; diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index 2b0df1a0a8df..d7fa90be6f42 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -18,6 +18,7 @@ #include #include +#include "coresight-etm-perf.h" #include "coresight-priv.h" static DEFINE_MUTEX(coresight_mutex); @@ -1167,6 +1168,22 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) goto err_out; } + if (csdev->type == CORESIGHT_DEV_TYPE_SINK || + csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { + ret = etm_perf_add_symlink_sink(csdev); + + if (ret) { + device_unregister(&csdev->dev); + /* + * As with the above, all resources are free'd + * explicitly via coresight_device_release() triggered + * from put_device(), which is in turn called from + * function device_unregister(). + */ + goto err_out; + } + } + mutex_lock(&coresight_mutex); coresight_fixup_device_conns(csdev); @@ -1185,6 +1202,7 @@ EXPORT_SYMBOL_GPL(coresight_register); void coresight_unregister(struct coresight_device *csdev) { + etm_perf_del_symlink_sink(csdev); /* Remove references of that device in the topology */ coresight_remove_conns(csdev); device_unregister(&csdev->dev); diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 46c67a764877..7b87965f7a65 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -154,8 +154,9 @@ struct coresight_connection { * @orphan: true if the component has connections that haven't been linked. * @enable: 'true' if component is currently part of an active path. * @activated: 'true' only if a _sink_ has been activated. A sink can be - activated but not yet enabled. Enabling for a _sink_ - happens when a source has been selected for that it. + * activated but not yet enabled. Enabling for a _sink_ + * appens when a source has been selected for that it. + * @ea: Device attribute for sink representation under PMU directory. */ struct coresight_device { struct coresight_connection *conns; @@ -168,7 +169,9 @@ struct coresight_device { atomic_t *refcnt; bool orphan; bool enable; /* true only if configured as part of a path */ + /* sink specific fields */ bool activated; /* true only if a sink is part of a path */ + struct dev_ext_attribute *ea; }; #define to_coresight_device(d) container_of(d, struct coresight_device, dev) From patchwork Tue Feb 5 23:24:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 157540 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp5755183jaa; Tue, 5 Feb 2019 15:25:14 -0800 (PST) X-Google-Smtp-Source: AHgI3IZmdqYfK6fg0Bgr0PtxC/mjE+8A4QE9zv/0KSIY4OMu4QWXvMBoQed5BshRcz8KNnKkzmYu X-Received: by 2002:a17:902:12f:: with SMTP id 44mr7778665plb.74.1549409114259; Tue, 05 Feb 2019 15:25:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549409114; cv=none; d=google.com; s=arc-20160816; b=kYrF5OfknKJJoVmK6m+h8AQXAfXELvp+VWY1/eufbKwwy+s16rkJd7LzzUlKzQHQkI aDz6uyD+3eOPk2nOtWY04kpodnqqeaD8SczoOLJ2TcKVH1v9qChh1M6+vxYPRgNAzb7N NYlu/jMdM0Ji2T6uHK0Efk4JCVGzBvXnmHuCfjBK/W9xtASGNdttiaz+P9eyDuTDKJrB 4pEY4m0JDvFwq3+gnRWh7+Fh/Nj2WHRAgjileiD9N0sGyHefIF/t5CGD7YaLQ7aEoubI T9fH20LzIowzwtsD+5xIoGUyAG3vJaVDj7CR33SYE86GQFV8U9RUApEtHEZhZQy66Vwh Ac3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=N6pe95av2ZaxCRt4t70S8VXcNlePxrKU9faHcT9k6+Q=; b=gQA9RzaLyRORs4IqWFDyxeXiZGdLPeQUqZFZamjJTYAVzYjy+OKHTAEY3dOfhl799Z VL/fxHV6vLlVaZy34/oA8uwcPA5mPuu42oFABD1EMTTIl2vbEb+jh9mtodIr0IVR0Dso UhA2eUWQpTiHJZX2lihdVGbn0vvgAE1tT9heWrrkw98RrBlD4qQ8/8Jk6BBPPPnek46u iia4t6K3X6dKSUaJV4w0JGCt/Qa94lmgmDuCGM66YlmVkhppAws7iin8HUSJ4EIFzidC cjN8L3jSLAhyJv8kRZOSy3oj99kzmBBMDoMUyuNYO4jbdE+MUamu6o9HU5bCPDiz8L7X vb7Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nKSAFr42; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id g136sm5926917pfb.154.2019.02.05.15.25.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Feb 2019 15:25:06 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 6/6] coresight: Use event attributes for sink selection Date: Tue, 5 Feb 2019 16:24:58 -0700 Message-Id: <20190205232458.7074-7-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190205232458.7074-1-mathieu.poirier@linaro.org> References: <20190205232458.7074-1-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch uses the information conveyed by perf_event::attr::config2 to select a sink to use for the session. That way a sink can easily be selected to be used by more than one source, something that isn't currently possible with the sysfs implementation. Signed-off-by: Mathieu Poirier Acked-by: Peter Zijlstra (Intel) Reviewed-by: Suzuki K Poulose --- .../hwtracing/coresight/coresight-etm-perf.c | 24 +++++------ drivers/hwtracing/coresight/coresight-priv.h | 1 + drivers/hwtracing/coresight/coresight.c | 42 +++++++++++++++++++ 3 files changed, 55 insertions(+), 12 deletions(-) -- 2.17.1 diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index cdbdb28dc175..8c88bf0a1e5f 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -31,11 +31,14 @@ static DEFINE_PER_CPU(struct coresight_device *, csdev_src); PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC)); PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS)); PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK)); +/* Sink ID - same for all ETMs */ +PMU_FORMAT_ATTR(sinkid, "config2:0-31"); static struct attribute *etm_config_formats_attr[] = { &format_attr_cycacc.attr, &format_attr_timestamp.attr, &format_attr_retstack.attr, + &format_attr_sinkid.attr, NULL, }; @@ -191,6 +194,7 @@ static void etm_free_aux(void *data) static void *etm_setup_aux(struct perf_event *event, void **pages, int nr_pages, bool overwrite) { + u32 id; int cpu = event->cpu; cpumask_t *mask; struct coresight_device *sink; @@ -201,18 +205,14 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, return NULL; INIT_WORK(&event_data->work, free_event_data); - /* - * In theory nothing prevent tracers in a trace session from being - * associated with different sinks, nor having a sink per tracer. But - * until we have HW with this kind of topology we need to assume tracers - * in a trace session are using the same sink. Therefore go through - * the coresight bus and pick the first enabled sink. - * - * When operated from sysFS users are responsible to enable the sink - * while from perf, the perf tools will do it based on the choice made - * on the cmd line. As such the "enable_sink" flag in sysFS is reset. - */ - sink = coresight_get_enabled_sink(true); + /* First get the selected sink from user space. */ + if (event->attr.config2) { + id = (u32)event->attr.config2; + sink = coresight_get_sink_by_id(id); + } else { + sink = coresight_get_enabled_sink(true); + } + if (!sink || !sink_ops(sink)->alloc_buffer) goto err; diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index 579f34943bf1..b936c6d7e13f 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -147,6 +147,7 @@ void coresight_disable_path(struct list_head *path); int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data); struct coresight_device *coresight_get_sink(struct list_head *path); struct coresight_device *coresight_get_enabled_sink(bool reset); +struct coresight_device *coresight_get_sink_by_id(u32 id); struct list_head *coresight_build_path(struct coresight_device *csdev, struct coresight_device *sink); void coresight_release_path(struct list_head *path); diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index d7fa90be6f42..29cef898afba 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -541,6 +542,47 @@ struct coresight_device *coresight_get_enabled_sink(bool deactivate) return dev ? to_coresight_device(dev) : NULL; } +static int coresight_sink_by_id(struct device *dev, void *data) +{ + struct coresight_device *csdev = to_coresight_device(dev); + unsigned long hash; + + if (csdev->type == CORESIGHT_DEV_TYPE_SINK || + csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { + + if (!csdev->ea) + return 0; + /* + * See function etm_perf_add_symlink_sink() to know where + * this comes from. + */ + hash = (unsigned long)csdev->ea->var; + + if ((u32)hash == *(u32 *)data) + return 1; + } + + return 0; +} + +/** + * coresight_get_sink_by_id - returns the sink that matches the id + * @id: Id of the sink to match + * + * The name of a sink is unique, whether it is found on the AMBA bus or + * otherwise. As such the hash of that name can easily be used to identify + * a sink. + */ +struct coresight_device *coresight_get_sink_by_id(u32 id) +{ + struct device *dev = NULL; + + dev = bus_find_device(&coresight_bustype, NULL, &id, + coresight_sink_by_id); + + return dev ? to_coresight_device(dev) : NULL; +} + /* * coresight_grab_device - Power up this device and any of the helper * devices connected to it for trace operation. Since the helper devices