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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id d24-20020adfa358000000b0021ea1bcc300sm1624410wrb.56.2022.08.18.06.54.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Aug 2022 06:54:26 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Marcel Apfelbaum Subject: [PATCH v2 for-7.2 1/2] pci: Remove unused pci_get_*_by_mask() functions Date: Thu, 18 Aug 2022 14:54:20 +0100 Message-Id: <20220818135421.2515257-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220818135421.2515257-1-peter.maydell@linaro.org> References: <20220818135421.2515257-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The helper functions pci_get_{byte,word,long,quad}_by_mask() were added in 2012 in commit c9f50cea70a1596. In the decade since we have never added a single use of them. The helpers clearly aren't that helpful, so drop them rather than carrying around dead code. Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- include/hw/pci/pci.h | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index b54b6ef88fc..c79144bc5ef 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -692,13 +692,6 @@ pci_set_byte_by_mask(uint8_t *config, uint8_t mask, uint8_t reg) pci_set_byte(config, (~mask & val) | (mask & rval)); } -static inline uint8_t -pci_get_byte_by_mask(uint8_t *config, uint8_t mask) -{ - uint8_t val = pci_get_byte(config); - return (val & mask) >> ctz32(mask); -} - static inline void pci_set_word_by_mask(uint8_t *config, uint16_t mask, uint16_t reg) { @@ -707,13 +700,6 @@ pci_set_word_by_mask(uint8_t *config, uint16_t mask, uint16_t reg) pci_set_word(config, (~mask & val) | (mask & rval)); } -static inline uint16_t -pci_get_word_by_mask(uint8_t *config, uint16_t mask) -{ - uint16_t val = pci_get_word(config); - return (val & mask) >> ctz32(mask); -} - static inline void pci_set_long_by_mask(uint8_t *config, uint32_t mask, uint32_t reg) { @@ -722,13 +708,6 @@ pci_set_long_by_mask(uint8_t *config, uint32_t mask, uint32_t reg) pci_set_long(config, (~mask & val) | (mask & rval)); } -static inline uint32_t -pci_get_long_by_mask(uint8_t *config, uint32_t mask) -{ - uint32_t val = pci_get_long(config); - return (val & mask) >> ctz32(mask); -} - static inline void pci_set_quad_by_mask(uint8_t *config, uint64_t mask, uint64_t reg) { @@ -737,13 +716,6 @@ pci_set_quad_by_mask(uint8_t *config, uint64_t mask, uint64_t reg) pci_set_quad(config, (~mask & val) | (mask & rval)); } -static inline uint64_t -pci_get_quad_by_mask(uint8_t *config, uint64_t mask) -{ - uint64_t val = pci_get_quad(config); - return (val & mask) >> ctz32(mask); -} - PCIDevice *pci_new_multifunction(int devfn, bool multifunction, const char *name); PCIDevice *pci_new(int devfn, const char *name); From patchwork Thu Aug 18 13:54:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 598096 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp568421mae; Thu, 18 Aug 2022 06:56:06 -0700 (PDT) X-Google-Smtp-Source: AA6agR6oRhOEFZUTARb3X5ujwGCKQViNP8XRJWg7/kPQq8dXFtaV7GPVlpLzt55lroJmK1ol0fZ3 X-Received: by 2002:ac8:7f83:0:b0:343:869a:7db9 with SMTP id z3-20020ac87f83000000b00343869a7db9mr2662986qtj.46.1660830966710; Thu, 18 Aug 2022 06:56:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1660830966; cv=none; d=google.com; s=arc-20160816; b=NZGLZa+XnzKOrHTTSZcIMRA+ulSAnAeopIHqoo8JFyb+N9LSSLcHfb9+OvBfi5IcqI 7P8DMIQyKQ5B4ugoXG6qpQH2msAawUrnjtRiowHzAvhVUMC5Tso91iboqWU0AWTAqKMz 7QrjaXhPEWVbq7NjQhSTp1vUQyv3dYWqtljvDGV5MEZK/tqfm03NuoiolSLkhZAggjvs tGcm4mb9kM0yK7l3+06CPAlQ2S6GkrY/1kJB4XYRPQTat/f1mAYEZLifU9f4iDwr784h A2PpbCqQx/pbxDsLsB7yOLfba45BwomZpRh/z5tQzGHG0rNkwImEQnGWtJUcEZMO4lDn CaXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Ltb+NJhoIgMEPDlZ1x7AyzfdFhnHp9XW9U5V5+U+A1Q=; b=ba+Ap0f/KL8MjlXeInolNowZ9wWTxLpdXyV8vZn93ft7O6ccMjhO0GW8BjfaVR81Wg pWuXBymrNCbiXzrKrB4nNvj0awGJU0cylUogTu3KWz41+pIRT4hDqDufwvggrK2STrea O6YV28PVDHYICp2YdadVcpxc7g2GpxhtGFaLqR6K3Rwxr0xmkND2HNyFjIN1akhPGaGB TngJVsE+7+VF5MQGvACvpuGCYH6gcr58qlrSHd7u0C3iXumxog2wvU1wqJ4JHxLZmN6X J9WaYd36VE32s+uTYnETz+VEjZG7m+c1SFq2F0G0AmufMJh6/Tx7bXwxrsa57YnhYHt/ aA0w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JObpoX0Y; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id d24-20020adfa358000000b0021ea1bcc300sm1624410wrb.56.2022.08.18.06.54.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Aug 2022 06:54:27 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Marcel Apfelbaum Subject: [PATCH v2 for-7.2 2/2] pci: Sanity check mask argument to pci_set_*_by_mask() Date: Thu, 18 Aug 2022 14:54:21 +0100 Message-Id: <20220818135421.2515257-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220818135421.2515257-1-peter.maydell@linaro.org> References: <20220818135421.2515257-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Coverity complains that in functions like pci_set_word_by_mask() we might end up shifting by more than 31 bits. This is true, but only if the caller passes in a zero mask. Help Coverity out by asserting that the mask argument is valid. Fixes: CID 1487168 Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- Note that only 1 of these 4 functions is used, and that only in 2 places in the codebase. In both cases the mask argument is a compile-time constant. v1->v2 changes: remove unnecessary masking --- include/hw/pci/pci.h | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index c79144bc5ef..97937cc9221 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -688,7 +688,10 @@ static inline void pci_set_byte_by_mask(uint8_t *config, uint8_t mask, uint8_t reg) { uint8_t val = pci_get_byte(config); - uint8_t rval = reg << ctz32(mask); + uint8_t rval; + + assert(mask); + rval = reg << ctz32(mask); pci_set_byte(config, (~mask & val) | (mask & rval)); } @@ -696,7 +699,10 @@ static inline void pci_set_word_by_mask(uint8_t *config, uint16_t mask, uint16_t reg) { uint16_t val = pci_get_word(config); - uint16_t rval = reg << ctz32(mask); + uint16_t rval; + + assert(mask); + rval = reg << ctz32(mask); pci_set_word(config, (~mask & val) | (mask & rval)); } @@ -704,7 +710,10 @@ static inline void pci_set_long_by_mask(uint8_t *config, uint32_t mask, uint32_t reg) { uint32_t val = pci_get_long(config); - uint32_t rval = reg << ctz32(mask); + uint32_t rval; + + assert(mask); + rval = reg << ctz32(mask); pci_set_long(config, (~mask & val) | (mask & rval)); } @@ -712,7 +721,10 @@ static inline void pci_set_quad_by_mask(uint8_t *config, uint64_t mask, uint64_t reg) { uint64_t val = pci_get_quad(config); - uint64_t rval = reg << ctz32(mask); + uint64_t rval; + + assert(mask); + rval = reg << ctz32(mask); pci_set_quad(config, (~mask & val) | (mask & rval)); }