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Fri, 12 Aug 2022 07:09:22 -0500 From: Syed Saba kareem To: , Subject: [PATCH 01/13] ASoC: amd: add Pink Sardine platform ACP IP register header Date: Fri, 12 Aug 2022 17:37:19 +0530 Message-ID: <20220812120731.788052-2-Syed.SabaKareem@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220812120731.788052-1-Syed.SabaKareem@amd.com> References: <20220812120731.788052-1-Syed.SabaKareem@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 16236279-4f04-4a67-ed24-08da7c5b803d X-MS-TrafficTypeDiagnostic: MWHPR12MB1583:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: CMIer8RwDcsiMsMxCAGVhkGWHsqNT05yGgF3VyhU+82CytlPUWGvJbiNNl+Xm0jLM2ii9b6E5fWMwdaYo4yaR6M7cEIPk7a5GBSLyhP/HwoFjMLN25Xb+xnAGGjXvyDQKkIl/YPMgNaba7p4bh1uguqGBvWzThK0cRJpmjyP7I0p2DM37GdFS7iEl/Mpru/y/EWhpH90na9coqPzs9FjLLg3MU0F/JjzH/6PE5j4ckLxedZJJP9us5XIwNKtvVvi/FKEOyWiPtERP+IGHxUivNcvRq1QE74Bt0wUCQKjj8AnJ32cqq8dzAHpuRCcdPudX9AzY4s5mJiYUlEcFyxt4716dmF0EQEtM9MsvbfpZAzk1x4AAlkStPBRKI+o/tJ8ZiFibYlQrFzWdXMTLLwsYJi4Ib0fYupnR8U8guDK2LB2lcMG0c5U6wtxcNlbjgWIBmhgeNY0T2PiOF82nWcWVnJxWV3GXGs3ZpXehXzNNCAh/wRVWqdWqgezeezlw+HmLG/IXJIeEjo4NRwdN0OnmJjXMXqkKlkwNnOXYQbA9yCVuVpNtP3D1y0vjui+vV4PsgpaXPQrcQV+nG7GIQAVCA95HddblY5joc/D9i2C3oJ8zlUMpG2qkhSxtQUEOEl2IkXyirTW75sGVk9tkocyQzuz0QwZ7Gi0ooM+XOofzZ9hYH9owSbM1oYUVtVWIHJYkDwWTaEaO8hzFwR+KEJcYF6AQ6Y+fQv1UsyUsDPrU3oe/xvRrTEIIuf7pLsx6R8PR/Td6NX9wepLq3uInbN39yvyTOBKkXO/XDnKqJ1VWGP2kC32qTgq713+NPGMkxHm4oczgEwDRjk4f9YCDhNHug== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230016)(4636009)(39860400002)(346002)(376002)(396003)(136003)(46966006)(40470700004)(36840700001)(8936002)(36860700001)(8676002)(40480700001)(54906003)(36756003)(83380400001)(426003)(47076005)(40460700003)(110136005)(70586007)(70206006)(316002)(4326008)(186003)(5660300002)(2616005)(86362001)(41300700001)(6666004)(1076003)(30864003)(336012)(478600001)(2906002)(81166007)(356005)(82740400003)(7696005)(26005)(82310400005)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2022 12:09:26.0975 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 16236279-4f04-4a67-ed24-08da7c5b803d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT100.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1583 Cc: Sunil-kumar.Dommati@amd.com, open list , Basavaraj.Hiregoudar@amd.com, Takashi Iwai , mario.limonciello@amd.com, Vijendar.Mukunda@amd.com, Syed Saba kareem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add ACP IP Register header for Pink Sardine platform. Signed-off-by: Syed Saba Kareem --- include/sound/acp62_chip_offset_byte.h | 444 +++++++++++++++++++++++++ 1 file changed, 444 insertions(+) create mode 100644 include/sound/acp62_chip_offset_byte.h diff --git a/include/sound/acp62_chip_offset_byte.h b/include/sound/acp62_chip_offset_byte.h new file mode 100644 index 000000000000..0c85e4c3daae --- /dev/null +++ b/include/sound/acp62_chip_offset_byte.h @@ -0,0 +1,444 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * AMD ACP 6.2 Register Documentation + * + * Copyright 2022 Advanced Micro Devices, Inc. + */ + +#ifndef _acp_ip_OFFSET_HEADER +#define _acp_ip_OFFSET_HEADER + +/* Registers from ACP_DMA block */ +#define ACP_DMA_CNTL_0 0x1240000 +#define ACP_DMA_CNTL_1 0x1240004 +#define ACP_DMA_CNTL_2 0x1240008 +#define ACP_DMA_CNTL_3 0x124000C +#define ACP_DMA_CNTL_4 0x1240010 +#define ACP_DMA_CNTL_5 0x1240014 +#define ACP_DMA_CNTL_6 0x1240018 +#define ACP_DMA_CNTL_7 0x124001C +#define ACP_DMA_DSCR_STRT_IDX_0 0x1240020 +#define ACP_DMA_DSCR_STRT_IDX_1 0x1240024 +#define ACP_DMA_DSCR_STRT_IDX_2 0x1240028 +#define ACP_DMA_DSCR_STRT_IDX_3 0x124002C +#define ACP_DMA_DSCR_STRT_IDX_4 0x1240030 +#define ACP_DMA_DSCR_STRT_IDX_5 0x1240034 +#define ACP_DMA_DSCR_STRT_IDX_6 0x1240038 +#define ACP_DMA_DSCR_STRT_IDX_7 0x124003C +#define ACP_DMA_DSCR_CNT_0 0x1240040 +#define ACP_DMA_DSCR_CNT_1 0x1240044 +#define ACP_DMA_DSCR_CNT_2 0x1240048 +#define ACP_DMA_DSCR_CNT_3 0x124004C +#define ACP_DMA_DSCR_CNT_4 0x1240050 +#define ACP_DMA_DSCR_CNT_5 0x1240054 +#define ACP_DMA_DSCR_CNT_6 0x1240058 +#define ACP_DMA_DSCR_CNT_7 0x124005C +#define ACP_DMA_PRIO_0 0x1240060 +#define ACP_DMA_PRIO_1 0x1240064 +#define ACP_DMA_PRIO_2 0x1240068 +#define ACP_DMA_PRIO_3 0x124006C +#define ACP_DMA_PRIO_4 0x1240070 +#define ACP_DMA_PRIO_5 0x1240074 +#define ACP_DMA_PRIO_6 0x1240078 +#define ACP_DMA_PRIO_7 0x124007C +#define ACP_DMA_CUR_DSCR_0 0x1240080 +#define ACP_DMA_CUR_DSCR_1 0x1240084 +#define ACP_DMA_CUR_DSCR_2 0x1240088 +#define ACP_DMA_CUR_DSCR_3 0x124008C +#define ACP_DMA_CUR_DSCR_4 0x1240090 +#define ACP_DMA_CUR_DSCR_5 0x1240094 +#define ACP_DMA_CUR_DSCR_6 0x1240098 +#define ACP_DMA_CUR_DSCR_7 0x124009C +#define ACP_DMA_CUR_TRANS_CNT_0 0x12400A0 +#define ACP_DMA_CUR_TRANS_CNT_1 0x12400A4 +#define ACP_DMA_CUR_TRANS_CNT_2 0x12400A8 +#define ACP_DMA_CUR_TRANS_CNT_3 0x12400AC +#define ACP_DMA_CUR_TRANS_CNT_4 0x12400B0 +#define ACP_DMA_CUR_TRANS_CNT_5 0x12400B4 +#define ACP_DMA_CUR_TRANS_CNT_6 0x12400B8 +#define ACP_DMA_CUR_TRANS_CNT_7 0x12400BC +#define ACP_DMA_ERR_STS_0 0x12400C0 +#define ACP_DMA_ERR_STS_1 0x12400C4 +#define ACP_DMA_ERR_STS_2 0x12400C8 +#define ACP_DMA_ERR_STS_3 0x12400CC +#define ACP_DMA_ERR_STS_4 0x12400D0 +#define ACP_DMA_ERR_STS_5 0x12400D4 +#define ACP_DMA_ERR_STS_6 0x12400D8 +#define ACP_DMA_ERR_STS_7 0x12400DC +#define ACP_DMA_DESC_BASE_ADDR 0x12400E0 +#define ACP_DMA_DESC_MAX_NUM_DSCR 0x12400E4 +#define ACP_DMA_CH_STS 0x12400E8 +#define ACP_DMA_CH_GROUP 0x12400EC +#define ACP_DMA_CH_RST_STS 0x12400F0 + +/* Registers from ACP_AXI2AXIATU block */ +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1 0x1240C00 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_1 0x1240C04 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2 0x1240C08 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_2 0x1240C0C +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_3 0x1240C10 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_3 0x1240C14 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_4 0x1240C18 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_4 0x1240C1C +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0x1240C20 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0x1240C24 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_6 0x1240C28 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_6 0x1240C2C +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_7 0x1240C30 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_7 0x1240C34 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_8 0x1240C38 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_8 0x1240C3C +#define ACPAXI2AXI_ATU_CTRL 0x1240C40 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_9 0x1240C44 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_9 0x1240C48 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_10 0x1240C4C +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_10 0x1240C50 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_11 0x1240C54 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_11 0x1240C58 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_12 0x1240C5C +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_12 0x1240C60 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_13 0x1240C64 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_13 0x1240C68 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_14 0x1240C6C +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_14 0x1240C70 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_15 0x1240C74 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_15 0x1240C78 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_16 0x1240C7C +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_16 0x1240C80 + +/* Registers from ACP_CLKRST block */ +#define ACP_SOFT_RESET 0x1241000 +#define ACP_CONTROL 0x1241004 +#define ACP_STATUS 0x1241008 +#define ACP_DYNAMIC_CG_MASTER_CONTROL 0x1241010 +#define ACP_ZSC_DSP_CTRL 0x1241014 +#define ACP_ZSC_STS 0x1241018 +#define ACP_PGFSM_CONTROL 0x1241024 +#define ACP_PGFSM_STATUS 0x1241028 +#define ACP_CLKMUX_SEL 0x124102C + +/* Registers from ACP_AON block */ +#define ACP_PME_EN 0x1241400 +#define ACP_DEVICE_STATE 0x1241404 +#define AZ_DEVICE_STATE 0x1241408 +#define ACP_PIN_CONFIG 0x1241440 +#define ACP_PAD_PULLUP_CTRL 0x1241444 +#define ACP_PAD_PULLDOWN_CTRL 0x1241448 +#define ACP_PAD_DRIVE_STRENGTH_CTRL 0x124144C +#define ACP_PAD_SCHMEN_CTRL 0x1241450 +#define ACP_SW_PAD_KEEPER_EN 0x1241454 +#define ACP_SW_WAKE_EN 0x1241458 +#define ACP_I2S_WAKE_EN 0x124145C +#define ACP_SW1_WAKE_EN 0x1241460 + +/* Registers from ACP_P1_MISC block */ +#define ACP_EXTERNAL_INTR_ENB 0x1241A00 +#define ACP_EXTERNAL_INTR_CNTL 0x1241A04 +#define ACP_EXTERNAL_INTR_CNTL1 0x1241A08 +#define ACP_EXTERNAL_INTR_STAT 0x1241A0C +#define ACP_EXTERNAL_INTR_STAT1 0x1241A10 +#define ACP_ERROR_STATUS 0x1241A4C +#define ACP_P1_SW_I2S_ERROR_REASON 0x1241A50 +#define ACP_P1_SW_POS_TRACK_I2S_TX_CTRL 0x1241A6C +#define ACP_P1_SW_I2S_TX_DMA_POS 0x1241A70 +#define ACP_P1_SW_POS_TRACK_I2S_RX_CTRL 0x1241A74 +#define ACP_P1_SW_I2S_RX_DMA_POS 0x1241A78 +#define ACP_P1_DMIC_I2S_GPIO_INTR_CTRL 0x1241A7C +#define ACP_P1_DMIC_I2S_GPIO_INTR_STATUS 0x1241A80 +#define ACP_SCRATCH_REG_BASE_ADDR 0x1241A84 +#define ACP_P1_SW_POS_TRACK_BT_TX_CTRL 0x1241A88 +#define ACP_P1_SW_BT_TX_DMA_POS 0x1241A8C +#define ACP_P1_SW_POS_TRACK_HS_TX_CTRL 0x1241A90 +#define ACP_P1_SW_HS_TX_DMA_POS 0x1241A94 +#define ACP_P1_SW_POS_TRACK_BT_RX_CTRL 0x1241A98 +#define ACP_P1_SW_BT_RX_DMA_POS 0x1241A9C +#define ACP_P1_SW_POS_TRACK_HS_RX_CTRL 0x1241AA0 +#define ACP_P1_SW_HS_RX_DMA_POS 0x1241AA4 + +/* Registers from ACP_AUDIO_BUFFERS block */ +#define ACP_I2S_RX_RINGBUFADDR 0x1242000 +#define ACP_I2S_RX_RINGBUFSIZE 0x1242004 +#define ACP_I2S_RX_LINKPOSITIONCNTR 0x1242008 +#define ACP_I2S_RX_FIFOADDR 0x124200C +#define ACP_I2S_RX_FIFOSIZE 0x1242010 +#define ACP_I2S_RX_DMA_SIZE 0x1242014 +#define ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x1242018 +#define ACP_I2S_RX_LINEARPOSITIONCNTR_LOW 0x124201C +#define ACP_I2S_RX_INTR_WATERMARK_SIZE 0x1242020 +#define ACP_I2S_TX_RINGBUFADDR 0x1242024 +#define ACP_I2S_TX_RINGBUFSIZE 0x1242028 +#define ACP_I2S_TX_LINKPOSITIONCNTR 0x124202C +#define ACP_I2S_TX_FIFOADDR 0x1242030 +#define ACP_I2S_TX_FIFOSIZE 0x1242034 +#define ACP_I2S_TX_DMA_SIZE 0x1242038 +#define ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x124203C +#define ACP_I2S_TX_LINEARPOSITIONCNTR_LOW 0x1242040 +#define ACP_I2S_TX_INTR_WATERMARK_SIZE 0x1242044 +#define ACP_BT_RX_RINGBUFADDR 0x1242048 +#define ACP_BT_RX_RINGBUFSIZE 0x124204C +#define ACP_BT_RX_LINKPOSITIONCNTR 0x1242050 +#define ACP_BT_RX_FIFOADDR 0x1242054 +#define ACP_BT_RX_FIFOSIZE 0x1242058 +#define ACP_BT_RX_DMA_SIZE 0x124205C +#define ACP_BT_RX_LINEARPOSITIONCNTR_HIGH 0x1242060 +#define ACP_BT_RX_LINEARPOSITIONCNTR_LOW 0x1242064 +#define ACP_BT_RX_INTR_WATERMARK_SIZE 0x1242068 +#define ACP_BT_TX_RINGBUFADDR 0x124206C +#define ACP_BT_TX_RINGBUFSIZE 0x1242070 +#define ACP_BT_TX_LINKPOSITIONCNTR 0x1242074 +#define ACP_BT_TX_FIFOADDR 0x1242078 +#define ACP_BT_TX_FIFOSIZE 0x124207C +#define ACP_BT_TX_DMA_SIZE 0x1242080 +#define ACP_BT_TX_LINEARPOSITIONCNTR_HIGH 0x1242084 +#define ACP_BT_TX_LINEARPOSITIONCNTR_LOW 0x1242088 +#define ACP_BT_TX_INTR_WATERMARK_SIZE 0x124208C +#define ACP_HS_RX_RINGBUFADDR 0x1242090 +#define ACP_HS_RX_RINGBUFSIZE 0x1242094 +#define ACP_HS_RX_LINKPOSITIONCNTR 0x1242098 +#define ACP_HS_RX_FIFOADDR 0x124209C +#define ACP_HS_RX_FIFOSIZE 0x12420A0 +#define ACP_HS_RX_DMA_SIZE 0x12420A4 +#define ACP_HS_RX_LINEARPOSITIONCNTR_HIGH 0x12420A8 +#define ACP_HS_RX_LINEARPOSITIONCNTR_LOW 0x12420AC +#define ACP_HS_RX_INTR_WATERMARK_SIZE 0x12420B0 +#define ACP_HS_TX_RINGBUFADDR 0x12420B4 +#define ACP_HS_TX_RINGBUFSIZE 0x12420B8 +#define ACP_HS_TX_LINKPOSITIONCNTR 0x12420BC +#define ACP_HS_TX_FIFOADDR 0x12420C0 +#define ACP_HS_TX_FIFOSIZE 0x12420C4 +#define ACP_HS_TX_DMA_SIZE 0x12420C8 +#define ACP_HS_TX_LINEARPOSITIONCNTR_HIGH 0x12420CC +#define ACP_HS_TX_LINEARPOSITIONCNTR_LOW 0x12420D0 +#define ACP_HS_TX_INTR_WATERMARK_SIZE 0x12420D4 + +/* Registers from ACP_I2S_TDM block */ +#define ACP_I2STDM_IER 0x1242400 +#define ACP_I2STDM_IRER 0x1242404 +#define ACP_I2STDM_RXFRMT 0x1242408 +#define ACP_I2STDM_ITER 0x124240C +#define ACP_I2STDM_TXFRMT 0x1242410 +#define ACP_I2STDM0_MSTRCLKGEN 0x1242414 +#define ACP_I2STDM1_MSTRCLKGEN 0x1242418 +#define ACP_I2STDM2_MSTRCLKGEN 0x124241C +#define ACP_I2STDM_REFCLKGEN 0x1242420 + +/* Registers from ACP_BT_TDM block */ +#define ACP_BTTDM_IER 0x1242800 +#define ACP_BTTDM_IRER 0x1242804 +#define ACP_BTTDM_RXFRMT 0x1242808 +#define ACP_BTTDM_ITER 0x124280C +#define ACP_BTTDM_TXFRMT 0x1242810 +#define ACP_HSTDM_IER 0x1242814 +#define ACP_HSTDM_IRER 0x1242818 +#define ACP_HSTDM_RXFRMT 0x124281C +#define ACP_HSTDM_ITER 0x1242820 +#define ACP_HSTDM_TXFRMT 0x1242824 + +/* Registers from ACP_WOV block */ +#define ACP_WOV_PDM_ENABLE 0x1242C04 +#define ACP_WOV_PDM_DMA_ENABLE 0x1242C08 +#define ACP_WOV_RX_RINGBUFADDR 0x1242C0C +#define ACP_WOV_RX_RINGBUFSIZE 0x1242C10 +#define ACP_WOV_RX_LINKPOSITIONCNTR 0x1242C14 +#define ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH 0x1242C18 +#define ACP_WOV_RX_LINEARPOSITIONCNTR_LOW 0x1242C1C +#define ACP_WOV_RX_INTR_WATERMARK_SIZE 0x1242C20 +#define ACP_WOV_PDM_FIFO_FLUSH 0x1242C24 +#define ACP_WOV_PDM_NO_OF_CHANNELS 0x1242C28 +#define ACP_WOV_PDM_DECIMATION_FACTOR 0x1242C2C +#define ACP_WOV_PDM_VAD_CTRL 0x1242C30 +#define ACP_WOV_WAKE 0x1242C54 +#define ACP_WOV_BUFFER_STATUS 0x1242C58 +#define ACP_WOV_MISC_CTRL 0x1242C5C +#define ACP_WOV_CLK_CTRL 0x1242C60 +#define ACP_PDM_VAD_DYNAMIC_CLK_GATING_EN 0x1242C64 +#define ACP_WOV_ERROR_STATUS_REGISTER 0x1242C68 +#define ACP_PDM_CLKDIV 0x1242C6C + +/* Registers from ACP_P1_AUDIO_BUFFERS block */ +#define ACP_P1_I2S_RX_RINGBUFADDR 0x1243A00 +#define ACP_P1_I2S_RX_RINGBUFSIZE 0x1243A04 +#define ACP_P1_I2S_RX_LINKPOSITIONCNTR 0x1243A08 +#define ACP_P1_I2S_RX_FIFOADDR 0x1243A0C +#define ACP_P1_I2S_RX_FIFOSIZE 0x1243A10 +#define ACP_P1_I2S_RX_DMA_SIZE 0x1243A14 +#define ACP_P1_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x1243A18 +#define ACP_P1_I2S_RX_LINEARPOSITIONCNTR_LOW 0x1243A1C +#define ACP_P1_I2S_RX_INTR_WATERMARK_SIZE 0x1243A20 +#define ACP_P1_I2S_TX_RINGBUFADDR 0x1243A24 +#define ACP_P1_I2S_TX_RINGBUFSIZE 0x1243A28 +#define ACP_P1_I2S_TX_LINKPOSITIONCNTR 0x1243A2C +#define ACP_P1_I2S_TX_FIFOADDR 0x1243A30 +#define ACP_P1_I2S_TX_FIFOSIZE 0x1243A34 +#define ACP_P1_I2S_TX_DMA_SIZE 0x1243A38 +#define ACP_P1_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x1243A3C +#define ACP_P1_I2S_TX_LINEARPOSITIONCNTR_LOW 0x1243A40 +#define ACP_P1_I2S_TX_INTR_WATERMARK_SIZE 0x1243A44 +#define ACP_P1_BT_RX_RINGBUFADDR 0x1243A48 +#define ACP_P1_BT_RX_RINGBUFSIZE 0x1243A4C +#define ACP_P1_BT_RX_LINKPOSITIONCNTR 0x1243A50 +#define ACP_P1_BT_RX_FIFOADDR 0x1243A54 +#define ACP_P1_BT_RX_FIFOSIZE 0x1243A58 +#define ACP_P1_BT_RX_DMA_SIZE 0x1243A5C +#define ACP_P1_BT_RX_LINEARPOSITIONCNTR_HIGH 0x1243A60 +#define ACP_P1_BT_RX_LINEARPOSITIONCNTR_LOW 0x1243A64 +#define ACP_P1_BT_RX_INTR_WATERMARK_SIZE 0x1243A68 +#define ACP_P1_BT_TX_RINGBUFADDR 0x1243A6C +#define ACP_P1_BT_TX_RINGBUFSIZE 0x1243A70 +#define ACP_P1_BT_TX_LINKPOSITIONCNTR 0x1243A74 +#define ACP_P1_BT_TX_FIFOADDR 0x1243A78 +#define ACP_P1_BT_TX_FIFOSIZE 0x1243A7C +#define ACP_P1_BT_TX_DMA_SIZE 0x1243A80 +#define ACP_P1_BT_TX_LINEARPOSITIONCNTR_HIGH 0x1243A84 +#define ACP_P1_BT_TX_LINEARPOSITIONCNTR_LOW 0x1243A88 +#define ACP_P1_BT_TX_INTR_WATERMARK_SIZE 0x1243A8C +#define ACP_P1_HS_RX_RINGBUFADDR 0x1243A90 +#define ACP_P1_HS_RX_RINGBUFSIZE 0x1243A94 +#define ACP_P1_HS_RX_LINKPOSITIONCNTR 0x1243A98 +#define ACP_P1_HS_RX_FIFOADDR 0x1243A9C +#define ACP_P1_HS_RX_FIFOSIZE 0x1243AA0 +#define ACP_P1_HS_RX_DMA_SIZE 0x1243AA4 +#define ACP_P1_HS_RX_LINEARPOSITIONCNTR_HIGH 0x1243AA8 +#define ACP_P1_HS_RX_LINEARPOSITIONCNTR_LOW 0x1243AAC +#define ACP_P1_HS_RX_INTR_WATERMARK_SIZE 0x1243AB0 +#define ACP_P1_HS_TX_RINGBUFADDR 0x1243AB4 +#define ACP_P1_HS_TX_RINGBUFSIZE 0x1243AB8 +#define ACP_P1_HS_TX_LINKPOSITIONCNTR 0x1243ABC +#define ACP_P1_HS_TX_FIFOADDR 0x1243AC0 +#define ACP_P1_HS_TX_FIFOSIZE 0x1243AC4 +#define ACP_P1_HS_TX_DMA_SIZE 0x1243AC8 +#define ACP_P1_HS_TX_LINEARPOSITIONCNTR_HIGH 0x1243ACC +#define ACP_P1_HS_TX_LINEARPOSITIONCNTR_LOW 0x1243AD0 +#define ACP_P1_HS_TX_INTR_WATERMARK_SIZE 0x1243AD4 + +/* Registers from ACP_SCRATCH block */ +#define ACP_SCRATCH_REG_0 0x1250000 +#define ACP_SCRATCH_REG_1 0x1250004 +#define ACP_SCRATCH_REG_2 0x1250008 +#define ACP_SCRATCH_REG_3 0x125000C +#define ACP_SCRATCH_REG_4 0x1250010 +#define ACP_SCRATCH_REG_5 0x1250014 +#define ACP_SCRATCH_REG_6 0x1250018 +#define ACP_SCRATCH_REG_7 0x125001C +#define ACP_SCRATCH_REG_8 0x1250020 +#define ACP_SCRATCH_REG_9 0x1250024 +#define ACP_SCRATCH_REG_10 0x1250028 +#define ACP_SCRATCH_REG_11 0x125002C +#define ACP_SCRATCH_REG_12 0x1250030 +#define ACP_SCRATCH_REG_13 0x1250034 +#define ACP_SCRATCH_REG_14 0x1250038 +#define ACP_SCRATCH_REG_15 0x125003C +#define ACP_SCRATCH_REG_16 0x1250040 +#define ACP_SCRATCH_REG_17 0x1250044 +#define ACP_SCRATCH_REG_18 0x1250048 +#define ACP_SCRATCH_REG_19 0x125004C +#define ACP_SCRATCH_REG_20 0x1250050 +#define ACP_SCRATCH_REG_21 0x1250054 +#define ACP_SCRATCH_REG_22 0x1250058 +#define ACP_SCRATCH_REG_23 0x125005C +#define ACP_SCRATCH_REG_24 0x1250060 +#define ACP_SCRATCH_REG_25 0x1250064 +#define ACP_SCRATCH_REG_26 0x1250068 +#define ACP_SCRATCH_REG_27 0x125006C +#define ACP_SCRATCH_REG_28 0x1250070 +#define ACP_SCRATCH_REG_29 0x1250074 +#define ACP_SCRATCH_REG_30 0x1250078 +#define ACP_SCRATCH_REG_31 0x125007C +#define ACP_SCRATCH_REG_32 0x1250080 +#define ACP_SCRATCH_REG_33 0x1250084 +#define ACP_SCRATCH_REG_34 0x1250088 +#define ACP_SCRATCH_REG_35 0x125008C +#define ACP_SCRATCH_REG_36 0x1250090 +#define ACP_SCRATCH_REG_37 0x1250094 +#define ACP_SCRATCH_REG_38 0x1250098 +#define ACP_SCRATCH_REG_39 0x125009C +#define ACP_SCRATCH_REG_40 0x12500A0 +#define ACP_SCRATCH_REG_41 0x12500A4 +#define ACP_SCRATCH_REG_42 0x12500A8 +#define ACP_SCRATCH_REG_43 0x12500AC +#define ACP_SCRATCH_REG_44 0x12500B0 +#define ACP_SCRATCH_REG_45 0x12500B4 +#define ACP_SCRATCH_REG_46 0x12500B8 +#define ACP_SCRATCH_REG_47 0x12500BC +#define ACP_SCRATCH_REG_48 0x12500C0 +#define ACP_SCRATCH_REG_49 0x12500C4 +#define ACP_SCRATCH_REG_50 0x12500C8 +#define ACP_SCRATCH_REG_51 0x12500CC +#define ACP_SCRATCH_REG_52 0x12500D0 +#define ACP_SCRATCH_REG_53 0x12500D4 +#define ACP_SCRATCH_REG_54 0x12500D8 +#define ACP_SCRATCH_REG_55 0x12500DC +#define ACP_SCRATCH_REG_56 0x12500E0 +#define ACP_SCRATCH_REG_57 0x12500E4 +#define ACP_SCRATCH_REG_58 0x12500E8 +#define ACP_SCRATCH_REG_59 0x12500EC +#define ACP_SCRATCH_REG_60 0x12500F0 +#define ACP_SCRATCH_REG_61 0x12500F4 +#define ACP_SCRATCH_REG_62 0x12500F8 +#define ACP_SCRATCH_REG_63 0x12500FC +#define ACP_SCRATCH_REG_64 0x1250100 +#define ACP_SCRATCH_REG_65 0x1250104 +#define ACP_SCRATCH_REG_66 0x1250108 +#define ACP_SCRATCH_REG_67 0x125010C +#define ACP_SCRATCH_REG_68 0x1250110 +#define ACP_SCRATCH_REG_69 0x1250114 +#define ACP_SCRATCH_REG_70 0x1250118 +#define ACP_SCRATCH_REG_71 0x125011C +#define ACP_SCRATCH_REG_72 0x1250120 +#define ACP_SCRATCH_REG_73 0x1250124 +#define ACP_SCRATCH_REG_74 0x1250128 +#define ACP_SCRATCH_REG_75 0x125012C +#define ACP_SCRATCH_REG_76 0x1250130 +#define ACP_SCRATCH_REG_77 0x1250134 +#define ACP_SCRATCH_REG_78 0x1250138 +#define ACP_SCRATCH_REG_79 0x125013C +#define ACP_SCRATCH_REG_80 0x1250140 +#define ACP_SCRATCH_REG_81 0x1250144 +#define ACP_SCRATCH_REG_82 0x1250148 +#define ACP_SCRATCH_REG_83 0x125014C +#define ACP_SCRATCH_REG_84 0x1250150 +#define ACP_SCRATCH_REG_85 0x1250154 +#define ACP_SCRATCH_REG_86 0x1250158 +#define ACP_SCRATCH_REG_87 0x125015C +#define ACP_SCRATCH_REG_88 0x1250160 +#define ACP_SCRATCH_REG_89 0x1250164 +#define ACP_SCRATCH_REG_90 0x1250168 +#define ACP_SCRATCH_REG_91 0x125016C +#define ACP_SCRATCH_REG_92 0x1250170 +#define ACP_SCRATCH_REG_93 0x1250174 +#define ACP_SCRATCH_REG_94 0x1250178 +#define ACP_SCRATCH_REG_95 0x125017C +#define ACP_SCRATCH_REG_96 0x1250180 +#define ACP_SCRATCH_REG_97 0x1250184 +#define ACP_SCRATCH_REG_98 0x1250188 +#define ACP_SCRATCH_REG_99 0x125018C +#define ACP_SCRATCH_REG_100 0x1250190 +#define ACP_SCRATCH_REG_101 0x1250194 +#define ACP_SCRATCH_REG_102 0x1250198 +#define ACP_SCRATCH_REG_103 0x125019C +#define ACP_SCRATCH_REG_104 0x12501A0 +#define ACP_SCRATCH_REG_105 0x12501A4 +#define ACP_SCRATCH_REG_106 0x12501A8 +#define ACP_SCRATCH_REG_107 0x12501AC +#define ACP_SCRATCH_REG_108 0x12501B0 +#define ACP_SCRATCH_REG_109 0x12501B4 +#define ACP_SCRATCH_REG_110 0x12501B8 +#define ACP_SCRATCH_REG_111 0x12501BC +#define ACP_SCRATCH_REG_112 0x12501C0 +#define ACP_SCRATCH_REG_113 0x12501C4 +#define ACP_SCRATCH_REG_114 0x12501C8 +#define ACP_SCRATCH_REG_115 0x12501CC +#define ACP_SCRATCH_REG_116 0x12501D0 +#define ACP_SCRATCH_REG_117 0x12501D4 +#define ACP_SCRATCH_REG_118 0x12501D8 +#define ACP_SCRATCH_REG_119 0x12501DC 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X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR12MB2624 Cc: Sunil-kumar.Dommati@amd.com, open list , Basavaraj.Hiregoudar@amd.com, Takashi Iwai , Liam Girdwood , mario.limonciello@amd.com, Vijendar.Mukunda@amd.com, Syed Saba kareem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" ACP is a PCI audio device. This patch adds PCI driver to bind to this device and get PCI resources for Pink Sardine Platform. Signed-off-by: Syed Saba Kareem Signed-off-by: Vijendar Mukunda --- sound/soc/amd/ps/acp62.h | 21 +++++++++ sound/soc/amd/ps/pci-ps.c | 94 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 115 insertions(+) create mode 100644 sound/soc/amd/ps/acp62.h create mode 100644 sound/soc/amd/ps/pci-ps.c diff --git a/sound/soc/amd/ps/acp62.h b/sound/soc/amd/ps/acp62.h new file mode 100644 index 000000000000..e91762240c93 --- /dev/null +++ b/sound/soc/amd/ps/acp62.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * AMD ALSA SoC PDM Driver + * + * Copyright (C) 2022 Advanced Micro Devices, Inc. All rights reserved. + */ + +#include + +#define ACP_DEVICE_ID 0x15E2 +#define ACP62_PHY_BASE_ADDRESS 0x1240000 + +static inline u32 acp62_readl(void __iomem *base_addr) +{ + return readl(base_addr - ACP62_PHY_BASE_ADDRESS); +} + +static inline void acp62_writel(u32 val, void __iomem *base_addr) +{ + writel(val, base_addr - ACP62_PHY_BASE_ADDRESS); +} diff --git a/sound/soc/amd/ps/pci-ps.c b/sound/soc/amd/ps/pci-ps.c new file mode 100644 index 000000000000..25169797275c --- /dev/null +++ b/sound/soc/amd/ps/pci-ps.c @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * AMD Pink Sardine ACP PCI Driver + * + * Copyright 2022 Advanced Micro Devices, Inc. + */ + +#include +#include +#include + +#include "acp62.h" + +struct acp62_dev_data { + void __iomem *acp62_base; +}; + +static int snd_acp62_probe(struct pci_dev *pci, + const struct pci_device_id *pci_id) +{ + struct acp62_dev_data *adata; + u32 addr; + int ret; + + /* Pink Sardine device check */ + switch (pci->revision) { + case 0x63: + break; + default: + dev_dbg(&pci->dev, "acp62 pci device not found\n"); + return -ENODEV; + } + if (pci_enable_device(pci)) { + dev_err(&pci->dev, "pci_enable_device failed\n"); + return -ENODEV; + } + + ret = pci_request_regions(pci, "AMD ACP6.2 audio"); + if (ret < 0) { + dev_err(&pci->dev, "pci_request_regions failed\n"); + goto disable_pci; + } + adata = devm_kzalloc(&pci->dev, sizeof(struct acp62_dev_data), + GFP_KERNEL); + if (!adata) { + ret = -ENOMEM; + goto release_regions; + } + + addr = pci_resource_start(pci, 0); + adata->acp62_base = devm_ioremap(&pci->dev, addr, + pci_resource_len(pci, 0)); + if (!adata->acp62_base) { + ret = -ENOMEM; + goto release_regions; + } + pci_set_master(pci); + pci_set_drvdata(pci, adata); + return 0; +release_regions: + pci_release_regions(pci); +disable_pci: + pci_disable_device(pci); + + return ret; +} + +static void snd_acp62_remove(struct pci_dev *pci) +{ + pci_release_regions(pci); + pci_disable_device(pci); +} + +static const struct pci_device_id snd_acp62_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_AMD, ACP_DEVICE_ID), + .class = PCI_CLASS_MULTIMEDIA_OTHER << 8, + .class_mask = 0xffffff }, + { 0, }, +}; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230016)(4636009)(376002)(136003)(39860400002)(396003)(346002)(36840700001)(40470700004)(46966006)(81166007)(82740400003)(86362001)(356005)(36860700001)(40460700003)(4326008)(70586007)(70206006)(54906003)(316002)(2906002)(8676002)(8936002)(5660300002)(40480700001)(41300700001)(110136005)(82310400005)(26005)(6666004)(7696005)(336012)(2616005)(186003)(1076003)(47076005)(426003)(478600001)(36756003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2022 12:09:45.5305 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8493c472-3231-4c66-8d13-08da7c5b8bd5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT112.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4112 Cc: Sunil-kumar.Dommati@amd.com, open list , Basavaraj.Hiregoudar@amd.com, Takashi Iwai , Liam Girdwood , mario.limonciello@amd.com, Vijendar.Mukunda@amd.com, Syed Saba kareem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add Pink Sardine platform ACP6.2 PCI driver init/deinit functions. Signed-off-by: Syed Saba Kareem Signed-off-by: Vijendar Mukunda --- sound/soc/amd/ps/acp62.h | 12 +++++ sound/soc/amd/ps/pci-ps.c | 109 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 121 insertions(+) diff --git a/sound/soc/amd/ps/acp62.h b/sound/soc/amd/ps/acp62.h index e91762240c93..8e734f190b11 100644 --- a/sound/soc/amd/ps/acp62.h +++ b/sound/soc/amd/ps/acp62.h @@ -10,6 +10,18 @@ #define ACP_DEVICE_ID 0x15E2 #define ACP62_PHY_BASE_ADDRESS 0x1240000 +#define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001 +#define ACP_PGFSM_CNTL_POWER_ON_MASK 1 +#define ACP_PGFSM_CNTL_POWER_OFF_MASK 0 +#define ACP_PGFSM_STATUS_MASK 3 +#define ACP_POWERED_ON 0 +#define ACP_POWER_ON_IN_PROGRESS 1 +#define ACP_POWERED_OFF 2 +#define ACP_POWER_OFF_IN_PROGRESS 3 + +#define ACP_ERROR_MASK 0x20000000 +#define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF + static inline u32 acp62_readl(void __iomem *base_addr) { return readl(base_addr - ACP62_PHY_BASE_ADDRESS); diff --git a/sound/soc/amd/ps/pci-ps.c b/sound/soc/amd/ps/pci-ps.c index 25169797275c..2014f415af15 100644 --- a/sound/soc/amd/ps/pci-ps.c +++ b/sound/soc/amd/ps/pci-ps.c @@ -8,6 +8,7 @@ #include #include #include +#include #include "acp62.h" @@ -15,6 +16,103 @@ struct acp62_dev_data { void __iomem *acp62_base; }; +static int acp62_power_on(void __iomem *acp_base) +{ + u32 val; + int timeout; + + val = acp62_readl(acp_base + ACP_PGFSM_STATUS); + + if (!val) + return val; + + if ((val & ACP_PGFSM_STATUS_MASK) != ACP_POWER_ON_IN_PROGRESS) + acp62_writel(ACP_PGFSM_CNTL_POWER_ON_MASK, acp_base + ACP_PGFSM_CONTROL); + timeout = 0; + while (++timeout < 500) { + val = acp62_readl(acp_base + ACP_PGFSM_STATUS); + if (!val) + return 0; + udelay(1); + } + return -ETIMEDOUT; +} + +static int acp62_reset(void __iomem *acp_base) +{ + u32 val; + int timeout; + + acp62_writel(1, acp_base + ACP_SOFT_RESET); + timeout = 0; + while (++timeout < 500) { + val = acp62_readl(acp_base + ACP_SOFT_RESET); + if (val & ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK) + break; + cpu_relax(); + } + acp62_writel(0, acp_base + ACP_SOFT_RESET); + timeout = 0; + while (++timeout < 500) { + val = acp62_readl(acp_base + ACP_SOFT_RESET); + if (!val) + return 0; + cpu_relax(); + } + return -ETIMEDOUT; +} + +static void acp62_enable_interrupts(void __iomem *acp_base) +{ + acp62_writel(0x01, acp_base + ACP_EXTERNAL_INTR_ENB); +} + +static void acp62_disable_interrupts(void __iomem *acp_base) +{ + acp62_writel(ACP_EXT_INTR_STAT_CLEAR_MASK, acp_base + + ACP_EXTERNAL_INTR_STAT); + acp62_writel(0x00, acp_base + ACP_EXTERNAL_INTR_CNTL); + acp62_writel(0x00, acp_base + ACP_EXTERNAL_INTR_ENB); +} + +static int acp62_init(void __iomem *acp_base) +{ + int ret; + + /* power on */ + ret = acp62_power_on(acp_base); + if (ret) { + pr_err("ACP power on failed\n"); + return ret; + } + acp62_writel(0x01, acp_base + ACP_CONTROL); + /* Reset */ + ret = acp62_reset(acp_base); + if (ret) { + pr_err("ACP reset failed\n"); + return ret; + } + acp62_writel(0x03, acp_base + ACP_CLKMUX_SEL); + acp62_enable_interrupts(acp_base); + return 0; +} + +static int acp62_deinit(void __iomem *acp_base) +{ + int ret; + + acp62_disable_interrupts(acp_base); + /* Reset */ + ret = acp62_reset(acp_base); + if (ret) { + pr_err("ACP reset failed\n"); + return ret; + } + acp62_writel(0x00, acp_base + ACP_CLKMUX_SEL); + acp62_writel(0x00, acp_base + ACP_CONTROL); + return 0; +} + static int snd_acp62_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) { @@ -56,6 +154,10 @@ static int snd_acp62_probe(struct pci_dev *pci, } pci_set_master(pci); pci_set_drvdata(pci, adata); + ret = acp62_init(adata->acp62_base); + if (ret) + goto release_regions; + return 0; release_regions: pci_release_regions(pci); @@ -67,6 +169,13 @@ static int snd_acp62_probe(struct pci_dev *pci, static void snd_acp62_remove(struct pci_dev *pci) { + struct acp62_dev_data *adata; + int ret; + + adata = pci_get_drvdata(pci); + ret = acp62_deinit(adata->acp62_base); + if (ret) + dev_err(&pci->dev, "ACP de-init failed\n"); pci_release_regions(pci); pci_disable_device(pci); } From patchwork Fri Aug 12 12:07:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saba Kareem, Syed" X-Patchwork-Id: 597038 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2CE14C25B0E for ; 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Fri, 12 Aug 2022 07:09:45 -0500 From: Syed Saba kareem To: , Subject: [PATCH 04/13] ASoC: amd: add platform devices for acp6.2 pdm driver and dmic driver Date: Fri, 12 Aug 2022 17:37:22 +0530 Message-ID: <20220812120731.788052-5-Syed.SabaKareem@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220812120731.788052-1-Syed.SabaKareem@amd.com> References: <20220812120731.788052-1-Syed.SabaKareem@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 180117b1-fd83-4046-0c7b-08da7c5bae78 X-MS-TrafficTypeDiagnostic: MWHPR12MB1328:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: yQYm9YefTFYkJq6eUdObSLTV+F33r+9BsY5T1PnT6xJeZ07pf1iCl2CUeloN8Dks+nMGjiVEn79xXeck3ZYKUeVVx+gkFuxsmRWZO8rX2Lshb1Z+orzKAyJZUrvGpiJKEe2klicmUHp0mbxmXZJgp0FB8h7DUncMVKS7fEjTrnbCjuH8meFxSkxvn/lmh28LUjFFZEPu7BI7QoiL8aFPMaM+or+82p1idVjoD14uHSQcJQ9UT0BSiWRfjrr9F/Srx4kDxomJHKDS/N+b/HF7rrR7t4nxTgIUJ46P2jR8rrt5nZE7XiVpOpVkw2IafVRuqAImed3pJnkV+/1pEPItVL7uUTHZ55bR+wLROMGvJmKkTSSK3+zv9nYgCxv2en180d72C7gAxhuCFPwZqj8G+kWwUF/Khj1Wjh+c2i08ruTburK9tcD3PCYRBCJD7R9J81y79regKjod+fVJPtORzvn0G4TrqiCO8PCLy+AQGU7862FlmGHXrSH3LG724RV9TzHNxaNYIpI4BYM3uEWojk/g474syIwoxdHURpT1nYRxCyPdAQes9SQKCrdMabxJF8Py1DOBziY6jEWsGj1JUV64Ik6qgoo7c2pGT5AU354MEigKy09BJUHw9VuKTOo8QPNyCDBUCNI6aes07UEd2Yr/aEATx+U+0RUSP658SjPzRWCzDNfzUgFVKLD5L4PhFLvfRDs6TLct9f9A+X23QwqiULvjTxKL+jtDw5MjLVCpRuGwD4vJPXgDbPdlSVGlK7ssvKH3rXoQZLIt/7e9KLDTnndF4xbcWZaFURo4E62MCylM3YtSQKowvhvCSwk+SKH+QWTFs2b2aij0jSEPoQ== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230016)(4636009)(39860400002)(346002)(376002)(396003)(136003)(46966006)(40470700004)(36840700001)(8936002)(36860700001)(8676002)(40480700001)(54906003)(36756003)(83380400001)(426003)(47076005)(40460700003)(110136005)(70586007)(70206006)(316002)(4326008)(186003)(5660300002)(2616005)(86362001)(41300700001)(6666004)(1076003)(336012)(478600001)(2906002)(81166007)(356005)(82740400003)(7696005)(26005)(82310400005)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2022 12:10:43.6380 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 180117b1-fd83-4046-0c7b-08da7c5bae78 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT067.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1328 Cc: Sunil-kumar.Dommati@amd.com, open list , Basavaraj.Hiregoudar@amd.com, Takashi Iwai , Liam Girdwood , mario.limonciello@amd.com, Vijendar.Mukunda@amd.com, Syed Saba kareem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" ACP6.2 IP has PDM decoder block. Create a platform device for it, so that the PDM platform driver can be bound to this device. Pass PCI resources like MMIO to this platform device. Create a platform device for generic dmic codec driver. Signed-off-by: Syed Saba Kareem Signed-off-by: Vijendar Mukunda --- sound/soc/amd/ps/acp62.h | 23 +++++++++++ sound/soc/amd/ps/pci-ps.c | 83 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 104 insertions(+), 2 deletions(-) diff --git a/sound/soc/amd/ps/acp62.h b/sound/soc/amd/ps/acp62.h index 8e734f190b11..ab56e1f8c31b 100644 --- a/sound/soc/amd/ps/acp62.h +++ b/sound/soc/amd/ps/acp62.h @@ -9,6 +9,10 @@ #define ACP_DEVICE_ID 0x15E2 #define ACP62_PHY_BASE_ADDRESS 0x1240000 +#define ACP6x_REG_START 0x1240000 +#define ACP6x_REG_END 0x1250200 +#define ACP6x_DEVS 2 +#define ACP6x_PDM_MODE 1 #define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001 #define ACP_PGFSM_CNTL_POWER_ON_MASK 1 @@ -22,6 +26,25 @@ #define ACP_ERROR_MASK 0x20000000 #define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF +enum acp_config { + ACP_CONFIG_0 = 0, + ACP_CONFIG_1, + ACP_CONFIG_2, + ACP_CONFIG_3, + ACP_CONFIG_4, + ACP_CONFIG_5, + ACP_CONFIG_6, + ACP_CONFIG_7, + ACP_CONFIG_8, + ACP_CONFIG_9, + ACP_CONFIG_10, + ACP_CONFIG_11, + ACP_CONFIG_12, + ACP_CONFIG_13, + ACP_CONFIG_14, + ACP_CONFIG_15, +}; + static inline u32 acp62_readl(void __iomem *base_addr) { return readl(base_addr - ACP62_PHY_BASE_ADDRESS); diff --git a/sound/soc/amd/ps/pci-ps.c b/sound/soc/amd/ps/pci-ps.c index 2014f415af15..94201f75427a 100644 --- a/sound/soc/amd/ps/pci-ps.c +++ b/sound/soc/amd/ps/pci-ps.c @@ -9,11 +9,16 @@ #include #include #include +#include +#include #include "acp62.h" struct acp62_dev_data { void __iomem *acp62_base; + struct resource *res; + bool acp62_audio_mode; + struct platform_device *pdev[ACP6x_DEVS]; }; static int acp62_power_on(void __iomem *acp_base) @@ -117,8 +122,11 @@ static int snd_acp62_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) { struct acp62_dev_data *adata; + struct platform_device_info pdevinfo[ACP6x_DEVS]; + int index, ret; + int val = 0x00; + struct acpi_device *adev; u32 addr; - int ret; /* Pink Sardine device check */ switch (pci->revision) { @@ -157,8 +165,75 @@ static int snd_acp62_probe(struct pci_dev *pci, ret = acp62_init(adata->acp62_base); if (ret) goto release_regions; + val = acp62_readl(adata->acp62_base + ACP_PIN_CONFIG); + switch (val) { + case ACP_CONFIG_0: + case ACP_CONFIG_1: + case ACP_CONFIG_2: + case ACP_CONFIG_3: + case ACP_CONFIG_9: + case ACP_CONFIG_15: + dev_info(&pci->dev, "Audio Mode %d\n", val); + break; + default: + + /* Checking DMIC hardware*/ + adev = acpi_find_child_device(ACPI_COMPANION(&pci->dev), 0x02, 0); + + if (adev) { + const union acpi_object *obj; + + if (!acpi_dev_get_property(adev, "acp-audio-device-type", + ACPI_TYPE_INTEGER, &obj) && + obj->integer.value == 2) { + adata->res = devm_kzalloc(&pci->dev, + sizeof(struct resource), GFP_KERNEL); + + if (!adata->res) { + ret = -ENOMEM; + goto de_init; + } + + adata->res->name = "acp_iomem"; + adata->res->flags = IORESOURCE_MEM; + adata->res->start = addr; + adata->res->end = addr + (ACP6x_REG_END - ACP6x_REG_START); + adata->acp62_audio_mode = ACP6x_PDM_MODE; + memset(&pdevinfo, 0, sizeof(pdevinfo)); + pdevinfo[0].name = "acp_ps_pdm_dma"; + pdevinfo[0].id = 0; + pdevinfo[0].parent = &pci->dev; + pdevinfo[0].num_res = 1; + pdevinfo[0].res = adata->res; + + pdevinfo[1].name = "dmic-codec"; + pdevinfo[1].id = 0; + pdevinfo[1].parent = &pci->dev; + + for (index = 0; index < ACP6x_DEVS; index++) { + adata->pdev[index] = + platform_device_register_full(&pdevinfo[index]); + + if (IS_ERR(adata->pdev[index])) { + dev_err(&pci->dev, + "cannot register %s device\n", + pdevinfo[index].name); + ret = PTR_ERR(adata->pdev[index]); + goto unregister_devs; + } + } + } + } + break; + } return 0; +unregister_devs: + for (--index; index >= 0; index--) + platform_device_unregister(adata->pdev[index]); +de_init: + if (acp62_deinit(adata->acp62_base)) + dev_err(&pci->dev, "ACP de-init failed\n"); release_regions: pci_release_regions(pci); disable_pci: @@ -170,9 +245,13 @@ static int snd_acp62_probe(struct pci_dev *pci, static void snd_acp62_remove(struct pci_dev *pci) { struct acp62_dev_data *adata; - int ret; + int ret, index; adata = pci_get_drvdata(pci); + if (adata->acp62_audio_mode == ACP6x_PDM_MODE) { + for (index = 0; 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Fri, 12 Aug 2022 05:09:56 -0700 Received: from amd-B450M-DS3H.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.28 via Frontend Transport; Fri, 12 Aug 2022 07:09:52 -0500 From: Syed Saba kareem To: , Subject: [PATCH 05/13] ASoC: amd: add acp6.2 pdm platform driver Date: Fri, 12 Aug 2022 17:37:23 +0530 Message-ID: <20220812120731.788052-6-Syed.SabaKareem@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220812120731.788052-1-Syed.SabaKareem@amd.com> References: <20220812120731.788052-1-Syed.SabaKareem@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: b6db49eb-3f12-4ebd-dd63-08da7c5badef X-MS-TrafficTypeDiagnostic: DM5PR1201MB0060:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: BttHAK0faGhTHPlLECq0J2OOHZxy++pxtxcSKxFm5I/czQhn6Sw2dxt3xZccLpmQiZNVoiF/aLS+Fntdp+8JLtjHOFnbR/9MkVxkrM8fOEs1YPE3e6gvF/MhZIixSe6G/BnRpD7cSlvjiu8kvG5ptuosk2hU2eKuzwLS9fSdZopLPET0DKmVk38syj49yfTPPg9m+RtQbsbDHK0VM+DklDzD65htVinGdvyFSdl16NftzKQkBa0kUj20ONQd89EqyLDa8WcLIcUPrHw8pc+VuqTEkapewZRWQURgnUlR9W8EOSrxAdCxWA13U25Sa8/tXmZbaKu97AFpZ0Rj+qCFpln8hQ6loX+053V0nzGphEgSxufv/ZqtXlNaYKkdUc2xkOyt+0XFcxK34jj2Qn2KPkkd9X91rrY2weFhtwN2o+NU/0TIsQUKZlsB2caEuAMsZYa0/o42idkkj1tk4KNGzTrpguIZ/Ghsiye4EqvwfZL/JcqwG/55GTz1q9Og1N5M1d6kdCQI/BJr3ZS0uxK+n2zaDsL+WMv99sVfTCL+F4Ca+ra2cxb80nZMAssJ1LXmxgZyNp8lWMAaIHE0IYwTnK58PXYoWK94wtUPd+mGlQQR3Kx9hhRoYPksv6DzIQaLVuo5frCd8LSG+BsOTzv07W0tmqlldDGT8icolx8VsedGqc256QTfNR26UN4GkE3Tw9AIKiLBOokxuWWUJ+yln6PJZVFKcgBjVBL3GOrH/WPaZBA17PXo3ivQWtdyQVSJ2DA45n+KkIpfog1vhR7sECXn8roeukPxiRV4Vq7/hFDLLjiLpMSLk1tre/ISMI+AcKD3GIC35W0qUTtuo5S0yw== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230016)(4636009)(39860400002)(136003)(396003)(346002)(376002)(46966006)(40470700004)(36840700001)(82740400003)(4326008)(70586007)(70206006)(8676002)(8936002)(478600001)(5660300002)(356005)(81166007)(316002)(2616005)(54906003)(110136005)(336012)(186003)(36860700001)(1076003)(47076005)(40460700003)(6666004)(426003)(41300700001)(7696005)(26005)(40480700001)(36756003)(86362001)(82310400005)(2906002)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2022 12:10:42.7299 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b6db49eb-3f12-4ebd-dd63-08da7c5badef X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT039.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR1201MB0060 Cc: Sunil-kumar.Dommati@amd.com, open list , Basavaraj.Hiregoudar@amd.com, Takashi Iwai , Liam Girdwood , mario.limonciello@amd.com, Vijendar.Mukunda@amd.com, Syed Saba kareem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" PDM platform driver binds to the platform device created by ACP6.2 PCI device. PDM driver registers ALSA DMA and CPU DAI components with ASoC framework. Signed-off-by: Syed Saba Kareem --- sound/soc/amd/ps/acp62.h | 5 +++ sound/soc/amd/ps/ps-pdm-dma.c | 82 +++++++++++++++++++++++++++++++++++ 2 files changed, 87 insertions(+) create mode 100644 sound/soc/amd/ps/ps-pdm-dma.c diff --git a/sound/soc/amd/ps/acp62.h b/sound/soc/amd/ps/acp62.h index ab56e1f8c31b..7636bfeb8a8a 100644 --- a/sound/soc/amd/ps/acp62.h +++ b/sound/soc/amd/ps/acp62.h @@ -45,6 +45,11 @@ enum acp_config { ACP_CONFIG_15, }; +struct pdm_dev_data { + void __iomem *acp62_base; + struct snd_pcm_substream *capture_stream; +}; + static inline u32 acp62_readl(void __iomem *base_addr) { return readl(base_addr - ACP62_PHY_BASE_ADDRESS); diff --git a/sound/soc/amd/ps/ps-pdm-dma.c b/sound/soc/amd/ps/ps-pdm-dma.c new file mode 100644 index 000000000000..bca2ac3e81f5 --- /dev/null +++ b/sound/soc/amd/ps/ps-pdm-dma.c @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * AMD ALSA SoC Pink Sardine PDM Driver + * + * Copyright 2022 Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "acp62.h" + +#define DRV_NAME "acp_ps_pdm_dma" + +static struct snd_soc_dai_driver acp62_pdm_dai_driver = { + .name = "acp_ps_pdm_dma.0", + .capture = { + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S32_LE, + .channels_min = 2, + .channels_max = 2, + .rate_min = 48000, + .rate_max = 48000, + }, +}; + +static const struct snd_soc_component_driver acp62_pdm_component = { + .name = DRV_NAME, +}; + +static int acp62_pdm_audio_probe(struct platform_device *pdev) +{ + struct resource *res; + struct pdm_dev_data *adata; + int status; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n"); + return -ENODEV; + } + + adata = devm_kzalloc(&pdev->dev, sizeof(*adata), GFP_KERNEL); + if (!adata) + return -ENOMEM; + + adata->acp62_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + if (!adata->acp62_base) + return -ENOMEM; + + adata->capture_stream = NULL; + + dev_set_drvdata(&pdev->dev, adata); + status = devm_snd_soc_register_component(&pdev->dev, + &acp62_pdm_component, + &acp62_pdm_dai_driver, 1); + if (status) { + dev_err(&pdev->dev, "Fail to register acp pdm dai\n"); + + return -ENODEV; + } + return 0; +} + +static struct platform_driver acp62_pdm_dma_driver = { + .probe = acp62_pdm_audio_probe, + .driver = { + .name = "acp_ps_pdm_dma", + }, +}; + +module_platform_driver(acp62_pdm_dma_driver); + +MODULE_AUTHOR("Syed.SabaKareem@amd.com"); +MODULE_DESCRIPTION("AMD PHEONIX PDM Driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:" DRV_NAME); From patchwork Fri Aug 12 12:07:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saba Kareem, Syed" X-Patchwork-Id: 596838 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBFBEC282E7 for ; Fri, 12 Aug 2022 12:12:00 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id F33D8846; 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Add pdm irq events handling. Whenever audio data equal to the PDM watermark level are consumed, interrupt is generated. Acknowledge the interrupt. Signed-off-by: Syed Saba Kareem Signed-off-by: Vijendar Mukunda --- sound/soc/amd/ps/acp62.h | 2 ++ sound/soc/amd/ps/pci-ps.c | 31 +++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/sound/soc/amd/ps/acp62.h b/sound/soc/amd/ps/acp62.h index 7636bfeb8a8a..563252834b09 100644 --- a/sound/soc/amd/ps/acp62.h +++ b/sound/soc/amd/ps/acp62.h @@ -25,6 +25,7 @@ #define ACP_ERROR_MASK 0x20000000 #define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF +#define PDM_DMA_STAT 0x10 enum acp_config { ACP_CONFIG_0 = 0, @@ -46,6 +47,7 @@ enum acp_config { }; struct pdm_dev_data { + u32 pdm_irq; void __iomem *acp62_base; struct snd_pcm_substream *capture_stream; }; diff --git a/sound/soc/amd/ps/pci-ps.c b/sound/soc/amd/ps/pci-ps.c index 94201f75427a..4140fb42a7f7 100644 --- a/sound/soc/amd/ps/pci-ps.c +++ b/sound/soc/amd/ps/pci-ps.c @@ -11,6 +11,8 @@ #include #include #include +#include +#include #include "acp62.h" @@ -118,6 +120,27 @@ static int acp62_deinit(void __iomem *acp_base) return 0; } +static irqreturn_t acp62_irq_handler(int irq, void *dev_id) +{ + struct acp62_dev_data *adata; + struct pdm_dev_data *ps_pdm_data; + u32 val; + + adata = dev_id; + if (!adata) + return IRQ_NONE; + + val = acp62_readl(adata->acp62_base + ACP_EXTERNAL_INTR_STAT); + if (val & BIT(PDM_DMA_STAT)) { + ps_pdm_data = dev_get_drvdata(&adata->pdev[0]->dev); + acp62_writel(BIT(PDM_DMA_STAT), adata->acp62_base + ACP_EXTERNAL_INTR_STAT); + if (ps_pdm_data->capture_stream) + snd_pcm_period_elapsed(ps_pdm_data->capture_stream); + return IRQ_HANDLED; + } + return IRQ_NONE; +} + static int snd_acp62_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) { @@ -127,7 +150,9 @@ static int snd_acp62_probe(struct pci_dev *pci, int val = 0x00; struct acpi_device *adev; u32 addr; + unsigned int irqflags; + irqflags = IRQF_SHARED; /* Pink Sardine device check */ switch (pci->revision) { case 0x63: @@ -223,6 +248,12 @@ static int snd_acp62_probe(struct pci_dev *pci, goto unregister_devs; } } + ret = devm_request_irq(&pci->dev, pci->irq, acp62_irq_handler, + irqflags, "ACP_PCI_IRQ", adata); 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Signed-off-by: Syed Saba Kareem --- sound/soc/amd/ps/acp62.h | 41 +++++ sound/soc/amd/ps/ps-pdm-dma.c | 310 ++++++++++++++++++++++++++++++++++ 2 files changed, 351 insertions(+) diff --git a/sound/soc/amd/ps/acp62.h b/sound/soc/amd/ps/acp62.h index 563252834b09..525e8bd225a2 100644 --- a/sound/soc/amd/ps/acp62.h +++ b/sound/soc/amd/ps/acp62.h @@ -27,6 +27,31 @@ #define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF #define PDM_DMA_STAT 0x10 +#define PDM_DMA_INTR_MASK 0x10000 +#define ACP_ERROR_STAT 29 +#define PDM_DECIMATION_FACTOR 2 +#define ACP_PDM_CLK_FREQ_MASK 7 +#define ACP_WOV_MISC_CTRL_MASK 0x10 +#define ACP_PDM_ENABLE 1 +#define ACP_PDM_DISABLE 0 +#define ACP_PDM_DMA_EN_STATUS 2 +#define TWO_CH 2 +#define DELAY_US 5 +#define ACP_COUNTER 20000 + +#define ACP_SRAM_PTE_OFFSET 0x03800000 +#define PAGE_SIZE_4K_ENABLE 2 +#define PDM_PTE_OFFSET 0 +#define PDM_MEM_WINDOW_START 0x4000000 + +#define CAPTURE_MIN_NUM_PERIODS 4 +#define CAPTURE_MAX_NUM_PERIODS 4 +#define CAPTURE_MAX_PERIOD_SIZE 8192 +#define CAPTURE_MIN_PERIOD_SIZE 4096 + +#define MAX_BUFFER (CAPTURE_MAX_PERIOD_SIZE * CAPTURE_MAX_NUM_PERIODS) +#define MIN_BUFFER MAX_BUFFER + enum acp_config { ACP_CONFIG_0 = 0, ACP_CONFIG_1, @@ -46,6 +71,22 @@ enum acp_config { ACP_CONFIG_15, }; +struct pdm_stream_instance { + u16 num_pages; + u16 channels; + dma_addr_t dma_addr; + u64 bytescount; + void __iomem *acp62_base; +}; + +union acp_pdm_dma_count { + struct { + u32 low; + u32 high; + } bcount; + u64 bytescount; +}; + struct pdm_dev_data { u32 pdm_irq; void __iomem *acp62_base; diff --git a/sound/soc/amd/ps/ps-pdm-dma.c b/sound/soc/amd/ps/ps-pdm-dma.c index bca2ac3e81f5..a98a2015015d 100644 --- a/sound/soc/amd/ps/ps-pdm-dma.c +++ b/sound/soc/amd/ps/ps-pdm-dma.c @@ -17,6 +17,310 @@ #define DRV_NAME "acp_ps_pdm_dma" +static const struct snd_pcm_hardware acp62_pdm_hardware_capture = { + .info = SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME, + .formats = SNDRV_PCM_FMTBIT_S32_LE, + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .rate_min = 48000, + .rate_max = 48000, + .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE, + .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE, + .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE, + .periods_min = CAPTURE_MIN_NUM_PERIODS, + .periods_max = CAPTURE_MAX_NUM_PERIODS, +}; + +static void acp62_init_pdm_ring_buffer(u32 physical_addr, u32 buffer_size, + u32 watermark_size, void __iomem *acp_base) +{ + acp62_writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR); + acp62_writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE); + acp62_writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE); + acp62_writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL); +} + +static void acp62_enable_pdm_clock(void __iomem *acp_base) +{ + u32 pdm_clk_enable, pdm_ctrl; + + pdm_clk_enable = ACP_PDM_CLK_FREQ_MASK; + pdm_ctrl = 0x00; + + acp62_writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL); + pdm_ctrl = acp62_readl(acp_base + ACP_WOV_MISC_CTRL); + pdm_ctrl |= ACP_WOV_MISC_CTRL_MASK; + acp62_writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL); +} + +static void acp62_enable_pdm_interrupts(void __iomem *acp_base) +{ + u32 ext_int_ctrl; + + ext_int_ctrl = acp62_readl(acp_base + ACP_EXTERNAL_INTR_CNTL); + ext_int_ctrl |= PDM_DMA_INTR_MASK; + acp62_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL); +} + +static void acp62_disable_pdm_interrupts(void __iomem *acp_base) +{ + u32 ext_int_ctrl; + + ext_int_ctrl = acp62_readl(acp_base + ACP_EXTERNAL_INTR_CNTL); + ext_int_ctrl &= ~PDM_DMA_INTR_MASK; + acp62_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL); +} + +static bool acp62_check_pdm_dma_status(void __iomem *acp_base) +{ + bool pdm_dma_status; + u32 pdm_enable, pdm_dma_enable; + + pdm_dma_status = false; + pdm_enable = acp62_readl(acp_base + ACP_WOV_PDM_ENABLE); + pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + if ((pdm_enable & ACP_PDM_ENABLE) && (pdm_dma_enable & ACP_PDM_DMA_EN_STATUS)) + pdm_dma_status = true; + + return pdm_dma_status; +} + +static int acp62_start_pdm_dma(void __iomem *acp_base) +{ + u32 pdm_enable; + u32 pdm_dma_enable; + int timeout; + + pdm_enable = 0x01; + pdm_dma_enable = 0x01; + + acp62_enable_pdm_clock(acp_base); + acp62_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); + acp62_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); + timeout = 0; + while (++timeout < ACP_COUNTER) { + pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + if ((pdm_dma_enable & 0x02) == ACP_PDM_DMA_EN_STATUS) + return 0; + udelay(DELAY_US); + } + return -ETIMEDOUT; +} + +static int acp62_stop_pdm_dma(void __iomem *acp_base) +{ + u32 pdm_enable, pdm_dma_enable; + int timeout; + + pdm_enable = 0x00; + pdm_dma_enable = 0x00; + + pdm_enable = acp62_readl(acp_base + ACP_WOV_PDM_ENABLE); + pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + if (pdm_dma_enable & 0x01) { + pdm_dma_enable = 0x02; + acp62_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); + timeout = 0; + while (++timeout < ACP_COUNTER) { + pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + if ((pdm_dma_enable & 0x02) == 0x00) + break; + udelay(DELAY_US); + } + if (timeout == ACP_COUNTER) + return -ETIMEDOUT; + } + if (pdm_enable == ACP_PDM_ENABLE) { + pdm_enable = ACP_PDM_DISABLE; + acp62_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); + } + acp62_writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH); + return 0; +} + +static void acp62_config_dma(struct pdm_stream_instance *rtd, int direction) +{ + u16 page_idx; + u32 low, high, val; + dma_addr_t addr; + + addr = rtd->dma_addr; + val = PDM_PTE_OFFSET; + + /* Group Enable */ + acp62_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp62_base + + ACPAXI2AXI_ATU_BASE_ADDR_GRP_1); + acp62_writel(PAGE_SIZE_4K_ENABLE, rtd->acp62_base + + ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1); + for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) { + /* Load the low address of page int ACP SRAM through SRBM */ + low = lower_32_bits(addr); + high = upper_32_bits(addr); + + acp62_writel(low, rtd->acp62_base + ACP_SCRATCH_REG_0 + val); + high |= BIT(31); + acp62_writel(high, rtd->acp62_base + ACP_SCRATCH_REG_0 + val + 4); + val += 8; + addr += PAGE_SIZE; + } +} + +static int acp62_pdm_dma_open(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime; + struct pdm_dev_data *adata; + struct pdm_stream_instance *pdm_data; + int ret; + + runtime = substream->runtime; + adata = dev_get_drvdata(component->dev); + pdm_data = kzalloc(sizeof(*pdm_data), GFP_KERNEL); + if (!pdm_data) + return -EINVAL; + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + runtime->hw = acp62_pdm_hardware_capture; + + ret = snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS); + if (ret < 0) { + dev_err(component->dev, "set integer constraint failed\n"); + kfree(pdm_data); + return ret; + } + + acp62_enable_pdm_interrupts(adata->acp62_base); + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + adata->capture_stream = substream; + + pdm_data->acp62_base = adata->acp62_base; + runtime->private_data = pdm_data; + return ret; +} + +static int acp62_pdm_dma_hw_params(struct snd_soc_component *component, + struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct pdm_stream_instance *rtd; + size_t size, period_bytes; + + rtd = substream->runtime->private_data; + if (!rtd) + return -EINVAL; + size = params_buffer_bytes(params); + period_bytes = params_period_bytes(params); + rtd->dma_addr = substream->runtime->dma_addr; + rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT); + acp62_config_dma(rtd, substream->stream); + acp62_init_pdm_ring_buffer(PDM_MEM_WINDOW_START, size, + period_bytes, rtd->acp62_base); + return 0; +} + +static u64 acp62_pdm_get_byte_count(struct pdm_stream_instance *rtd, + int direction) +{ + union acp_pdm_dma_count byte_count; + + byte_count.bcount.high = + acp62_readl(rtd->acp62_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH); + byte_count.bcount.low = + acp62_readl(rtd->acp62_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW); + return byte_count.bytescount; +} + +static snd_pcm_uframes_t acp62_pdm_dma_pointer(struct snd_soc_component *comp, + struct snd_pcm_substream *stream) +{ + struct pdm_stream_instance *rtd; + u32 pos, buffersize; + u64 bytescount; + + rtd = stream->runtime->private_data; + buffersize = frames_to_bytes(stream->runtime, + stream->runtime->buffer_size); + bytescount = acp62_pdm_get_byte_count(rtd, stream->stream); + if (bytescount > rtd->bytescount) + bytescount -= rtd->bytescount; + pos = do_div(bytescount, buffersize); + return bytes_to_frames(stream->runtime, pos); +} + +static int acp62_pdm_dma_new(struct snd_soc_component *component, + struct snd_soc_pcm_runtime *rtd) +{ + struct device *parent = component->dev->parent; + + snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV, + parent, MIN_BUFFER, MAX_BUFFER); + return 0; +} + +static int acp62_pdm_dma_close(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct pdm_dev_data *adata = dev_get_drvdata(component->dev); + + acp62_disable_pdm_interrupts(adata->acp62_base); + adata->capture_stream = NULL; + return 0; +} + +static int acp62_pdm_dai_trigger(struct snd_pcm_substream *substream, + int cmd, struct snd_soc_dai *dai) +{ + struct pdm_stream_instance *rtd; + int ret; + bool pdm_status; + unsigned int ch_mask; + + rtd = substream->runtime->private_data; + ret = 0; + switch (substream->runtime->channels) { + case TWO_CH: + ch_mask = 0x00; + break; + default: + return -EINVAL; + } + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + acp62_writel(ch_mask, rtd->acp62_base + ACP_WOV_PDM_NO_OF_CHANNELS); + acp62_writel(PDM_DECIMATION_FACTOR, rtd->acp62_base + + ACP_WOV_PDM_DECIMATION_FACTOR); + rtd->bytescount = acp62_pdm_get_byte_count(rtd, substream->stream); + pdm_status = acp62_check_pdm_dma_status(rtd->acp62_base); + if (!pdm_status) + ret = acp62_start_pdm_dma(rtd->acp62_base); + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + pdm_status = acp62_check_pdm_dma_status(rtd->acp62_base); + if (pdm_status) + ret = acp62_stop_pdm_dma(rtd->acp62_base); + break; + default: + ret = -EINVAL; + break; + } + return ret; +} + +static const struct snd_soc_dai_ops acp62_pdm_dai_ops = { + .trigger = acp62_pdm_dai_trigger, +}; + static struct snd_soc_dai_driver acp62_pdm_dai_driver = { .name = "acp_ps_pdm_dma.0", .capture = { @@ -27,10 +331,16 @@ static struct snd_soc_dai_driver acp62_pdm_dai_driver = { .rate_min = 48000, .rate_max = 48000, }, + .ops = &acp62_pdm_dai_ops, }; static const struct snd_soc_component_driver acp62_pdm_component = { .name = DRV_NAME, + .open = acp62_pdm_dma_open, + .close = acp62_pdm_dma_close, + .hw_params = acp62_pdm_dma_hw_params, + .pointer = acp62_pdm_dma_pointer, + .pcm_construct = acp62_pdm_dma_new, }; static int acp62_pdm_audio_probe(struct platform_device *pdev) From patchwork Fri Aug 12 12:07:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saba Kareem, Syed" X-Patchwork-Id: 597037 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62141C00140 for ; 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Fri, 12 Aug 2022 07:10:11 -0500 From: Syed Saba kareem To: , Subject: [PATCH 08/13] ASoC: amd: add acp6.2 pci driver pm ops Date: Fri, 12 Aug 2022 17:37:26 +0530 Message-ID: <20220812120731.788052-9-Syed.SabaKareem@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220812120731.788052-1-Syed.SabaKareem@amd.com> References: <20220812120731.788052-1-Syed.SabaKareem@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d4433f9d-a1b0-49a0-6e9d-08da7c5bc23f X-MS-TrafficTypeDiagnostic: BYAPR12MB2597:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: MbMBM+0TGfsJht4duJsgPki0+Z5+nSjnw17753Eb3+r68JoG+Hk/UuJCzh7LLZCuz9J/hyMHXXAP87536u6uqgh2TmE9Q0yW6GuthqkVSR62ICqtkhfZwk9f7kVJ/EbGrQaocSbairbkqNJ5u8l2oHDho+Nv1oT3NXEQBM9Noy41u1ClsVq97c9MWZ54+udI2s/dHMJo6VugDCAAbFBJRJRS7i7Xi30o1/YEKPWQEHcCVLyf/mm45qgH4bD85hoJdPKaLwJZxitTeCqox62fE4I8JpGcLvE5R/SKDxBCwICp+JOVbleIXc4GZq3rxv4pVUilFygcMLLSkO4bBzVLYMlaDdQJCV3OVnfZYiyEAL4JVbnFLTow/OHfoGqCP8Fp1V4YJiEsCeNbWzIxH0cvUG6gis1jT7ntwqb7OvAQ1sn3J/KbU3wY0Y7qqQW3HbTP2ZERHjP/EIyFKdYVQ8wI6guDhxbPe6IefmLAOlTNLpUf/CETMdqDBVY+cqOr1mVPAQbpnumudPCGFFQjGdb89DWJF3l9yBBiJmyBuj8kshIfu1Kdd9MvuxKH6CMsDpP3THD9lLdu8tw4D1guJgubCuht8Xg97DiLeyRH/IYaxphz3bwdmSoFmH3jetwijeLImpZx5XSmXKq/qNeRrRye3GF95Vykeef+q9BSmaPShaMxQiTJ/78DXlA5hTWMoagcihE0CGSGCUn4wxGTbTpe+xJgCs/Wq+ojgDwV+24x1vr5aThLEP9Cav3mco9R3EbWlA8+avnYpcjxm6lyifMFsWoMGfnfW0PaexEK9zmN0T0BtlrdCGlX2itPOihyoPsHI22plMgdMHQK8+ul7SaqgA== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230016)(4636009)(396003)(39860400002)(136003)(376002)(346002)(46966006)(36840700001)(40470700004)(70206006)(316002)(5660300002)(4326008)(478600001)(40460700003)(54906003)(110136005)(82310400005)(8676002)(86362001)(40480700001)(36756003)(70586007)(2906002)(8936002)(36860700001)(83380400001)(82740400003)(81166007)(47076005)(356005)(6666004)(41300700001)(7696005)(426003)(336012)(1076003)(186003)(26005)(2616005)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2022 12:11:16.8057 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d4433f9d-a1b0-49a0-6e9d-08da7c5bc23f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT039.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB2597 Cc: Sunil-kumar.Dommati@amd.com, open list , Basavaraj.Hiregoudar@amd.com, Takashi Iwai , Liam Girdwood , mario.limonciello@amd.com, Vijendar.Mukunda@amd.com, Syed Saba kareem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add acp6.2 pci driver pm ops. Signed-off-by: Syed Saba Kareem Signed-off-by: Vijendar Mukunda --- sound/soc/amd/ps/acp62.h | 3 +++ sound/soc/amd/ps/pci-ps.c | 39 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/sound/soc/amd/ps/acp62.h b/sound/soc/amd/ps/acp62.h index 525e8bd225a2..c5b99e0b81fc 100644 --- a/sound/soc/amd/ps/acp62.h +++ b/sound/soc/amd/ps/acp62.h @@ -52,6 +52,9 @@ #define MAX_BUFFER (CAPTURE_MAX_PERIOD_SIZE * CAPTURE_MAX_NUM_PERIODS) #define MIN_BUFFER MAX_BUFFER +/* time in ms for runtime suspend delay */ +#define ACP_SUSPEND_DELAY_MS 2000 + enum acp_config { ACP_CONFIG_0 = 0, ACP_CONFIG_1, diff --git a/sound/soc/amd/ps/pci-ps.c b/sound/soc/amd/ps/pci-ps.c index 4140fb42a7f7..7e2f68d9fc2c 100644 --- a/sound/soc/amd/ps/pci-ps.c +++ b/sound/soc/amd/ps/pci-ps.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "acp62.h" @@ -258,6 +259,10 @@ static int snd_acp62_probe(struct pci_dev *pci, } break; } + pm_runtime_set_autosuspend_delay(&pci->dev, ACP_SUSPEND_DELAY_MS); + pm_runtime_use_autosuspend(&pci->dev); + pm_runtime_put_noidle(&pci->dev); + pm_runtime_allow(&pci->dev); return 0; unregister_devs: for (--index; index >= 0; index--) @@ -273,6 +278,35 @@ static int snd_acp62_probe(struct pci_dev *pci, return ret; } +static int __maybe_unused snd_acp62_suspend(struct device *dev) +{ + struct acp62_dev_data *adata; + int ret; + + adata = dev_get_drvdata(dev); + ret = acp62_deinit(adata->acp62_base); + if (ret) + dev_err(dev, "ACP de-init failed\n"); + return ret; +} + +static int __maybe_unused snd_acp62_resume(struct device *dev) +{ + struct acp62_dev_data *adata; + int ret; + + adata = dev_get_drvdata(dev); + ret = acp62_init(adata->acp62_base); + if (ret) + dev_err(dev, "ACP init failed\n"); + return ret; +} + +static const struct dev_pm_ops acp62_pm_ops = { + SET_RUNTIME_PM_OPS(snd_acp62_suspend, snd_acp62_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(snd_acp62_suspend, snd_acp62_resume) +}; + static void snd_acp62_remove(struct pci_dev *pci) { struct acp62_dev_data *adata; @@ -286,6 +320,8 @@ static void snd_acp62_remove(struct pci_dev *pci) ret = acp62_deinit(adata->acp62_base); if (ret) dev_err(&pci->dev, "ACP de-init failed\n"); + pm_runtime_forbid(&pci->dev); + pm_runtime_get_noresume(&pci->dev); pci_release_regions(pci); pci_disable_device(pci); } @@ -303,6 +339,9 @@ static struct pci_driver ps_acp62_driver = { .id_table = snd_acp62_ids, .probe = snd_acp62_probe, .remove = snd_acp62_remove, + .driver = { + .pm = &acp62_pm_ops, + } }; module_pci_driver(ps_acp62_driver); From patchwork Fri Aug 12 12:07:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saba Kareem, Syed" X-Patchwork-Id: 596836 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9E0A3C00140 for ; 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Fri, 12 Aug 2022 07:10:41 -0500 From: Syed Saba kareem To: , Subject: [PATCH 09/13] ASoC: amd: add acp6.2 pdm driver pm ops Date: Fri, 12 Aug 2022 17:37:27 +0530 Message-ID: <20220812120731.788052-10-Syed.SabaKareem@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220812120731.788052-1-Syed.SabaKareem@amd.com> References: <20220812120731.788052-1-Syed.SabaKareem@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3c7b7caf-166b-499f-0451-08da7c5bc2b9 X-MS-TrafficTypeDiagnostic: CH2PR12MB3767:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: wn51SiB6J7oy0eVqveox9tiNbhK0rwMwrM8jipbGSEw307JR0spkCi+uw5qNF4Pjb9CnfXXf7wvK1oCGxNf56fqYJwDf83mIONPXBa6DkG/0YjsaXMGlAFGwihz2jwJ1cG1UTMhSQXUmuQ4YySDtY6WemfZ4yGy9yX1Nji6511l3+rhHXu9zIMvkfqOdlggvJYP1EX1rr4i9vpF2mhz0XVO9hJ9RN+bYuQshiOw4mnfiW/bT4e124SNVxMwvPwiFc5kXN4B1tmZLhDnJiR3gRqfvIxu1JZSsvOvExkhq8udkqKqSonrMiEjxC0EwPWXyp4ETfbECvBgCukox71P1BERlowTR0HamkPDZouTLsJnJlXjS/cCQuy1kgl6K0SYkEOeNOHkba8CMOpeix9BhcVj4V/tj3vqXcEWStx1A1SXCgiKBJxES8/Zf9Ak1OJD8Q6hF8TiVrvpYbmL0wX2nh1Opt4RYfwXmGNNd+BKd9VNAfQcMw7Bxnh7p2hzA43HhnBlmvilmcbqhFWApJrjmCYP+6s62DGysEdPyHI8OwSdQv+0tm19mFHVCR0bwKwdA8JMi2ByNLmOftewWY02iRBguShYOWwhiOg2+4q0PQuVuZqvMcMCSb9A9vNFiinh33xFPM1TZ74LxHwBhXS6ATHzxvov/Wp6IDK7vI+j7CVLFoueFJ2bdXQtlfSeWkquwr/89zEAtx+PaAoSWY8ZprTyVla/QU9/ToNYrgjLCduh7Ug4LUTtsQ89UHYnR1ZkoANUZp9OVZ9iYzwTWz/8jgNFFtOtyr9EUeTBwHLC2D+F7XCgGxYcznDp0q5yFgFszdqKoOdMmYK79TWhgXe64jw== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Signed-off-by: Syed Saba Kareem --- sound/soc/amd/ps/ps-pdm-dma.c | 57 +++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/sound/soc/amd/ps/ps-pdm-dma.c b/sound/soc/amd/ps/ps-pdm-dma.c index a98a2015015d..7400fc7e1afd 100644 --- a/sound/soc/amd/ps/ps-pdm-dma.c +++ b/sound/soc/amd/ps/ps-pdm-dma.c @@ -12,6 +12,7 @@ #include #include #include +#include #include "acp62.h" @@ -374,13 +375,69 @@ static int acp62_pdm_audio_probe(struct platform_device *pdev) return -ENODEV; } + pm_runtime_set_autosuspend_delay(&pdev->dev, ACP_SUSPEND_DELAY_MS); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_enable(&pdev->dev); + pm_runtime_allow(&pdev->dev); return 0; } +static int acp62_pdm_audio_remove(struct platform_device *pdev) +{ + pm_runtime_disable(&pdev->dev); + return 0; +} + +static int __maybe_unused acp62_pdm_resume(struct device *dev) +{ + struct pdm_dev_data *adata; + struct snd_pcm_runtime *runtime; + struct pdm_stream_instance *rtd; + u32 period_bytes, buffer_len; + + adata = dev_get_drvdata(dev); + if (adata->capture_stream && adata->capture_stream->runtime) { + runtime = adata->capture_stream->runtime; + rtd = runtime->private_data; + period_bytes = frames_to_bytes(runtime, runtime->period_size); + buffer_len = frames_to_bytes(runtime, runtime->buffer_size); + acp62_config_dma(rtd, SNDRV_PCM_STREAM_CAPTURE); + acp62_init_pdm_ring_buffer(PDM_MEM_WINDOW_START, buffer_len, + period_bytes, adata->acp62_base); + } + acp62_enable_pdm_interrupts(adata->acp62_base); + return 0; +} + +static int __maybe_unused acp62_pdm_suspend(struct device *dev) +{ + struct pdm_dev_data *adata; + + adata = dev_get_drvdata(dev); + acp62_disable_pdm_interrupts(adata->acp62_base); + return 0; +} + +static int __maybe_unused acp62_pdm_runtime_resume(struct device *dev) +{ + struct pdm_dev_data *adata; + + adata = dev_get_drvdata(dev); + acp62_enable_pdm_interrupts(adata->acp62_base); + return 0; +} + +static const struct dev_pm_ops acp62_pdm_pm_ops = { + SET_RUNTIME_PM_OPS(acp62_pdm_suspend, acp62_pdm_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(acp62_pdm_suspend, acp62_pdm_resume) +}; + static struct platform_driver acp62_pdm_dma_driver = { .probe = acp62_pdm_audio_probe, + .remove = acp62_pdm_audio_remove, .driver = { .name = "acp_ps_pdm_dma", + .pm = &acp62_pdm_pm_ops, }, }; From patchwork Fri Aug 12 12:07:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saba Kareem, Syed" X-Patchwork-Id: 597036 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C6672C00140 for ; Fri, 12 Aug 2022 12:13:09 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 12101829; Fri, 12 Aug 2022 14:12:18 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 12101829 DKIM-Signature: v=1; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230016)(4636009)(346002)(376002)(136003)(396003)(39860400002)(36840700001)(46966006)(40470700004)(36860700001)(41300700001)(26005)(2616005)(2906002)(40460700003)(7696005)(86362001)(82310400005)(40480700001)(110136005)(8936002)(36756003)(54906003)(478600001)(7416002)(356005)(82740400003)(81166007)(426003)(336012)(186003)(83380400001)(47076005)(8676002)(316002)(5660300002)(70586007)(1076003)(70206006)(4326008)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2022 12:11:27.4774 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 06daae68-c519-4e43-69d1-08da7c5bc899 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT096.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1889 Cc: Pierre-Louis Bossart , Sunil-kumar.Dommati@amd.com, Kai Vehmanen , Ajit Kumar Pandey , open list , Basavaraj.Hiregoudar@amd.com, Takashi Iwai , Liam Girdwood , Bard Liao , Randy Dunlap , mario.limonciello@amd.com, Vijendar.Mukunda@amd.com, Julian Braha , Daniel Baluta , Lucas Tanure , Syed Saba kareem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Pink Sardine ACP6.2 drivers can be built by selecting necessary kernel config option. The patch enables build support of the same. Signed-off-by: Syed Saba Kareem wq --- sound/soc/amd/Kconfig | 10 ++++++++++ sound/soc/amd/Makefile | 1 + sound/soc/amd/ps/Makefile | 7 +++++++ 3 files changed, 18 insertions(+) create mode 100644 sound/soc/amd/ps/Makefile diff --git a/sound/soc/amd/Kconfig b/sound/soc/amd/Kconfig index 08f5289dac54..0f461beca274 100644 --- a/sound/soc/amd/Kconfig +++ b/sound/soc/amd/Kconfig @@ -127,3 +127,13 @@ config SND_SOC_AMD_RPL_ACP6x triggered for ACP PCI driver. Say m if you have such a device. If unsure select "N". + +config SND_SOC_AMD_PS + tristate "AMD Audio Coprocessor-v6.2 Pink Sardine support" + depends on X86 && PCI + help + This option enables Audio Coprocessor i.e ACP v6.2 support on + AMD Pink sardine platform. By enabling this flag build will be + triggered for ACP PCI driver, ACP PDM DMA driver. + Say m if you have such a device. + If unsure select "N". diff --git a/sound/soc/amd/Makefile b/sound/soc/amd/Makefile index 0592e7c5c407..82e1cf864a40 100644 --- a/sound/soc/amd/Makefile +++ b/sound/soc/amd/Makefile @@ -18,3 +18,4 @@ obj-$(CONFIG_SND_SOC_AMD_ACP6x) += yc/ obj-$(CONFIG_SND_SOC_AMD_ACP_COMMON) += acp/ obj-$(CONFIG_SND_AMD_ACP_CONFIG) += snd-acp-config.o obj-$(CONFIG_SND_SOC_AMD_RPL_ACP6x) += rpl/ +obj-$(CONFIG_SND_SOC_AMD_PS) += ps/ diff --git a/sound/soc/amd/ps/Makefile b/sound/soc/amd/ps/Makefile new file mode 100644 index 000000000000..23afa5e32ffa --- /dev/null +++ b/sound/soc/amd/ps/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Pink Sardine platform Support +snd-pci-ps-objs := pci-ps.o +snd-ps-pdm-dma-objs := ps-pdm-dma.o + +obj-$(CONFIG_SND_SOC_AMD_PS) += snd-pci-ps.o +obj-$(CONFIG_SND_SOC_AMD_PS) += snd-ps-pdm-dma.o From patchwork Fri Aug 12 12:07:29 2022 Content-Type: text/plain; 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Signed-off-by: Syed Saba Kareem Signed-off-by: Vijendar Mukunda --- sound/soc/amd/ps/acp62.h | 2 +- sound/soc/amd/ps/pci-ps.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/sound/soc/amd/ps/acp62.h b/sound/soc/amd/ps/acp62.h index c5b99e0b81fc..d6ac5781acf9 100644 --- a/sound/soc/amd/ps/acp62.h +++ b/sound/soc/amd/ps/acp62.h @@ -11,7 +11,7 @@ #define ACP62_PHY_BASE_ADDRESS 0x1240000 #define ACP6x_REG_START 0x1240000 #define ACP6x_REG_END 0x1250200 -#define ACP6x_DEVS 2 +#define ACP6x_DEVS 3 #define ACP6x_PDM_MODE 1 #define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001 diff --git a/sound/soc/amd/ps/pci-ps.c b/sound/soc/amd/ps/pci-ps.c index 7e2f68d9fc2c..3172db1b728b 100644 --- a/sound/soc/amd/ps/pci-ps.c +++ b/sound/soc/amd/ps/pci-ps.c @@ -237,6 +237,10 @@ static int snd_acp62_probe(struct pci_dev *pci, pdevinfo[1].id = 0; pdevinfo[1].parent = &pci->dev; + pdevinfo[2].name = "acp_ps_mach"; + pdevinfo[2].id = 0; + pdevinfo[2].parent = &pci->dev; + for (index = 0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230016)(4636009)(136003)(39860400002)(396003)(346002)(376002)(36840700001)(46966006)(40470700004)(7696005)(82740400003)(81166007)(41300700001)(86362001)(356005)(26005)(36860700001)(336012)(2616005)(186003)(6666004)(1076003)(426003)(40460700003)(47076005)(5660300002)(8936002)(4326008)(8676002)(70206006)(36756003)(40480700001)(70586007)(82310400005)(2906002)(110136005)(478600001)(54906003)(316002)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2022 12:12:07.1615 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5d6e2f03-b87f-46dd-f3c4-08da7c5be03b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT030.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3968 Cc: Sunil-kumar.Dommati@amd.com, open list , Basavaraj.Hiregoudar@amd.com, Takashi Iwai , Liam Girdwood , mario.limonciello@amd.com, Vijendar.Mukunda@amd.com, Syed Saba kareem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add Pink Sardine platform machine driver using dmic. Signed-off-by: Syed Saba Kareem --- sound/soc/amd/ps/ps-mach.c | 79 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 sound/soc/amd/ps/ps-mach.c diff --git a/sound/soc/amd/ps/ps-mach.c b/sound/soc/amd/ps/ps-mach.c new file mode 100644 index 000000000000..b3e97093481d --- /dev/null +++ b/sound/soc/amd/ps/ps-mach.c @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Machine driver for AMD Pink Sardine platform using DMIC + * + * Copyright 2022 Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "acp62.h" + +#define DRV_NAME "acp_ps_mach" + +SND_SOC_DAILINK_DEF(acp62_pdm, + DAILINK_COMP_ARRAY(COMP_CPU("acp_ps_pdm_dma.0"))); + +SND_SOC_DAILINK_DEF(dmic_codec, + DAILINK_COMP_ARRAY(COMP_CODEC("dmic-codec.0", + "dmic-hifi"))); + +SND_SOC_DAILINK_DEF(pdm_platform, + DAILINK_COMP_ARRAY(COMP_PLATFORM("acp_ps_pdm_dma.0"))); + +static struct snd_soc_dai_link acp62_dai_pdm[] = { + { + .name = "acp62-dmic-capture", + .stream_name = "DMIC capture", + .capture_only = 1, + SND_SOC_DAILINK_REG(acp62_pdm, dmic_codec, pdm_platform), + }, +}; + +static struct snd_soc_card acp62_card = { + .name = "acp62", + .owner = THIS_MODULE, + .dai_link = acp62_dai_pdm, + .num_links = 1, +}; + +static int acp62_probe(struct platform_device *pdev) +{ + struct acp62_pdm *machine = NULL; + struct snd_soc_card *card; + int ret; + + platform_set_drvdata(pdev, &acp62_card); + card = platform_get_drvdata(pdev); + acp62_card.dev = &pdev->dev; + + snd_soc_card_set_drvdata(card, machine); + ret = devm_snd_soc_register_card(&pdev->dev, card); + if (ret) { + return dev_err_probe(&pdev->dev, ret, + "snd_soc_register_card(%s) failed\n", + card->name); + } + + return 0; +} + +static struct platform_driver acp62_mach_driver = { + .driver = { + .name = "acp_ps_mach", + .pm = &snd_soc_pm_ops, + }, + .probe = acp62_probe, +}; + +module_platform_driver(acp62_mach_driver); + +MODULE_AUTHOR("Syed.SabaKareem@amd.com"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:" DRV_NAME); From patchwork Fri Aug 12 12:07:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saba Kareem, Syed" X-Patchwork-Id: 597034 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E37EC00140 for ; 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Fri, 12 Aug 2022 07:11:41 -0500 From: Syed Saba kareem To: , Subject: [PATCH 13/13] ASoC: amd: enable Pink sardine platform machine driver build. Date: Fri, 12 Aug 2022 17:37:31 +0530 Message-ID: <20220812120731.788052-14-Syed.SabaKareem@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220812120731.788052-1-Syed.SabaKareem@amd.com> References: <20220812120731.788052-1-Syed.SabaKareem@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ad27d460-8ec1-4ceb-febf-08da7c5bede7 X-MS-TrafficTypeDiagnostic: BN8PR12MB3395:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: l/hF5UY7p8Ff3TnD382yaxQAzecZwYwkZEr/e3cl5L+GlOL5aVBQ224FAFhV0su3CB6WW/esrR3vuL2UWTSkzMYyNbzGJ0Y0hEHJ3+z4pS0lMZ5xzB9uU7dP4LkxIO1j5tVDF2+pv/FWNcKAZ9M3CPyiJ9syh4Af+YXaTck8i8d381D51Rq7S7ZXzMux/yD7gDk7aejYla/FrZpv0Ah2WFsXLRcXuwdfwa5E9XDthpkAvg7M+T814mVdia+5DsMoNcQJeevqApy40F32BSDRuxmr6QkAYVVx17PDLZkRAmnMY7+RjJJkv+wCWERpUdjObu/NDJjHOHUGNOfl8XXuDWIliHCG6gN5STC2KDcy4Y9bHA2JCtmqUfUjsFyxnFbL8FamV1jCMD5dDgXxxRZv521QFjkjITFOF0E/MTdImd9DrIJx+vwgCmYdXntzytJELqlZujiBFNyVKrbv/TvFCXR9vKYPsnhmnOYZEYeNrNyhxoOe4WTatWOrKE5dDOJFjN0dxfZ2Z6ux71XH+ChWeWzyLXPflcV3xCP6p03JShyVDxpyfeLw06XsWazc3eA0AMIHH6BWB/AU/98ldt+yDj2icDjLhTY7E0CPrQuM+sNpnzCXdOtVnO769eqDmorcB7/QtpMwHHhD9fs/BWV/WIoMR7FbctlEwEBNOHj3kZOd1OA5zr+PKUIujuQASVgLtZ3+4ty0wBdQXltfhLp1F21YedtSxjwjcAHsAOB/WZqKlc75001aihIbLJYrwL/6qVWYvG5kTzB1UReKvvyIiktmRivJHH8Ixb/AjMaq2Sil+d/L9F+hBu/z4ducfYwKBbxIMuAxsTmOYkrZQP/8Lg== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230016)(4636009)(396003)(39860400002)(136003)(376002)(346002)(46966006)(36840700001)(40470700004)(70206006)(316002)(5660300002)(4326008)(478600001)(40460700003)(54906003)(110136005)(82310400005)(8676002)(86362001)(40480700001)(36756003)(70586007)(2906002)(7416002)(8936002)(36860700001)(83380400001)(82740400003)(81166007)(47076005)(356005)(6666004)(41300700001)(7696005)(426003)(336012)(1076003)(186003)(26005)(2616005)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2022 12:12:30.0056 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ad27d460-8ec1-4ceb-febf-08da7c5bede7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT059.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3395 Cc: Pierre-Louis Bossart , Sunil-kumar.Dommati@amd.com, Kai Vehmanen , Ajit Kumar Pandey , open list , Basavaraj.Hiregoudar@amd.com, Takashi Iwai , Liam Girdwood , Randy Dunlap , mario.limonciello@amd.com, Vijendar.Mukunda@amd.com, Julian Braha , Lucas Tanure , Syed Saba kareem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" This patch enables Pink Sardine platform machine driver build. Signed-off-by: Syed Saba Kareem --- sound/soc/amd/Kconfig | 11 +++++++++++ sound/soc/amd/ps/Makefile | 2 ++ 2 files changed, 13 insertions(+) diff --git a/sound/soc/amd/Kconfig b/sound/soc/amd/Kconfig index 0f461beca274..883b132a87e5 100644 --- a/sound/soc/amd/Kconfig +++ b/sound/soc/amd/Kconfig @@ -137,3 +137,14 @@ config SND_SOC_AMD_PS triggered for ACP PCI driver, ACP PDM DMA driver. Say m if you have such a device. If unsure select "N". + +config SND_SOC_AMD_PS_MACH + tristate "AMD PINK SARDINE support for DMIC" + select SND_SOC_DMIC + depends on SND_SOC_AMD_PS + help + This option enables machine driver for Pink Sardine platform + using dmic. ACP IP has PDM Decoder block with DMA controller. + DMIC can be connected directly to ACP IP. + Say m if you have such a device. + If unsure select "N". diff --git a/sound/soc/amd/ps/Makefile b/sound/soc/amd/ps/Makefile index 23afa5e32ffa..383973a12f6a 100644 --- a/sound/soc/amd/ps/Makefile +++ b/sound/soc/amd/ps/Makefile @@ -2,6 +2,8 @@ # Pink Sardine platform Support snd-pci-ps-objs := pci-ps.o snd-ps-pdm-dma-objs := ps-pdm-dma.o +snd-soc-ps-mach-objs := ps-mach.o obj-$(CONFIG_SND_SOC_AMD_PS) += snd-pci-ps.o obj-$(CONFIG_SND_SOC_AMD_PS) += snd-ps-pdm-dma.o +obj-$(CONFIG_SND_SOC_AMD_PS_MACH) += snd-soc-ps-mach.o