From patchwork Wed Aug 10 04:07:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 596476 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80960C00140 for ; Wed, 10 Aug 2022 04:05:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230287AbiHJEFN (ORCPT ); Wed, 10 Aug 2022 00:05:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33524 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230441AbiHJEFJ (ORCPT ); Wed, 10 Aug 2022 00:05:09 -0400 Received: from mail-oi1-x236.google.com (mail-oi1-x236.google.com [IPv6:2607:f8b0:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 553B96FA08 for ; Tue, 9 Aug 2022 21:05:09 -0700 (PDT) Received: by mail-oi1-x236.google.com with SMTP id n133so16377660oib.0 for ; Tue, 09 Aug 2022 21:05:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=xXPgGKwOMrjLyfAADDT/AWNmata1kzLm9fIfAkbzbZM=; b=qAnvnfMMVZYcYHicgKM2AGxF/A7jQubJZ6OJJyF+JPog16lBXI23vNPbgCFoIjKV9N 4Cl/caJ3ga3MMWImjVlfrBNE8AEqNX02w0KwFtjyw4Rrgae2O5ZYXPbmBrXdF8XnzEAE E0LxPqYNeTJzuB3GSYudPHfnbXJsZRn8lG/wbs6UULyAws2d86RCR5AXgFZlLeF9RIhS ikZ0EteS7pAtqISbDgBtNFnni6qVbdq0Susrw5VKR/C6GjhC/xRrmpLd9VN6OIN5YkVl MXx8lDHSnvhZnm3MZiY7XwR7XrdxEiAzg14WB6XXdJba5dCGiAx7OTqQcWKqntya0X5Y XT1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=xXPgGKwOMrjLyfAADDT/AWNmata1kzLm9fIfAkbzbZM=; b=fiCpR+kvTY7LfyInOH4XPrwLKI0rNQCJax03hdyCUp91zNJNP/B5D23z9WwhE6hd0m 4v7UYC6nYDB80+4Urwghm1LPDdu032QvAh4f/qBnCNbUKeR0jJA1tpx3I1mUBERaJalF 1PeZdT7LyCktp1yz+87YULINCx3TqOqZ6ovPJyDwYfRQhEKKoIX3TLpi3+AASZBlEHbX tZmgTLPDN77vpdPhBjukJLqRzjGYDJFrm0cJzE3dHO2tpKPGs+z4V8CjEGpZd3QuCKUp 2LPjl3TsvtdhpXSIxQ4Wi0OcRz6i6QXvOi1ysx2q/08/v8oqmoOIPeNQ3CNJSTwMXcyW fWGA== X-Gm-Message-State: ACgBeo2WzXeIwSy2+TBsF9acWUvaj1rA1LDZ21g18jPnjToJyc5kqG// C10WKqUX8YCsgGsdTfuBwfKfAA== X-Google-Smtp-Source: AA6agR5RykGQceERY8ctKnJAYF2cVcM8MVRZuZecMttZYm7qy2ENEgWrTeNpmoGCS32W7HWPfwivPQ== X-Received: by 2002:a05:6808:190f:b0:343:2fbd:9b62 with SMTP id bf15-20020a056808190f00b003432fbd9b62mr392751oib.176.1660104309089; Tue, 09 Aug 2022 21:05:09 -0700 (PDT) Received: from ripper.. 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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id q6-20020a056830440600b00616dfd2c859sm449027otv.59.2022.08.09.21.05.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Aug 2022 21:05:08 -0700 (PDT) From: Bjorn Andersson To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/5] dt-bindings: phy: qcom-edp: Add SC8280XP PHY compatibles Date: Tue, 9 Aug 2022 21:07:41 -0700 Message-Id: <20220810040745.3582985-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220810040745.3582985-1-bjorn.andersson@linaro.org> References: <20220810040745.3582985-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Qualcomm SC8280XP platform has both eDP and DP PHYs, add compatibles for these. Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml index cf9e9b8011cb..1e104ae76ee6 100644 --- a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml @@ -19,6 +19,8 @@ properties: enum: - qcom,sc7280-edp-phy - qcom,sc8180x-edp-phy + - qcom,sc8280xp-dp-phy + - qcom,sc8280xp-edp-phy reg: items: From patchwork Wed Aug 10 04:07:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 597095 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E676AC25B07 for ; Wed, 10 Aug 2022 04:05:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230436AbiHJEFm (ORCPT ); Wed, 10 Aug 2022 00:05:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230433AbiHJEFM (ORCPT ); Wed, 10 Aug 2022 00:05:12 -0400 Received: from mail-oa1-x2d.google.com (mail-oa1-x2d.google.com [IPv6:2001:4860:4864:20::2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F2F38F for ; Tue, 9 Aug 2022 21:05:10 -0700 (PDT) Received: by mail-oa1-x2d.google.com with SMTP id 586e51a60fabf-10dc1b16c12so16448510fac.6 for ; Tue, 09 Aug 2022 21:05:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=HzcSJs+NvWUdifTJLSaa1lWlyL4/HJWO6YyuNswmu8k=; b=F+jj/+NblCgAiqI7gTvhil038xrXyct9C3al/0zb0I0AIF/Q8ANqfp/VQky13ntjWk sp838B0eILlMKMNT0J9TyjsfQPZi3ltxstK4VU8OlpdHRpJQavuFO69O5H6nK5+x2BiF mABLuh4eHe5gbY8bFROJcDKIPYE4SeX5yu6i2ms1ELAx0jX+R1cFUUW33zzziC5PZBz8 46JVLpAEpyoPRIlZ42RbUB2EXuQBa0942SHTbrsWot2LrwWiHfCdhf4Z+hJcpgIlzxeV IkOMXktCOHhDU99vmycgdZUnpe336z7bJmlJzkxLVYf9aLlp2cjhPib3IambJzqy+Ddd bdSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=HzcSJs+NvWUdifTJLSaa1lWlyL4/HJWO6YyuNswmu8k=; b=qWtk1A5dQ2K3JJ0mLDSOAz8zb7ixZ1TO+pBYoAudKbCzFsjUHbTI0SpZBhif42FswD OGa+8rTEVoFxwHfIP7QMGF4gZfysT45AI0YxwfDfr2X6HDz/p7dOBUZUt8oeVGfxauck vVJ/ypjtnnsflKepHnSSK7mabxYbDOejxjDZF7F4TwPT9XX8xQ2vkYKBMRULf3tBP9r2 0aVzwHa92Srvb80wUv436D+6W/M/uoP4viPoj69Ehcz1hmAkZQAyLeE1ufaU730baMIk wfJcYBrcA/C0GB75w2US47uYDwIacK/l94/2Z27pbCpQNH9PKP2F5TgIrcjooyxXiUjI JrXA== X-Gm-Message-State: ACgBeo2BxcUeevQ1u7bBLRhvx5r260Ebs/MaLICFcsmIIK/q7j9W4N3E ZquzAaqGhxr0nFMVcs0ABfbXVA== X-Google-Smtp-Source: AA6agR73b4wlzonVOhZjp7c4P1ifYkupQzqac6zf6QWTANNg3mP5G3KpN2C/JmlXJeOgYzK+j9Mfeg== X-Received: by 2002:a05:6870:2423:b0:fe:4131:6db9 with SMTP id n35-20020a056870242300b000fe41316db9mr679490oap.75.1660104310120; Tue, 09 Aug 2022 21:05:10 -0700 (PDT) Received: from ripper.. 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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id q6-20020a056830440600b00616dfd2c859sm449027otv.59.2022.08.09.21.05.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Aug 2022 21:05:09 -0700 (PDT) From: Bjorn Andersson To: Kishon Vijay Abraham I , Vinod Koul Cc: Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] phy: qcom: edp: Generate unique clock names Date: Tue, 9 Aug 2022 21:07:42 -0700 Message-Id: <20220810040745.3582985-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220810040745.3582985-1-bjorn.andersson@linaro.org> References: <20220810040745.3582985-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org With multiple Displayport PHYs the hard coded clock names collides, generate unique clock names based on the device name instead. Signed-off-by: Bjorn Andersson --- drivers/phy/qualcomm/phy-qcom-edp.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c index 7e3570789845..41aa28291cea 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -571,21 +571,24 @@ static int qcom_edp_clks_register(struct qcom_edp *edp, struct device_node *np) { struct clk_hw_onecell_data *data; struct clk_init_data init = { }; + char name[64]; int ret; data = devm_kzalloc(edp->dev, struct_size(data, hws, 2), GFP_KERNEL); if (!data) return -ENOMEM; + snprintf(name, sizeof(name), "%s::link_clk", dev_name(edp->dev)); init.ops = &qcom_edp_dp_link_clk_ops; - init.name = "edp_phy_pll_link_clk"; + init.name = name; edp->dp_link_hw.init = &init; ret = devm_clk_hw_register(edp->dev, &edp->dp_link_hw); if (ret) return ret; + snprintf(name, sizeof(name), "%s::vco_div_clk", dev_name(edp->dev)); init.ops = &qcom_edp_dp_pixel_clk_ops; - init.name = "edp_phy_pll_vco_div_clk"; + init.name = name; edp->dp_pixel_hw.init = &init; ret = devm_clk_hw_register(edp->dev, &edp->dp_pixel_hw); if (ret) From patchwork Wed Aug 10 04:07:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 596475 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E53BC00140 for ; Wed, 10 Aug 2022 04:05:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230443AbiHJEFn (ORCPT ); Wed, 10 Aug 2022 00:05:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230444AbiHJEFO (ORCPT ); Wed, 10 Aug 2022 00:05:14 -0400 Received: from mail-oa1-x35.google.com (mail-oa1-x35.google.com [IPv6:2001:4860:4864:20::35]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1968B5FF5 for ; Tue, 9 Aug 2022 21:05:12 -0700 (PDT) Received: by mail-oa1-x35.google.com with SMTP id 586e51a60fabf-f2a4c51c45so16428206fac.9 for ; Tue, 09 Aug 2022 21:05:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=cH3gEx8fSSVvttzCeah2rBVrmjrn0CZnJ9l69q/KYmY=; b=NGQOnE3UkKSNmdlloSP6/pskV7F60rjNepp4GAstvay9+NQ7eYpEi6HgRaf1dbOEW5 sRM6H78LrFfMKuPQQ+kx67Wfu/ZPeoRcnsjjESolzEdPGGMCiYspMtHEWtWwHRJgZq0b CRSWEKuKc6OtJOEFslLDbl1caYV5rwSRjIwYXCc7nOZCbOALE43rAV3RtZFgBgo4pY5H 3p+uT5hht5KlPtCw14hqylZKyAbBVVAEWn1htr8XdOs0ebwYe9Szu89rDOGjHmr6bXpJ 4CP/2x5ob1XGTWykZRg4oG1z56IOCO/uL16cvv4xzIaick+Hb9Jh1j3Eve2ApeKeLFGQ +eFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=cH3gEx8fSSVvttzCeah2rBVrmjrn0CZnJ9l69q/KYmY=; b=HznHZYtRst7p7kdSvmMNWA3x0BDSlEC3b3YBgVlTfyfsWCs+zjLus03OsitUK+soe8 tP9dIu0yVnPwWBUoYhOU5V+D6eZF+hXcM7/517xXByRzn00oHhJQacMPH5V4jFs0/tXa 8DeOq1OAEPyIdbewJwV1DBp/NnFg5s85a9yiPvBgPtWRQ8Bmz1zwh3x3Vt1tfMLRB5GN Bgfj9l/u/QzZhfwTvgd1gjxH5TMeYdzp1GMUeWVftvAVOR09zseGx5RZgDw04kfrWp0n 1y0UgQzrpoP1aT8uStXy6RXt8GjxJZUcV+Q7VtUQtG2i25o5N/P/SMzShlVtQuPTrW/K tS/A== X-Gm-Message-State: ACgBeo0F+AMjKUpwcAtau2/6jnbSdDb12Wevr/aSTtpg5M1qgVydjsll SNtdanFhhNEEPgKfgfLX39gaxg== X-Google-Smtp-Source: AA6agR6o2ARcIuuuo86XC0au9dC67ExmDYqSy3iCxd08Q8BeQdcm35NOsnIDmRNUKCYcLUn4xlkntg== X-Received: by 2002:a05:6870:310e:b0:113:a9bf:57e7 with SMTP id v14-20020a056870310e00b00113a9bf57e7mr668647oaa.219.1660104311205; Tue, 09 Aug 2022 21:05:11 -0700 (PDT) Received: from ripper.. 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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id q6-20020a056830440600b00616dfd2c859sm449027otv.59.2022.08.09.21.05.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Aug 2022 21:05:10 -0700 (PDT) From: Bjorn Andersson To: Kishon Vijay Abraham I , Vinod Koul Cc: Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] phy: qcom: edp: Perform lane configuration Date: Tue, 9 Aug 2022 21:07:43 -0700 Message-Id: <20220810040745.3582985-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220810040745.3582985-1-bjorn.andersson@linaro.org> References: <20220810040745.3582985-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The TRANSCIEVER_BIAS_EN, HIGHZ_DRVR_EN and PHY_CFG_1 registers are used for lane configuration, with the currently hard coded configuration being a mix of 2 and 4 lane (effectively 2-lane). Properly implement lane configuration for 1, 2 and 4 lanes. Signed-off-by: Bjorn Andersson --- drivers/phy/qualcomm/phy-qcom-edp.c | 32 ++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c index 41aa28291cea..32614fb838b5 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -315,9 +315,11 @@ static int qcom_edp_set_vco_div(const struct qcom_edp *edp) static int qcom_edp_phy_power_on(struct phy *phy) { const struct qcom_edp *edp = phy_get_drvdata(phy); + u32 bias0_en, drvr0_en, bias1_en, drvr1_en; int timeout; int ret; u32 val; + u8 cfg1; writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | DP_PHY_PD_CTL_LANE_0_1_PWRDN | DP_PHY_PD_CTL_LANE_2_3_PWRDN | @@ -398,11 +400,31 @@ static int qcom_edp_phy_power_on(struct phy *phy) writel(0x1f, edp->tx0 + TXn_TX_DRV_LVL); writel(0x1f, edp->tx1 + TXn_TX_DRV_LVL); - writel(0x4, edp->tx0 + TXn_HIGHZ_DRVR_EN); - writel(0x3, edp->tx0 + TXn_TRANSCEIVER_BIAS_EN); - writel(0x4, edp->tx1 + TXn_HIGHZ_DRVR_EN); - writel(0x0, edp->tx1 + TXn_TRANSCEIVER_BIAS_EN); - writel(0x3, edp->edp + DP_PHY_CFG_1); + if (edp->dp_opts.lanes == 1) { + bias0_en = 0x01; + bias1_en = 0x00; + drvr0_en = 0x06; + drvr1_en = 0x07; + cfg1 = 0x1; + } else if (edp->dp_opts.lanes == 2) { + bias0_en = 0x03; + bias1_en = 0x00; + drvr0_en = 0x04; + drvr1_en = 0x07; + cfg1 = 0x3; + } else { + bias0_en = 0x03; + bias1_en = 0x03; + drvr0_en = 0x04; + drvr1_en = 0x04; + cfg1 = 0xf; + } + + writel(drvr0_en, edp->tx0 + TXn_HIGHZ_DRVR_EN); + writel(bias0_en, edp->tx0 + TXn_TRANSCEIVER_BIAS_EN); + writel(drvr1_en, edp->tx1 + TXn_HIGHZ_DRVR_EN); + writel(bias1_en, edp->tx1 + TXn_TRANSCEIVER_BIAS_EN); + writel(cfg1, edp->edp + DP_PHY_CFG_1); writel(0x18, edp->edp + DP_PHY_CFG); usleep_range(100, 1000); From patchwork Wed Aug 10 04:07:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 597094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10D58C25B07 for ; Wed, 10 Aug 2022 04:05:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230438AbiHJEFo (ORCPT ); Wed, 10 Aug 2022 00:05:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230449AbiHJEFP (ORCPT ); Wed, 10 Aug 2022 00:05:15 -0400 Received: from mail-oa1-x34.google.com (mail-oa1-x34.google.com [IPv6:2001:4860:4864:20::34]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A08D06548 for ; Tue, 9 Aug 2022 21:05:12 -0700 (PDT) Received: by mail-oa1-x34.google.com with SMTP id 586e51a60fabf-10ec41637b3so16456041fac.4 for ; Tue, 09 Aug 2022 21:05:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=Ndd7GVOJq64yRB5q+nG+1O8Ki0y0Qk32lK28P7SYTeg=; b=ZICWcSO7UDTKte7hQmLufWNHbm5eqdJVlyaH3TLo+ctWq28fKrJE54I9E37Jk/KaGE UotXhHPN2sdiq2ezO8M9+JMZPM4BNPIswPeXzP04u5N8NESOt0lplh3yunlPFnNj4Jhw 9ch3NJOKSU2FPI0BSUSJin6xrz+wEod8as13ejYGnJEP5uPfREhI86AHPOwBxjDrtMAO uTRsEPM0nKzgr0+oyhXOV9QXG/cWpYLoKwVm8w51qJmHCUi8idsnucBZA39C4te+xOU8 dRIEIbc24LOUBYcl4mqoy4DoZAI13672TXZ8fSSbOwM8S3x1tmi4ImI1CI4piZQ17rB5 +u0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=Ndd7GVOJq64yRB5q+nG+1O8Ki0y0Qk32lK28P7SYTeg=; b=Zb+0wJcflUOp3W3oQHI0Dip71yGGJ0lnJZLbpi/n9POhruWRecpulMkzqg6Z5NKStW yCrKw0PHq2U0P9QuQXD8k+CWZy3O66o+a3DW8Fn2I6L027uJpQTRQSVOdkDtGL/vWrdI VaU0GDDCnrZg4v2vY0CXhSLpVh42az50PfdYBOTFqXsFvpSD+3hOBG3qEiP0ZrBhzDJ9 +2mCb7liyLo+PCzkaNey9VKqN0HTBwWHWFdYX7i2gq+914q5gSoH2db3Qj+sRdR/9EVn jyE5AdB+0a+dP6OKzprzUHLnxKWtt6tYs1MH8gHZBS/0XALmiAflnnBg8kq+Eks5PA3i LYpg== X-Gm-Message-State: ACgBeo2x2rn5nipPlDVJvPgQjG07KeI0H9NfTxQ2JpDtSjYUDM9AOhGY ZK0wvs3H37zM5S7AcLGXZVx4dA== X-Google-Smtp-Source: AA6agR5DLkTSzdsowisb+O8eZGxuq561vdngF37Prt7DIl5waI3gba3oSw8Fj+0kjL3Ah7KRHQvo8A== X-Received: by 2002:a05:6870:ec93:b0:10e:75ae:8177 with SMTP id eo19-20020a056870ec9300b0010e75ae8177mr686789oab.234.1660104312359; Tue, 09 Aug 2022 21:05:12 -0700 (PDT) Received: from ripper.. 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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id q6-20020a056830440600b00616dfd2c859sm449027otv.59.2022.08.09.21.05.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Aug 2022 21:05:11 -0700 (PDT) From: Bjorn Andersson To: Kishon Vijay Abraham I , Vinod Koul Cc: Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] phy: qcom: edp: Introduce support for DisplayPort Date: Tue, 9 Aug 2022 21:07:44 -0700 Message-Id: <20220810040745.3582985-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220810040745.3582985-1-bjorn.andersson@linaro.org> References: <20220810040745.3582985-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The eDP phy can be used to drive either eDP or DP output, with some minor variations in some of the configuration and seemingly a need for implementing swing and pre_emphasis calibration. Introduce a config object, indicating if the phy is operating in eDP or DP mode and swing/pre-emphasis calibration to support this. Signed-off-by: Bjorn Andersson --- drivers/phy/qualcomm/phy-qcom-edp.c | 80 +++++++++++++++++++++++++++-- 1 file changed, 76 insertions(+), 4 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c index 32614fb838b5..301ac422d2fe 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -70,8 +70,19 @@ #define TXn_TRAN_DRVR_EMP_EN 0x0078 +struct qcom_edp_cfg { + bool is_dp; + + /* DP PHY swing and pre_emphasis tables */ + const u8 (*swing_hbr_rbr)[4][4]; + const u8 (*swing_hbr3_hbr2)[4][4]; + const u8 (*pre_emphasis_hbr_rbr)[4][4]; + const u8 (*pre_emphasis_hbr3_hbr2)[4][4]; +}; + struct qcom_edp { struct device *dev; + const struct qcom_edp_cfg *cfg; struct phy *phy; @@ -92,7 +103,9 @@ struct qcom_edp { static int qcom_edp_phy_init(struct phy *phy) { struct qcom_edp *edp = phy_get_drvdata(phy); + const struct qcom_edp_cfg *cfg = edp->cfg; int ret; + u8 cfg8; ret = regulator_bulk_enable(ARRAY_SIZE(edp->supplies), edp->supplies); if (ret) @@ -117,6 +130,13 @@ static int qcom_edp_phy_init(struct phy *phy) DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, edp->edp + DP_PHY_PD_CTL); + if (cfg && cfg->is_dp) + cfg8 = 0xb7; + else + cfg8 = 0x37; + + writel(0xfc, edp->edp + DP_PHY_MODE); + writel(0x00, edp->edp + DP_PHY_AUX_CFG0); writel(0x13, edp->edp + DP_PHY_AUX_CFG1); writel(0x24, edp->edp + DP_PHY_AUX_CFG2); @@ -125,7 +145,7 @@ static int qcom_edp_phy_init(struct phy *phy) writel(0x26, edp->edp + DP_PHY_AUX_CFG5); writel(0x0a, edp->edp + DP_PHY_AUX_CFG6); writel(0x03, edp->edp + DP_PHY_AUX_CFG7); - writel(0x37, edp->edp + DP_PHY_AUX_CFG8); + writel(cfg8, edp->edp + DP_PHY_AUX_CFG8); writel(0x03, edp->edp + DP_PHY_AUX_CFG9); writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | @@ -142,14 +162,60 @@ static int qcom_edp_phy_init(struct phy *phy) return ret; } +static int qcom_edp_set_voltages(struct qcom_edp *edp, const struct phy_configure_opts_dp *dp_opts) +{ + const struct qcom_edp_cfg *cfg = edp->cfg; + unsigned int v_level = 0; + unsigned int p_level = 0; + u8 ldo_config; + u8 swing; + u8 emph; + int i; + + if (!cfg) + return 0; + + for (i = 0; i < dp_opts->lanes; i++) { + v_level = max(v_level, dp_opts->voltage[i]); + p_level = max(p_level, dp_opts->pre[i]); + } + + if (dp_opts->link_rate <= 2700) { + swing = (*cfg->swing_hbr_rbr)[v_level][p_level]; + emph = (*cfg->pre_emphasis_hbr_rbr)[v_level][p_level]; + } else { + swing = (*cfg->swing_hbr3_hbr2)[v_level][p_level]; + emph = (*cfg->pre_emphasis_hbr3_hbr2)[v_level][p_level]; + } + + if (swing == 0xff || emph == 0xff) + return -EINVAL; + + ldo_config = (cfg && cfg->is_dp) ? 0x1 : 0x0; + + writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG); + writel(swing, edp->tx0 + TXn_TX_DRV_LVL); + writel(emph, edp->tx0 + TXn_TX_EMP_POST1_LVL); + + writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG); + writel(swing, edp->tx1 + TXn_TX_DRV_LVL); + writel(emph, edp->tx1 + TXn_TX_EMP_POST1_LVL); + + return 0; +} + static int qcom_edp_phy_configure(struct phy *phy, union phy_configure_opts *opts) { const struct phy_configure_opts_dp *dp_opts = &opts->dp; struct qcom_edp *edp = phy_get_drvdata(phy); + int ret = 0; memcpy(&edp->dp_opts, dp_opts, sizeof(*dp_opts)); - return 0; + if (dp_opts->set_voltages) + ret = qcom_edp_set_voltages(edp, dp_opts); + + return ret; } static int qcom_edp_configure_ssc(const struct qcom_edp *edp) @@ -315,7 +381,9 @@ static int qcom_edp_set_vco_div(const struct qcom_edp *edp) static int qcom_edp_phy_power_on(struct phy *phy) { const struct qcom_edp *edp = phy_get_drvdata(phy); + const struct qcom_edp_cfg *cfg = edp->cfg; u32 bias0_en, drvr0_en, bias1_en, drvr1_en; + u8 ldo_config; int timeout; int ret; u32 val; @@ -332,8 +400,11 @@ static int qcom_edp_phy_power_on(struct phy *phy) if (timeout) return timeout; - writel(0x01, edp->tx0 + TXn_LDO_CONFIG); - writel(0x01, edp->tx1 + TXn_LDO_CONFIG); + + ldo_config = (cfg && cfg->is_dp) ? 0x1 : 0x0; + + writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG); + writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG); writel(0x00, edp->tx0 + TXn_LANE_MODE_1); writel(0x00, edp->tx1 + TXn_LANE_MODE_1); @@ -635,6 +706,7 @@ static int qcom_edp_phy_probe(struct platform_device *pdev) return -ENOMEM; edp->dev = dev; + edp->cfg = of_device_get_match_data(&pdev->dev); edp->edp = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(edp->edp)) From patchwork Wed Aug 10 04:07:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 596474 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEFF0C25B07 for ; Wed, 10 Aug 2022 04:06:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230250AbiHJEFp (ORCPT ); Wed, 10 Aug 2022 00:05:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230459AbiHJEFY (ORCPT ); Wed, 10 Aug 2022 00:05:24 -0400 Received: from mail-ot1-x32a.google.com (mail-ot1-x32a.google.com [IPv6:2607:f8b0:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 365E321269 for ; Tue, 9 Aug 2022 21:05:14 -0700 (PDT) Received: by mail-ot1-x32a.google.com with SMTP id br15-20020a056830390f00b0061c9d73b8bdso9832316otb.6 for ; Tue, 09 Aug 2022 21:05:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=otMbQ+fUxY1KqKVlgDpCNz3GS8mo4JE64ISTgGLY7Bw=; b=oPeYvsLzthrz/wujDz0x/KTlTkoB+UZmMOVZZjqZIzw2t7p1M+oZodLqLyVDF+VWIf ShCQapeXpthbW5woDkAX/t3LC7d0BYxdmKqGRnjJ/kirHgAJvSPjQzUdL9wYBMXmM0lU e9qtqsJq7q1Yf0LAMlLRdwQeGbsB6PhCHBpYd/YnbIzx0/JZzo4Ngw6flLPerrHB2slx l8XSb+KPrM/zk1Tz1TH7ObJSqiEmmVBN+kPlYWOqgeWZm5aagYKpQRn2ufTrwecc/nN3 B4Rouk2kAS1ttVijfZIGlf9o7QFzV3E+oOE8C3InauGXSiGSQnv2BjQpZCwpAhTRc7h8 C7yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=otMbQ+fUxY1KqKVlgDpCNz3GS8mo4JE64ISTgGLY7Bw=; b=L01jL1osdztBiLnX4LCgR70BJsdGQ6H7rwJ+vL31XfSK9xeLTiR4B8hv1XhF4giK3w dxxpy8KhlD0XMoxY+VXBj25CJk4QCefFYnQbgQoImGUOJr+yTz+wO+lLiiHpBBT1ccvL spM+hpNdSwrfXdKCApQSGenD1vyywyyKQ9WSG6OvKS6UGLBEqFqxaFkcThWmqndhknvj 44GV2RLIdTamKx3Rr5mVrJ5qI02W/NJclL3EJLhCDMlKCnpHqoDIgDMNpzPzJ2tt7nSV Uj2ylm7h4L/vG3oVqHs4ea9cVAVghJyn00chZY90idlFND/JlIUDOv5rOUYnIJQvCV5F Tyig== X-Gm-Message-State: ACgBeo1G0llrWO7v4gTbxIbYjCDCMYc3TiobJDetuqA0hAU7JzdNAUrK qGRNMJrX82Q5UbIPQyLWzbrCVQ== X-Google-Smtp-Source: AA6agR5PSzQ8RoK4TmRdA43VijbvZZNJhXAslG52xfwT/rylQBDFDrhutFH1LFS21v1AOHoPPevuug== X-Received: by 2002:a05:6830:638d:b0:636:a941:d467 with SMTP id ch13-20020a056830638d00b00636a941d467mr8679172otb.5.1660104313495; Tue, 09 Aug 2022 21:05:13 -0700 (PDT) Received: from ripper.. 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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id q6-20020a056830440600b00616dfd2c859sm449027otv.59.2022.08.09.21.05.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Aug 2022 21:05:12 -0700 (PDT) From: Bjorn Andersson To: Kishon Vijay Abraham I , Vinod Koul Cc: Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] phy: qcom: edp: Add SC8280XP eDP and DP PHYs Date: Tue, 9 Aug 2022 21:07:45 -0700 Message-Id: <20220810040745.3582985-6-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220810040745.3582985-1-bjorn.andersson@linaro.org> References: <20220810040745.3582985-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Qualcomm SC8280XP platform has a number of eDP and DP PHY instances, add support for these. Signed-off-by: Bjorn Andersson --- drivers/phy/qualcomm/phy-qcom-edp.c | 74 +++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c index 301ac422d2fe..de696108cf6e 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -100,6 +100,78 @@ struct qcom_edp { struct regulator_bulk_data supplies[2]; }; +static const u8 dp_swing_hbr_rbr[4][4] = { + { 0x08, 0x0f, 0x16, 0x1f }, + { 0x11, 0x1e, 0x1f, 0xff }, + { 0x16, 0x1f, 0xff, 0xff }, + { 0x1f, 0xff, 0xff, 0xff } +}; + +static const u8 dp_pre_emp_hbr_rbr[4][4] = { + { 0x00, 0x0d, 0x14, 0x1a }, + { 0x00, 0x0e, 0x15, 0xff }, + { 0x00, 0x0e, 0xff, 0xff }, + { 0x03, 0xff, 0xff, 0xff } +}; + +static const u8 dp_swing_hbr2_hbr3[4][4] = { + { 0x02, 0x12, 0x16, 0x1a }, + { 0x09, 0x19, 0x1f, 0xff }, + { 0x10, 0x1f, 0xff, 0xff }, + { 0x1f, 0xff, 0xff, 0xff } +}; + +static const u8 dp_pre_emp_hbr2_hbr3[4][4] = { + { 0x00, 0x0c, 0x15, 0x1b }, + { 0x02, 0x0e, 0x16, 0xff }, + { 0x02, 0x11, 0xff, 0xff }, + { 0x04, 0xff, 0xff, 0xff } +}; + +static const struct qcom_edp_cfg dp_phy_cfg = { + .is_dp = true, + .swing_hbr_rbr = &dp_swing_hbr_rbr, + .swing_hbr3_hbr2 = &dp_swing_hbr2_hbr3, + .pre_emphasis_hbr_rbr = &dp_pre_emp_hbr_rbr, + .pre_emphasis_hbr3_hbr2 = &dp_pre_emp_hbr2_hbr3, +}; + +static const u8 edp_swing_hbr_rbr[4][4] = { + { 0x07, 0x0f, 0x16, 0x1f }, + { 0x0d, 0x16, 0x1e, 0xff }, + { 0x11, 0x1b, 0xff, 0xff }, + { 0x16, 0xff, 0xff, 0xff } +}; + +static const u8 edp_pre_emp_hbr_rbr[4][4] = { + { 0x05, 0x12, 0x17, 0x1d }, + { 0x05, 0x11, 0x18, 0xff }, + { 0x06, 0x11, 0xff, 0xff }, + { 0x00, 0xff, 0xff, 0xff } +}; + +static const u8 edp_swing_hbr2_hbr3[4][4] = { + { 0x0b, 0x11, 0x17, 0x1c }, + { 0x10, 0x19, 0x1f, 0xff }, + { 0x19, 0x1f, 0xff, 0xff }, + { 0x1f, 0xff, 0xff, 0xff } +}; + +static const u8 edp_pre_emp_hbr2_hbr3[4][4] = { + { 0x08, 0x11, 0x17, 0x1b }, + { 0x00, 0x0c, 0x13, 0xff }, + { 0x05, 0x10, 0xff, 0xff }, + { 0x00, 0xff, 0xff, 0xff } +}; + +static const struct qcom_edp_cfg edp_phy_cfg = { + .is_dp = false, + .swing_hbr_rbr = &edp_swing_hbr_rbr, + .swing_hbr3_hbr2 = &edp_swing_hbr2_hbr3, + .pre_emphasis_hbr_rbr = &edp_pre_emp_hbr_rbr, + .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3, +}; + static int qcom_edp_phy_init(struct phy *phy) { struct qcom_edp *edp = phy_get_drvdata(phy); @@ -767,6 +839,8 @@ static int qcom_edp_phy_probe(struct platform_device *pdev) static const struct of_device_id qcom_edp_phy_match_table[] = { { .compatible = "qcom,sc7280-edp-phy" }, { .compatible = "qcom,sc8180x-edp-phy" }, + { .compatible = "qcom,sc8280xp-dp-phy", .data = &dp_phy_cfg }, + { .compatible = "qcom,sc8280xp-edp-phy", .data = &edp_phy_cfg }, { } }; MODULE_DEVICE_TABLE(of, qcom_edp_phy_match_table);