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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id b89si7668457pfj.207.2019.02.01.05.35.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:35:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=TVX45D6V; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id B59E9211C607A; Fri, 1 Feb 2019 05:35:20 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::543; helo=mail-pg1-x543.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x543.google.com (mail-pg1-x543.google.com [IPv6:2607:f8b0:4864:20::543]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 68669211C5729 for ; Fri, 1 Feb 2019 05:35:19 -0800 (PST) Received: by mail-pg1-x543.google.com with SMTP id z10so2958810pgp.7 for ; Fri, 01 Feb 2019 05:35:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=o5tXmllTBuLIIFpZgLxm48GIw9HA96budy68pYLvoy8=; b=TVX45D6VDHtKPKqvJzYECs6AY1udQIdmoDOev7xa8m+WYkUVVlKy826JrXLBKZzIYW uH66exeWp3SY9Iz2+jypxTixNKmFnsZkeJg1sgUCutFTFu3npjud6Iyd9J4fbJvLsXZL GiRp8flnKlXoTBNfUfWtZFjpuaJjzl/1FFvn8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=o5tXmllTBuLIIFpZgLxm48GIw9HA96budy68pYLvoy8=; b=h61Fk4nmYbFDfQ6MQC8/Sw4zYrk9U2aoX911VPFCXe5aW5Av6+NpkxlkIGU2VWpc72 8NO31Fvn1XcQUsHz++88g/W6tQ6I8+HvfBucP9p7Z2t0qV0FmO8ep0ExGc/CRIKcdLoi 0Cp4h3ihybc3NLlWyfoGhMdNYJf/FwmSXiJPwnSq/t52Ua7EoJussb31EqOOsCtCm4K6 YBEzjy84Si1LU7RUY9C1PcJvb7E7Cn0zFpRaF7+Tg/tZaPBqsch7niAghvURON5bwzRJ kSOMrmIl0oPXBq+DQPQfQcexm10bXL+XkqFXPtrWwNvkYcnULFaHTrusqQG4wc3ngYrp V6HQ== X-Gm-Message-State: AJcUukc5iQOybmcsiply3XliaU0RvyH19vVVmabKKeP4al7w6XZNo9fy BigkOaTSP9/ebGI1fKScYwn9dg== X-Received: by 2002:a62:f5da:: with SMTP id b87mr39955090pfm.253.1549028119112; Fri, 01 Feb 2019 05:35:19 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:35:18 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:21 +0800 Message-Id: <20190201133436.10500-2-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 01/16] Hisilicon/D0x: Remove SerdesLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" SerdesLib is useless for SmbiosMiscDxe and D06, so remove it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D06/D06.dsc | 2 -- Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf | 1 - 2 files changed, 3 deletions(-) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index 396bd03c9d24..cbbd99e4a659 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -64,8 +64,6 @@ [LibraryClasses.common] CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf - SerdesLib|Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf - TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf RealTimeClockLib|Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf OemMiscLib|Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf index 61cead7779b9..8e5c56fa41fd 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf +++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf @@ -77,7 +77,6 @@ [LibraryClasses] IpmiCmdLib - SerdesLib [Protocols] gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED From patchwork Fri Feb 1 13:34:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 157211 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp437102jaa; Fri, 1 Feb 2019 05:35:24 -0800 (PST) X-Google-Smtp-Source: AHgI3IZk9u5jk7uAmgytkrrtwJT1/DtWmQgvkNWtD93Q7zBZf0pNJ+0HvsnidRLkE63zSPTBJmmq X-Received: by 2002:a63:dd55:: with SMTP id g21mr2271476pgj.86.1549028124313; Fri, 01 Feb 2019 05:35:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549028124; cv=none; d=google.com; s=arc-20160816; b=bgaERtUQmqTeV+sCNRKujZA3pP/625sBQ2MrfiqThnuVTWj1GDOLoY8MQU4hgqj63V zWw36pMy6wQezQY8We6ewm6I7Na0Di+RTXMgodFvcOEjVdBxlFoCNOseS90Oq5e/t/7N /g3q2eGRqVmWXfwuyHY6v4Y16kTjhYzSz/L9Rv7hpscz98ybCBqapqfKbKrBoQ+tEZAr UAlKZ7gXtVGfpmJ6ixH53bbPyEf15Z9MSgI8r8royvOGPvuo0Ek2D4p3DuasTbHdS0EW URBceTt+4+L0QJrfVlZd+dlJhAiC8haMeFgLM3yLfJm6sIsBgstOpAQx0asqs6Pkb9BN EnrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to; bh=HRqmf/i8IXjPUywqqcUuyxstIakmpaP2W5AupElWCjM=; b=EQO4CAh+Y0n3PiK17cn44y3Jx1XPTEhGxfw6oAPzeRY3D3AMOTG9dfP/5rWsa1f2Ql ZyqnosUuvFxPMsqTZw3hT4/j/MBwZIcLQdDlk2f5/VNHuzh+FciUxf4+mkDiUHHGan5g CkMWJ0QGnNWyD7F59xhDkFho2UPMyUYFIry21JJn/4ak1KNX5C9ZGUMfsqwLywT8RGwL 4kJ4KbCCdq9lLd75Q283eVR8/o5a4K9Dzl6P7JQ1NQ3RZa9hl0SKJf9LYPfY79GY2coh S02umuBGa4kpdU/5GdzM9XEF5TOjMep5727A6fj5pX0xspk51De5qbbYeHlNtANLhPo5 Bfiw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=X6FOqOy1; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id y40si1875197pla.251.2019.02.01.05.35.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:35:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=X6FOqOy1; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E2D81211C6079; Fri, 1 Feb 2019 05:35:23 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::544; helo=mail-pg1-x544.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x544.google.com (mail-pg1-x544.google.com [IPv6:2607:f8b0:4864:20::544]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E7E29211C5729 for ; Fri, 1 Feb 2019 05:35:22 -0800 (PST) Received: by mail-pg1-x544.google.com with SMTP id z10so2958885pgp.7 for ; Fri, 01 Feb 2019 05:35:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Sa4OcPTTtxhPB8mhQ57VN96vCV27GF1ET1XY87qA3Vw=; b=X6FOqOy18XIPGlL+niQLpTI1lKNmbcTKc+BFCQ8muUOZiUYPCo+Gbg8SfugJw+vwRJ tn+xhTYLrR9HC6+IZzu5Nl0YhAzL/KiBYZ9kZXXzZvzMany4crk6rO6dQbHT8ERP+DrQ 6OHjeYQtazkYXdDXfS1p9CW4LaV1o6kC3BTIw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Sa4OcPTTtxhPB8mhQ57VN96vCV27GF1ET1XY87qA3Vw=; b=uGUspejkWlBwdH621S3TdLpky8VxdXCU7XiGEJUf8iG0Rx4+b/lO4pa7EvrU9Nt8I0 czCapnVASWJXpD9OYT9NyGc1BqQ9DKYP0U965OptOIgWEGfw4xRY4a/DQFUlaFQpsaQ5 S88MxP+cs1c8NgpF4MsWCLN3wNsKZv92rc8uuZkb2eShXP0cC30j4aedVYk+TDPOSi6w 28UN7rSuVMokPhEr5W2bdyD0/ssksdw9VWVbdVYDGSEsVOLBz1UVfF4yqfqY1KXzdvFG I1cNH2tso3lE/NAn84rCvIwpT0fFGma5+wE899acfZqtuaNyB8ldjYAfSd13ipwFlEe4 wHig== X-Gm-Message-State: AJcUukflmN35CwhmXWsGr0vAymEE7ySh6wFkOornla8G+VF8iF4e4o3Y 3eUIzm+6i1Rl/yD9Fb1OpCPyxg== X-Received: by 2002:aa7:83c6:: with SMTP id j6mr39354493pfn.91.1549028122581; Fri, 01 Feb 2019 05:35:22 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:35:21 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:22 +0800 Message-Id: <20190201133436.10500-3-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 02/16] Hisilicon/D0x: Add DriverHealthManagerDxe X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" DriverHealthManagerDxe Collect driver health form of third party drivers to repair no healthy card. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D03/D03.dsc | 1 + Platform/Hisilicon/D05/D05.dsc | 1 + Platform/Hisilicon/D06/D06.dsc | 1 + Platform/Hisilicon/D03/D03.fdf | 1 + Platform/Hisilicon/D05/D05.fdf | 1 + Platform/Hisilicon/D06/D06.fdf | 1 + 6 files changed, 6 insertions(+) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 3f59be22ec8e..fe443dd929ad 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -492,6 +492,7 @@ [Components.common] MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf MdeModulePkg/Universal/BdsDxe/BdsDxe.inf SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf { diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 25db1c38d287..0c4f21fbe056 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -638,6 +638,7 @@ [Components.common] MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf MdeModulePkg/Universal/BdsDxe/BdsDxe.inf SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf { diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index cbbd99e4a659..6d581337f199 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -435,6 +435,7 @@ [Components.common] Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf MdeModulePkg/Universal/BdsDxe/BdsDxe.inf SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf { diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index f453f9e46321..3f07b2e57778 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -295,6 +295,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf [FV.FVMAIN_COMPACT] diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 85dd791564a4..9632aea4b00e 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -314,6 +314,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf [FV.FVMAIN_COMPACT] diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf index fda29ab322e9..a937660a09e2 100644 --- a/Platform/Hisilicon/D06/D06.fdf +++ b/Platform/Hisilicon/D06/D06.fdf @@ -319,6 +319,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf [FV.FVMAIN_COMPACT] From patchwork Fri Feb 1 13:34:23 2019 Content-Type: text/plain; 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[198.145.21.10]) by mx.google.com with ESMTPS id e2si7162628pgj.316.2019.02.01.05.35.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:35:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=hAgYZ0yF; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 25B6B211C607F; Fri, 1 Feb 2019 05:35:27 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::442; helo=mail-pf1-x442.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 47633211C5729 for ; Fri, 1 Feb 2019 05:35:26 -0800 (PST) Received: by mail-pf1-x442.google.com with SMTP id y126so3234165pfb.4 for ; Fri, 01 Feb 2019 05:35:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uzG86FV8SbeUkaihpmzDaju5aqd64MgyI1VFihxNXH8=; b=hAgYZ0yF9H9ycihZKskl0bDJAsZwapw0W6Jmh4I/+5WVF7zh1hNNgc+uLX7dpHTW9i 6oMGAS8qKQjcf6SSdznEjKZu/TjXhmgRBt7G9sYxdqbRahD12D/eGr+cfVVejTkpKy0N 28GtgvShJqEneD7jHcrWzWgefQjdmBIV3tWHw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uzG86FV8SbeUkaihpmzDaju5aqd64MgyI1VFihxNXH8=; b=h45SvT+HP0VncBcwEfOv32p/1wQVYGL1xSeNoJnWDxWrOh+JX3yHuvK1Pqu9jfZYNt mO9IS6EN5UwVrmqysd84/p0g0IV0PLV0T6yEgwUdZrBIhfP/bx+w73rdn3ps2y1L25bV xLxWQ5jQDlmVZxrX4n8n82Jlc9jTxwee0WLNFtExl6TtxGhfGM4Yt0NedcgTXTIa1nhb ayS+PRrBjJqA+bup6VEN6WcjUIt1B5DaFB/PMVbIIN6bGMWAmiZIhfuyrNqRW7x6o9hz FA2wyQLx1ZAw6mkoCk0m2H/IJZ/BGDmUkRzVKIONjcVGVxIH5sV4IRENYfob85PWVg2W qipQ== X-Gm-Message-State: AHQUAuYRoR5PuVLqo4qPjJBW79JyHOfBWKo+7PEykR1BjGH3VMrrQbiU THvzKwcIP1XX9TyeC1ruUY3LKQ== X-Received: by 2002:a63:5346:: with SMTP id t6mr2358728pgl.40.1549028125992; Fri, 01 Feb 2019 05:35:25 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:35:25 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:23 +0800 Message-Id: <20190201133436.10500-4-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 03/16] Hisilicon/D06: Optimize SAS driver for reducing boot time X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" SAS controller is always existed, so accessing SAS register don't depend on PciBusDxe (pci enumeration). Move the SAS module early in D06.fdf for dispatching SAS driver early. This can avoid wait in BDS normally and reduce boot time. This patch is relative with SasDriverDxe in edk2-non-osi. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D06/D06.fdf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf index a937660a09e2..d495ad7f264c 100644 --- a/Platform/Hisilicon/D06/D06.fdf +++ b/Platform/Hisilicon/D06/D06.fdf @@ -165,6 +165,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf INF Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.inf + INF Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf # # PI DXE Drivers producing Architectural Protocols (EFI Services) # @@ -296,7 +297,6 @@ [FV.FvMain] # INF Platform/Hisilicon/D06/Drivers/Sm750Dxe/UefiSmi.inf INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf - INF Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf From patchwork Fri Feb 1 13:34:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 157213 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp437261jaa; Fri, 1 Feb 2019 05:35:31 -0800 (PST) X-Google-Smtp-Source: ALg8bN5bPjGOWDZo0Bv2+YjTLBqtuBQwiQjkc6lj54uiASzh2ljSIeyvAYFLnQ5bLRn8H2ITabFS X-Received: by 2002:a17:902:8306:: with SMTP id bd6mr39835235plb.217.1549028131789; Fri, 01 Feb 2019 05:35:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549028131; cv=none; d=google.com; s=arc-20160816; b=xY4Kel9wL6HtTlD8kyWmxjTcRz+5ZxGUuAOF/ozO1MP/602Njkl90fD/3IZHEC2M1x YiSXH4erafTvqR1hdVc88aPULvBy7gEHMt5r21oBxirylCAaGE8eAqtYBNFSfh5CI0pK da9HhqIPOm7ngSZbexw9E2Njfq7oo2+BlT5ESg0N4xAQ4HKk9RLSL1TbHdnluMGm6DMf 4FbSL/2IfJhG1VGr6LJDM5j/v1vzyvW0A/Ry+c1ibHjBQB4nRK5rMocIGbWCKv4t0mq0 iUwOAGHwDca2FCBZ0DZna6btyom9kpwRB157JBmjKqpCc/eMhf2SR31bBYbcMtJ6w+ps eJLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to; bh=kXK4dq/s5CWX01sq4C5Q0jsLxWDNSgZJLcQcIZJhoFw=; b=dryXfyBOjkLruqacXuGQlKPYyWSCsCZYQurkm+0W1OGsMsQxwvDT/+w9VYa248slAS ym74oRUeV1jbFQ32xo7rNv+nNTpXTZ7qUmFePr6RkT/0Gntg5cKFXEPsdXvAXV+ieB16 G5Z73Hkqszi65kaGk4N/+V/82x8F16KCWhJViRf/wZ/ljP2JtxNAkNJE8UXSYcE/MpKl hZBSoIlfbZosfMO3LbLVaIj+D9MfGqa0C9E22xQ1+Xs8TdKPFFcscvvn9CrO4ZWBN1HV Mi0NiM1Bb6PC5mQRZJ9oLCgXuiXcqpsHX0AP2DFEozg6Zx2ZPmTVo7BXW0+QlnCT+3Ck SJqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=j6QN9MMy; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. 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diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c index 012d45bc0214..6668103af027 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c @@ -316,7 +316,7 @@ OemConfigUiLibConstructor ( Status = gRT->SetVariable ( OEM_CONFIG_NAME, &gOemConfigGuid, - EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS, + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, sizeof (OEM_CONFIG_DATA), &Configuration ); From patchwork Fri Feb 1 13:34:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 157214 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp437341jaa; Fri, 1 Feb 2019 05:35:35 -0800 (PST) X-Google-Smtp-Source: AHgI3Ib5CdNThTfCvQX5KAQrlzdNp++M9h+TbpX4jisGlJqkz+5ZbJBUZBh7IzB8FNPMWArfyuKF X-Received: by 2002:a63:6984:: with SMTP id e126mr2272304pgc.143.1549028134910; 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[198.145.21.10]) by mx.google.com with ESMTPS id g1si7814817pld.197.2019.02.01.05.35.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:35:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HcyHRaH4; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 874CA211C6086; Fri, 1 Feb 2019 05:35:34 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::642; helo=mail-pl1-x642.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl1-x642.google.com (mail-pl1-x642.google.com [IPv6:2607:f8b0:4864:20::642]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5F042211C5729 for ; Fri, 1 Feb 2019 05:35:33 -0800 (PST) Received: by mail-pl1-x642.google.com with SMTP id z23so3249569plo.0 for ; Fri, 01 Feb 2019 05:35:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AXjRF9hRJEgJZKNG8641qCmPpPPHtjLeU9qsQkkhcAE=; b=HcyHRaH4fo7+fea9e6+Yk9S1cVh8pAvze3H9YgcIxAA9txlo1P1Yo1Qi/mF6n9s5L1 /dCCxiNPzduMeCafbOMxRbo+Y9vd/7K1NtzXYm8pSFGJ5lI6hFyZjkOi9u35AnQ9yhyr RKCd3U6IWilXREHaUMMebE2xoN/a+LSYJ/x3M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AXjRF9hRJEgJZKNG8641qCmPpPPHtjLeU9qsQkkhcAE=; b=YElYwJ9EGzZk3nuGc8erFf7S3KAfKsQOXhHNMS8KcpKaZ/Zjnw4mRiD+qtyekD/uJ2 q6W5V0kLpsmONLA3sDVCwQWrNcktkuUPCemyOT/BGVICxP/wZ3Yo8yPF2zlekwgejnCC mKYjwzgkSmrOGfwtipZ6z1YOnvxBS/KNFBZ5Qo4VSEQfqU7Txhts1prnqBz5+nvhdF5i HP+gnutlGCkA9v1F7I4LBIlYUFtB4xVeXbEndIeHrJLsbl6aw2R5HsX/okyEsWg4Ztwd lj01524CITYUhjCHWrjgwibUI6cgpzeU0h3+8DM8tTZ1yzD7VepJWDMP+enYEur5s+gy 76yg== X-Gm-Message-State: AJcUuke8FK/idjoSIcYHNJzT3hpmfrAhQBMjT/InlJOykmwg4zXPqGRI nCRWqHimb7oJT0aA1/KqO/1NKw== X-Received: by 2002:a17:902:583:: with SMTP id f3mr40586772plf.202.1549028133041; Fri, 01 Feb 2019 05:35:33 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:35:32 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:25 +0800 Message-Id: <20190201133436.10500-6-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 05/16] Hisilicon/D06: Add more PCIe port INT-x support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Jason Zhang Since NVMe riser width is 6*X4, need add the related port's INT-x support to match OS driver. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 65 +++++++++++++++----- 1 file changed, 50 insertions(+), 15 deletions(-) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl index 27fde2e09bfe..4d9d9d95be68 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl @@ -41,11 +41,21 @@ Scope(_SB) // adding RPx INTx configure deponds on hardware board topology, // if UEFI enables RPx, RPy, RPz... related INTx configure // should be added + Package () {0x2FFFF,0,0,640}, // INT_A + Package () {0x2FFFF,1,0,641}, // INT_B + Package () {0x2FFFF,2,0,642}, // INT_C + Package () {0x2FFFF,3,0,643}, // INT_D + Package () {0x4FFFF,0,0,640}, // INT_A Package () {0x4FFFF,1,0,641}, // INT_B Package () {0x4FFFF,2,0,642}, // INT_C Package () {0x4FFFF,3,0,643}, // INT_D + Package () {0x6FFFF,0,0,640}, // INT_A + Package () {0x6FFFF,1,0,641}, // INT_B + Package () {0x6FFFF,2,0,642}, // INT_C + Package () {0x6FFFF,3,0,643}, // INT_D + Package () {0x8FFFF,0,0,640}, // INT_A Package () {0x8FFFF,1,0,641}, // INT_B Package () {0x8FFFF,2,0,642}, // INT_C @@ -56,6 +66,11 @@ Scope(_SB) Package () {0xCFFFF,2,0,642}, // INT_C Package () {0xCFFFF,3,0,643}, // INT_D + Package () {0xEFFFF,0,0,640}, // INT_A + Package () {0xEFFFF,1,0,641}, // INT_B + Package () {0xEFFFF,2,0,642}, // INT_C + Package () {0xEFFFF,3,0,643}, // INT_D + Package () {0x10FFFF,0,0,640}, // INT_A Package () {0x10FFFF,1,0,641}, // INT_B Package () {0x10FFFF,2,0,642}, // INT_C @@ -759,26 +774,46 @@ Device (PCI6) // adding RPx INTx configure deponds on hardware board topology, // if UEFI enables RPx, RPy, RPz... related INTx configure // should be added - Package () {0x04FFFF,0,0,640}, // INT_A - Package () {0x04FFFF,1,0,641}, // INT_B - Package () {0x04FFFF,2,0,642}, // INT_C - Package () {0x04FFFF,3,0,643}, // INT_D - - Package () {0x08FFFF,0,0,640}, // INT_A - Package () {0x08FFFF,1,0,641}, // INT_B - Package () {0x08FFFF,2,0,642}, // INT_C - Package () {0x08FFFF,3,0,643}, // INT_D - - Package () {0x0CFFFF,0,0,640}, // INT_A - Package () {0x0CFFFF,1,0,641}, // INT_B - Package () {0x0CFFFF,2,0,642}, // INT_C - Package () {0x0CFFFF,3,0,643}, // INT_D + Package () {0x2FFFF,0,0,640}, // INT_A + Package () {0x2FFFF,1,0,641}, // INT_B + Package () {0x2FFFF,2,0,642}, // INT_C + Package () {0x2FFFF,3,0,643}, // INT_D + + Package () {0x4FFFF,0,0,640}, // INT_A + Package () {0x4FFFF,1,0,641}, // INT_B + Package () {0x4FFFF,2,0,642}, // INT_C + Package () {0x4FFFF,3,0,643}, // INT_D + + Package () {0x6FFFF,0,0,640}, // INT_A + Package () {0x6FFFF,1,0,641}, // INT_B + Package () {0x6FFFF,2,0,642}, // INT_C + Package () {0x6FFFF,3,0,643}, // INT_D + + Package () {0x8FFFF,0,0,640}, // INT_A + Package () {0x8FFFF,1,0,641}, // INT_B + Package () {0x8FFFF,2,0,642}, // INT_C + Package () {0x8FFFF,3,0,643}, // INT_D + + Package () {0xCFFFF,0,0,640}, // INT_A + Package () {0xCFFFF,1,0,641}, // INT_B + Package () {0xCFFFF,2,0,642}, // INT_C + Package () {0xCFFFF,3,0,643}, // INT_D + + Package () {0xEFFFF,0,0,640}, // INT_A + Package () {0xEFFFF,1,0,641}, // INT_B + Package () {0xEFFFF,2,0,642}, // INT_C + Package () {0xEFFFF,3,0,643}, // INT_D Package () {0x10FFFF,0,0,640}, // INT_A Package () {0x10FFFF,1,0,641}, // INT_B Package () {0x10FFFF,2,0,642}, // INT_C Package () {0x10FFFF,3,0,643}, // INT_D - }) + + Package () {0x12FFFF,0,0,640}, // INT_A + Package () {0x12FFFF,1,0,641}, // INT_B + Package () {0x12FFFF,2,0,642}, // INT_C + Package () {0x12FFFF,3,0,643}, // INT_D + }) Method (_CRS, 0, Serialized) { // Root complex resources, _CRS: current resource setting Name (RBUF, ResourceTemplate () { // Name: 19.6.87, ResourceTemplate: 19.6.111, From patchwork Fri Feb 1 13:34:26 2019 Content-Type: text/plain; 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[198.145.21.10]) by mx.google.com with ESMTPS id 14si3028398pga.219.2019.02.01.05.35.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:35:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=NQx7JFSV; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id BD71A211C607B; Fri, 1 Feb 2019 05:35:38 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::544; helo=mail-pg1-x544.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x544.google.com (mail-pg1-x544.google.com [IPv6:2607:f8b0:4864:20::544]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 315ED211C5729 for ; Fri, 1 Feb 2019 05:35:37 -0800 (PST) Received: by mail-pg1-x544.google.com with SMTP id r11so2964471pgp.6 for ; Fri, 01 Feb 2019 05:35:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7/46UVcRGojHSW9xzs/IJggzaof8BpRjrzIKbO67x0c=; b=NQx7JFSVz8TKemMrDflrR1ls+I0tdYvLy1ENptMlmpYoZR+wh9eviZafcWghKslIZ/ ZuHm42BgTkl8YuL8yGinAVUeX3vV2w3RZqA61c7HYs9Sk5hetN2gExULYB9v3oB6m7TA bK+RnqmIXtC+jyObthBrRXX87ZA+AKxNdtqAI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7/46UVcRGojHSW9xzs/IJggzaof8BpRjrzIKbO67x0c=; b=XsHIjJ01SqyLgLrGaWHeY1VhlWc803mI0gU6IyFZO4c93wGzF/yczskCNwXc3uATnB XZl098n5uSKI5tRReZU/aYQWld2INahzb3+3qm4IJHzg8RgEHG476KfqdZXXRUyX2YYK +oEAiDE7H+sq8PPdYAXNSgyxTQyMURdL9XjNHsgVKquNOTwo6ReChIaMC6AoS437ee7+ AQPQFvY0DAg/K1wwdhilcUU2gjGl/R3PtLG/YtZldEZchSYp053q1J7N95KG95j5dl4V /O8HoUxmdfUEc4gIOb5gOVqc70QQLbkknZee/W/Yd4Ifx0S/yAKpYrNvhD91kW8fAYro ctIQ== X-Gm-Message-State: AJcUukcHASz9kroY+98uLEB+Rq4AFAM4z+TH2yDAM5+/pGTC0IsZRMA8 7GhMnFvxeCAkaTs26waCXgUPog== X-Received: by 2002:a62:5797:: with SMTP id i23mr26583870pfj.162.1549028136687; Fri, 01 Feb 2019 05:35:36 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:35:36 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:26 +0800 Message-Id: <20190201133436.10500-7-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 06/16] Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, xingjiang tang , huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: xingjiang tang Implementation OemGetCpuFreq() to get cpu frequency from cpld to encapsulate project difference, for some projects don't support get cpu frequency by this way. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D06/Include/Library/CpldD06.h | 4 ++++ Silicon/Hisilicon/Include/Library/OemMiscLib.h | 2 ++ Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 16 ++++++++++++++++ 3 files changed, 22 insertions(+) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h b/Platform/Hisilicon/D06/Include/Library/CpldD06.h index ec9b49f4e70d..4d07a8ab3741 100644 --- a/Platform/Hisilicon/D06/Include/Library/CpldD06.h +++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h @@ -36,4 +36,8 @@ #define CPLD_X8_X8_X8_BOARD_ID 0x92 #define CPLD_X16_X8_BOARD_ID 0x93 +#define CPLD_CLOCK_FLAG 0xFD +#define CPLD_BOM_VER_FLAG 0x0B +#define BRD_VER_4TH 0x4 + #endif /* __CPLDD06_H__ */ diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h index 86ea6a1b3deb..dfac87d635d9 100644 --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h @@ -53,4 +53,6 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID); extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; EFI_HII_HANDLE EFIAPI OemGetPackages (); +UINTN OemGetCpuFreq (UINT8 Socket); + #endif diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c index 2a9db46d1ff9..8f2ac308c7b9 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c @@ -207,3 +207,19 @@ OemIsNeedDisableExpanderBuffer ( { return TRUE; } + +UINTN OemGetCpuFreq (UINT8 Socket) +{ + UINT8 BrdVerData; + + BrdVerData = MmioRead8(CPLD_BASE_ADDRESS + CPLD_BOM_VER_FLAG); + + if (BrdVerData >= BRD_VER_4TH){ //2.5G + return 2500000000; + } + else + { + return 2000000000; + } +} + From patchwork Fri Feb 1 13:34:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 157216 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp437532jaa; Fri, 1 Feb 2019 05:35:42 -0800 (PST) X-Google-Smtp-Source: AHgI3Iasgzun4J8LNU+GrDyE2suNPcAzJEOWoVtHdg6VIVpzTXSwbsRtjQp+YLN1tK7CLrxuxcL6 X-Received: by 2002:a63:9809:: with SMTP id q9mr2316919pgd.109.1549028142322; Fri, 01 Feb 2019 05:35:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549028142; cv=none; d=google.com; s=arc-20160816; b=AVGJ8SNEUeD5A/HgmQzXFiD2aoFXAhgCv9jMFXcJUprncGkTm57ypCtdWxCl290BfS 1CXA7q/JM4a6tdow/GSKD2udL9RZeCd1lrZIbwbTDmqoEsmbKfplxIu9h8jtX2VhNMcU Osgv5vZet9pkyPHlBayhgCnPmhZ//lr9Z8VGa6Wlx1tzI9i13Rtwx2sK/xslLNP2bn58 R1vnMMPCzBx+CO6bafwQYqoxhEYRhnUTD/wig9GgIKhwM0ruvQ/bThIPe1rjx9DzmV3V YsOaZRqFBMmja/MBo6AVamk5MjaHxnqUzFY27IETE176W8pKIYpPIw8YBySfaRaTa4YB 4Upg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to; bh=Q6psZCBoiahnXS7V/KFsDHpcP4UsxKMNNuakpPY+zs4=; b=mi1nux8G/Fzt4HGVSNaEKe7UOFLF9ojWvPV1GV5fgeFZeXN0z45Ye6ZHpYl7Jzt0rs 2n0l32yju3GCmeobNIMk5rCXse/UYLg3dIwm3hLGpfNqDYMjOfIE6Y+Y7p8YolS5GhJo 7WDOqmxnSSEtyAk464AJOkGr/IbdDkTIrniM0RhPz5xgXkgPH04g8si+qQkQdb6aVBH5 LKiRAVditxr6Cz16REtpg0iXyAsuriRcHQMHwhyCRVYKmmuTjsu5E8wgvK61xCjvMRI1 wviv/gXCrlOdVkfd/ygZndFMVMs19dxjqE3lezLvlx98oWcZ47BR69N2q642fOVegPzH BgHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ZfZ346xy; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id t19si6787638pgk.163.2019.02.01.05.35.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:35:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ZfZ346xy; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id EEA75211C607D; Fri, 1 Feb 2019 05:35:41 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::443; helo=mail-pf1-x443.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0ECED211C5729 for ; Fri, 1 Feb 2019 05:35:41 -0800 (PST) Received: by mail-pf1-x443.google.com with SMTP id h3so3241765pfg.1 for ; Fri, 01 Feb 2019 05:35:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MG8PL0t9KZwuH3xB1LCCVCXlJY461PwgU/HSHS9q1rQ=; b=ZfZ346xymL62xu510hyC9RzY2/nIMp6XHvWz7bGvnUmjmPVsh9WKWpSfeFiGdC0u4Q bCWsld+G3DqcNSxaHpfV8dQLY9ihHTXchf/B/EVVxF/b8hXCzz+QxZNUxUrCAJpW+8wX tqdW0+Ex6QFPEVfHf7bTUa+Ij7TyZb25UJwvs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MG8PL0t9KZwuH3xB1LCCVCXlJY461PwgU/HSHS9q1rQ=; b=N3CK9AriqreJGPiVSJptLARDyZlNBysxomcGGYmWKabfqcNPTmQCeqPRvnCPCTj779 yODYFjJBa4N6+I0vG+FBMZg+Z+qnrif0zGbtS8jVjdmPcidqyM/8fqpiAqcJ+v6eIo2A IyqfOUuDFIvlJjKDXLYUdLyymsRLvnfWVT8OnoVrSbLv48bGfPv/AvaNGb4uUxtYtgHE k36WMsDgrRDvOf2em9zHzPUs5GbTZWuzpo8KAjLvXT/OgtND1tfnEXWoXDye4S0AHIhL ffEkVnnaCf9NOsLHgCcTmqxkFvfGXCjwj1lWxUMhjO6NmM7Y18SHAaPxyMuRsThn448Z BCwg== X-Gm-Message-State: AHQUAuY9ulNl5GBS2bC6Tbc4i1pOCayJ+Wlw+crnUX0dzKxtZP3nDmjX u8oUBloE6F6cw3MKKWGwfKS/qA== X-Received: by 2002:a63:2643:: with SMTP id m64mr2273421pgm.35.1549028140141; Fri, 01 Feb 2019 05:35:40 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:35:39 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:27 +0800 Message-Id: <20190201133436.10500-8-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 07/16] Hisilicon/D0x: Rename StartupAp() function X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" As suggestion of community, 'AP' is a bit unfortunate to use in EDK2 context. PI specifies 'BSP' for Boot-strap Processor, as the one executing all of the EDK2 code. It then uses 'AP' to refer to Additional Processors, which can be assigned tasks using the EFI_MP_SERVICES_PROTOCOL. In a TianoCore context, this should be 'BSP'. So, Rename StartupAp() to StartUpBSP. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 2 +- Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c | 2 +- Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 2 +- Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c | 2 +- Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c | 3 ++- Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 2 +- 6 files changed, 7 insertions(+), 6 deletions(-) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h index a232e52ed719..712b77c44fc8 100644 --- a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h +++ b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h @@ -76,7 +76,7 @@ VOID MN_CONFIG (VOID); VOID SmmuConfigForOS (VOID); VOID SmmuConfigForBios (VOID); -VOID StartupAp (VOID); +VOID StartUpBSP (VOID); VOID LlcCleanInvalidate (VOID); diff --git a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c index 97cf6b8d8757..dacd9e871faf 100644 --- a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c +++ b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c @@ -83,7 +83,7 @@ void QResetAp(VOID) //SCCL A if (!PcdGet64 (PcdTrustedFirmwareEnable)) { - StartupAp(); + StartUpBSP (); } } diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c index b57fdfa68e45..c8a9da73bbca 100644 --- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c +++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c @@ -133,7 +133,7 @@ VOID CoreSelectBoot(VOID) { if (!PcdGet64 (PcdTrustedFirmwareEnable)) { - StartupAp (); + StartUpBSP (); } return; diff --git a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c index 76a055cbe980..b374347e5c4d 100644 --- a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c +++ b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c @@ -35,7 +35,7 @@ QResetAp ( (VOID)WriteBackInvalidateDataCacheRange((VOID *) FixedPcdGet64(PcdMailBoxAddress), 8); if (!PcdGet64 (PcdTrustedFirmwareEnable)) { - StartupAp(); + StartUpBSP (); } } diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c index 4c4c944dbead..a1458da7f0a3 100644 --- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c +++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c @@ -96,7 +96,7 @@ UINTN OemGetDimmSlot(UINTN Socket, UINTN Channel) VOID CoreSelectBoot(VOID) { if (!PcdGet64 (PcdTrustedFirmwareEnable)) { - StartupAp (); + StartUpBSP (); } return; @@ -128,3 +128,4 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID) { return TRUE; } + diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c index 0790f7941ae7..a8261d370626 100644 --- a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c +++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c @@ -78,7 +78,7 @@ QResetAp ( //SCCL A if (!PcdGet64 (PcdTrustedFirmwareEnable)) { - StartupAp (); + StartUpBSP (); } } From patchwork Fri Feb 1 13:34:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 157217 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp437613jaa; Fri, 1 Feb 2019 05:35:45 -0800 (PST) X-Google-Smtp-Source: AHgI3IaYGM8sOJmdmBF5UnW3hZkKmVLY2p0WqQSw7k08sWJIN25G3IV6TdLuBD1CBw/NjNxkZwym X-Received: by 2002:a62:5007:: with SMTP id e7mr27034771pfb.92.1549028145678; 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[198.145.21.10]) by mx.google.com with ESMTPS id z31si7535877plb.402.2019.02.01.05.35.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:35:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=fGeftrnb; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 35A01211C6083; Fri, 1 Feb 2019 05:35:45 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::441; helo=mail-pf1-x441.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6FFF3211C5729 for ; Fri, 1 Feb 2019 05:35:44 -0800 (PST) Received: by mail-pf1-x441.google.com with SMTP id q1so3229273pfi.5 for ; Fri, 01 Feb 2019 05:35:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=efkrYmvNL9impODkLFY+mFi4YZBb/zHTZx4SdUxKnLA=; b=fGeftrnbZ2WQN88iEK0V2SrNHzMrWwTCO4dnDUR/htbdsabB7auphGmSmHGaK5V8Ki aGhMf+YkvrTUeQ92rW1ob1m7cd4Z6Zk93f69A9cmaBwaDB7xRqLeN/VoEfYiB8Wzz1Nr LVZmkXFQYxEIbZ+Ex6J4dTeDcC8MgExUuFF+Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=efkrYmvNL9impODkLFY+mFi4YZBb/zHTZx4SdUxKnLA=; b=UWMO1p5bVWvvUnODY7ZI1jo+fX70xpeSx46Wsguz/s1k7FRaHf7u7KtzPkPmRtn0+N vjsiWyODhFpYZMCaUeJM2TpSyGkCnMZ7Rk/77ahuyXE9ORR8r/U93oHizhNArViSEo1g Z6nI9+HECPfs+zYMBP+xP7gT4kcB6C932dRScdcI0fglc7i0GWCX1AGUZTpA0SHenENI YxzJu0Kqu7BVwZ+JhVsPxLHRcpg561ZzqqAvOcM+FCfzy+Vkufx6Pv6t/o+l8SGGom6d OF2LVmDo28Bh/NIJxsmUeuJN/N9R0cE0afwA+crDBUg2PmQdupIp+u2q2eIta819yf1K VaqA== X-Gm-Message-State: AJcUuke8bkYvyusy1iDLjqjviNe7oNpw9OBaShW8F/y2p/uvpY7esWf8 vsny43ZiJiXMRpsELmkiQbjyFg== X-Received: by 2002:a63:2054:: with SMTP id r20mr35296700pgm.328.1549028143628; Fri, 01 Feb 2019 05:35:43 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:35:43 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:28 +0800 Message-Id: <20190201133436.10500-9-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 08/16] Hisilicon/D06: Change HCCS speed from 30G to 26G X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Follow chip team suggestion to change HCCS(Huawei Cache-Coherent System) speed from 30G to 26G, this modification can avoid some unstable stress issue. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Include/Library/OemMiscLib.h | 10 ++++++++++ Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 8 ++++++++ 2 files changed, 18 insertions(+) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h index dfac87d635d9..3c0cd0319122 100644 --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h @@ -22,6 +22,11 @@ #include #include +#define HCCS_PLL_VALUE_3000 0x52240781 +#define HCCS_PLL_VALUE_2600 0x52240681 +#define HCCS_PLL_VALUE_2800 0x52240701 + + #define PCIEDEVICE_REPORT_MAX 8 #define MAX_PROCESSOR_SOCKETS MAX_SOCKET #define MAX_MEMORY_CHANNELS MAX_CHANNEL @@ -55,4 +60,9 @@ extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; EFI_HII_HANDLE EFIAPI OemGetPackages (); UINTN OemGetCpuFreq (UINT8 Socket); +UINTN +OemGetHccsFreq ( + VOID + ); + #endif diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c index 8f2ac308c7b9..83e53cfeb5dd 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c @@ -223,3 +223,11 @@ UINTN OemGetCpuFreq (UINT8 Socket) } } +UINTN +OemGetHccsFreq ( + VOID + ) +{ + return HCCS_PLL_VALUE_2600; +} + From patchwork Fri Feb 1 13:34:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 157218 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp437655jaa; Fri, 1 Feb 2019 05:35:48 -0800 (PST) X-Google-Smtp-Source: AHgI3IZY+mo47soE0RbxsluXXi/mr0cjB6lvdhNnXxGheQJbOIiohgNR0+LY6oJU3mTyQ40F7Vzo X-Received: by 2002:a63:e302:: with SMTP id f2mr2342316pgh.320.1549028148824; Fri, 01 Feb 2019 05:35:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549028148; cv=none; d=google.com; s=arc-20160816; b=YRUvS00m5X5bNn+5I4NXmDdK+VajNqUM66GOCF7T8RU+BtGQHI5q5u9Z7fHypuNwO5 igCRcN2Qt7tt8KaBlVlnk4sH+GavGyqrFH70EqUD8jqWWHAHy7Nvj0ux2Huv99UJMMsX 3rk07PZ7x4cS5+oMJMBWKEAmRJ5UoneHuMOPXUdll/R/xyetM/59MSYhA0YfcoMq2+EK wSnm/oqSoreL0MzIRISgIJHKNu0kkxKijooMihsZYPUxWACRL9DwePlcWuIo09rnEfEH +xe79J/FFVmb/tG5EWY/kp6tvAqCbqq0an1rb5rxDdBlB+Kq9FinzEAxc30ojdnfWdu+ nr5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to; bh=Hag/RGgR3kLPu8LqOjmdEFd9nrLcx3w1YiA0lflmPD4=; b=EV+rTduqnnSDAtuKX2RkpUwbvpVmizIsjnP1BQccxtTLBER1cb9+jYxMvKCc156dbd hAVtcisslX+kv9oZrCUVEVACaInepelTiqFkbpdzL30MujzKXTwNabh3zY5R4s0untwv VsqAzCxm6LLlAB96yVLUZaH4fdF+zahpNNKD4BRsfEjLFiu4hmVrQvPTGTV3FJZfBBzT CYcOuDxuXY+ndTaCkvk1In0jKSPJYh1u9ab7RaeTg6mHqRsrv/AbGCPSpBYszRnIhdOf yUaf0rELuILoNqYajaECyt3sxYQAuppQv5wQmfRNg2NCZF28obS5zs8LrNNmU7vJSdtV IrlA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=TtfwDO9G; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id 1si1010plv.138.2019.02.01.05.35.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:35:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=TtfwDO9G; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 64803211C6090; Fri, 1 Feb 2019 05:35:48 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; 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Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 64 ++++++++++++++++++++ 1 file changed, 64 insertions(+) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl index 4d9d9d95be68..86d8728b82f2 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl @@ -17,6 +17,50 @@ **/ //#include "ArmPlatform.h" + +/* + See ACPI 6.1 Spec, 6.2.11, PCI Firmware Spec 3.0, 4.5 +*/ +#define PCI_OSC_SUPPORT() \ + Name(SUPP, Zero) /* PCI _OSC Support Field value */ \ + Name(CTRL, Zero) /* PCI _OSC Control Field value */ \ + Method(_OSC,4) { \ + If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { \ + /* Create DWord-adressable fields from the Capabilities Buffer */ \ + CreateDWordField(Arg3,0,CDW1) \ + CreateDWordField(Arg3,4,CDW2) \ + CreateDWordField(Arg3,8,CDW3) \ + /* Save Capabilities DWord2 & 3 */ \ + Store(CDW2,SUPP) \ + Store(CDW3,CTRL) \ + /* Only allow native hot plug control if OS supports: */ \ + /* ASPM */ \ + /* Clock PM */ \ + /* MSI/MSI-X */ \ + If(LNotEqual(And(SUPP, 0x16), 0x16)) { \ + And(CTRL,0x1E,CTRL) \ + }\ + \ + /* Do not allow native PME, AER */ \ + /* Never allow SHPC (no SHPC controller in this system)*/ \ + And(CTRL,0x10,CTRL) \ + If(LNotEqual(Arg1,One)) { /* Unknown revision */ \ + Or(CDW1,0x08,CDW1) \ + } \ + \ + If(LNotEqual(CDW3,CTRL)) { /* Capabilities bits were masked */ \ + Or(CDW1,0x10,CDW1) \ + } \ + \ + /* Update DWORD3 in the buffer */ \ + Store(CTRL,CDW3) \ + Return(Arg3) \ + } Else { \ + Or(CDW1,4,CDW1) /* Unrecognized UUID */ \ + Return(Arg3) \ + } \ + } // End _OSC + Scope(_SB) { Device (PCI0) @@ -270,6 +314,8 @@ Device (PCI1) Return (RBUF) } // Method(_CRS), this method return RBUF! + PCI_OSC_SUPPORT () + Method (_STA, 0x0, NotSerialized) { Return (0xf) @@ -333,6 +379,8 @@ Device (PCI2) Return (RBUF) } // Method(_CRS), this method return RBUF! + PCI_OSC_SUPPORT () + Method (_STA, 0x0, NotSerialized) { Return (0xf) @@ -382,6 +430,8 @@ Device (PCI3) Return (RBUF) } // Method(_CRS), this method return RBUF! + PCI_OSC_SUPPORT () + Method (_STA, 0x0, NotSerialized) { Return (0xf) @@ -431,6 +481,8 @@ Device (PCI4) Return (RBUF) } // Method(_CRS), this method return RBUF! + PCI_OSC_SUPPORT () + Method (_STA, 0x0, NotSerialized) { Return (0x0F) @@ -505,6 +557,8 @@ Device (PCI5) Return (RBUF) } // Method(_CRS), this method return RBUF! + PCI_OSC_SUPPORT () + Method (_STA, 0x0, NotSerialized) { Return (0xf) @@ -1002,6 +1056,8 @@ Device (PCI7) Return (RBUF) } // Method(_CRS), this method return RBUF! + PCI_OSC_SUPPORT () + Method (_STA, 0x0, NotSerialized) { Return (0xf) @@ -1066,6 +1122,8 @@ Device (PCI8) Return (RBUF) } // Method(_CRS), this method return RBUF! + PCI_OSC_SUPPORT () + Method (_STA, 0x0, NotSerialized) { Return (0xf) @@ -1115,6 +1173,8 @@ Device (PCI9) Return (RBUF) } // Method(_CRS), this method return RBUF! + PCI_OSC_SUPPORT () + Method (_STA, 0x0, NotSerialized) { Return (0xf) @@ -1164,6 +1224,8 @@ Device (PCIA) Return (RBUF) } // Method(_CRS), this method return RBUF! + PCI_OSC_SUPPORT () + Method (_STA, 0x0, NotSerialized) { Return (0x0F) @@ -1238,6 +1300,8 @@ Device (PCIB) Return (RBUF) } // Method(_CRS), this method return RBUF! + PCI_OSC_SUPPORT () + Method (_STA, 0x0, NotSerialized) { Return (0xf) From patchwork Fri Feb 1 13:34:30 2019 Content-Type: text/plain; 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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id e7si7008875pgv.499.2019.02.01.05.35.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:35:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HnIqTWVR; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 92DAE211C6093; Fri, 1 Feb 2019 05:35:52 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::441; helo=mail-pf1-x441.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0AEC9211C5729 for ; Fri, 1 Feb 2019 05:35:51 -0800 (PST) Received: by mail-pf1-x441.google.com with SMTP id h3so3241950pfg.1 for ; Fri, 01 Feb 2019 05:35:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2SL0gNqgiKuq8J1VP1MsyXIHqmRWmyUAEMUjYtXLDxg=; b=HnIqTWVRn0GQSgBsn785ueKUJIeeC6K9oNxVZ3hJPZZjtpCcxr6OeMWfK5wxS069n4 NSTNNo0YB98nA8Ln8dYog5LtkS/vPnRLtDxy9agfjn0DLXr7x08EX1Rs693vapi+LFWD OFTbmkA155aPfHnemWjkKOulOFguLNqWnAHQw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2SL0gNqgiKuq8J1VP1MsyXIHqmRWmyUAEMUjYtXLDxg=; b=D5eI6zmF8+OwVYoSPR+LXGWTAWCWJFo1xmkIpoYIVQJKIRAxOUPlq8h/Nm0JCPi59i VLDe4OhweuCZWzAmw7p+1uZsVDc0MLZ/IDByCfsFAxTPdrElvWxOxsDxxJFMkQ7oRke4 b19WGs1pIeYtulzZ0eCLpTtbYgYqfli2z6PKs5uwhGL/zxxP41EPe07ZejHemuyQi5Eg 1rVu2Bn05xRUqb2D7VAgFFPQPVOj+svWDq+yJQ6Q7Kl6JjkE13LJwhjWUeFJiq+QfMaG VRcsaMJSV3vnrj6UuhjWDUxT3XIfrUschTZhSQC0g/QwKWjlIszNf2Gb39z4edXPUnDz FlHA== X-Gm-Message-State: AHQUAuZ83bp4GHbZDNEiONfE1sGWWdXoRwV1/uQ2sCEhWisGOpDEsqjZ QN4col3FuTSv5XILmSRHLBxCog== X-Received: by 2002:a65:40c5:: with SMTP id u5mr2248290pgp.46.1549028150599; Fri, 01 Feb 2019 05:35:50 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:35:50 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:30 +0800 Message-Id: <20190201133436.10500-11-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 10/16] Hisilicon/D06: Modify for M7 self-Adapte support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" As new M7(Cortex-M7) firmware support self-adapte, so do not need BIOS to implement some function, remove useless funtions and report CPU0/CPU1 Nic NCL offset to M7. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 272 ++++---------------- 1 file changed, 45 insertions(+), 227 deletions(-) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c index aaf990216982..9bf274e1b991 100644 --- a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c +++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c @@ -21,44 +21,21 @@ #include #define CPU2_SFP2_100G_CARD_OFFSET 0x25 -#define CPU1_SFP1_LOCATE_OFFSET 0x16 -#define CPU1_SFP0_LOCATE_OFFSET 0x12 -#define CPU2_SFP1_LOCATE_OFFSET 0x21 -#define CPU2_SFP0_LOCATE_OFFSET 0x19 -#define CPU2_SFP2_10G_GE_CARD_OFFSET 0x25 -#define SFP_10G_SPEED 10 -#define SFP_25G_SPEED 25 -#define SFP_100G_SPEED 100 -#define SFP_GE_SPEED 1 - -#define SFP_GE_SPEED_VAL_VENDOR_FINISAR 0x0C -#define SFP_GE_SPEED_VAL 0x0D -#define SFP_10G_SPEED_VAL 0x67 -#define SFP_25G_SPEED_VAL 0xFF +#define SOCKET1_NET_PORT_100G 1 +#define SOCKET0_NET_PORT_NUM 4 +#define SOCKET1_NET_PORT_NUM 2 #define CARD_PRESENT_100G (BIT7) -#define CARD_PRESENT_10G (BIT0) -#define SELECT_SFP_BY_INDEX(index) (1 << (index - 1)) -#define SPF_SPEED_OFFSET 12 - -#define SFP_DEVICE_ADDRESS 0x50 -#define CPU1_9545_I2C_ADDR 0x70 -#define CPU2_9545_I2C_ADDR 0x71 - -#define FIBER_PRESENT 0 -#define CARD_PRESENT 1 -#define I2C_PORT_SFP 4 -#define CPU2_I2C_PORT_SFP 5 - -#define SOCKET_0 0 -#define SOCKET_1 1 #define EEPROM_I2C_PORT 4 #define EEPROM_PAGE_SIZE 0x40 #define MAC_ADDR_LEN 6 #define I2C_OFFSET_EEPROM_ETH0 (0xc00) #define I2C_SLAVEADDR_EEPROM (0x52) +#define SRAM_NIC_NCL1_OFFSET_FLAG 0xA0E87FE0 +#define SRAM_NIC_NCL2_OFFSET_FLAG 0xA0E87FE4 + #pragma pack(1) typedef struct { UINT16 Crc16; @@ -114,204 +91,6 @@ UINT16 CrcTable16[256] = { 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0, }; -EFI_STATUS -GetSfpSpeed ( - UINT16 Socket, - UINT16 SfpNum, - UINT8* FiberSpeed - ) -{ - EFI_STATUS Status; - I2C_DEVICE SpdDev; - UINT8 SfpSelect; - UINT8 SfpSpeed; - UINT32 RegAddr; - UINT16 I2cAddr; - UINT32 SfpPort; - - SfpSpeed = 0x0; - if (Socket == SOCKET_1) { - I2cAddr = CPU2_9545_I2C_ADDR; - SfpPort = CPU2_I2C_PORT_SFP; - } else { - I2cAddr = CPU1_9545_I2C_ADDR; - SfpPort = I2C_PORT_SFP; - } - - Status = I2CInit (Socket, SfpPort, Normal); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Socket%d Call I2CInit failed! p1=0x%x.\n", - __FUNCTION__, __LINE__, Socket, Status)); - return Status; - } - - SpdDev.Socket = Socket; - SpdDev.DeviceType = DEVICE_TYPE_SPD; - SpdDev.Port = SfpPort; - SpdDev.SlaveDeviceAddress = I2cAddr; - RegAddr = 0x0; - SfpSelect = SELECT_SFP_BY_INDEX (SfpNum); - - Status = I2CWrite (&SpdDev, RegAddr, 1, &SfpSelect); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "I2CWrite Error =%r.\n", Status)); - return Status; - } - - SpdDev.Socket = Socket; - SpdDev.DeviceType = DEVICE_TYPE_SPD; - SpdDev.Port = SfpPort; - SpdDev.SlaveDeviceAddress = SFP_DEVICE_ADDRESS; - - RegAddr = SPF_SPEED_OFFSET; - Status = I2CRead (&SpdDev, RegAddr, 1, &SfpSpeed); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "I2CRead Error =%r.\n", Status)); - return Status; - } - - DEBUG ((DEBUG_INFO, "BR, Nominal, Nominal signalling rate, SfpSpeed: 0x%x\n", - SfpSpeed)); - - if (SfpSpeed == SFP_10G_SPEED_VAL) { - *FiberSpeed = SFP_10G_SPEED; - } else if (SfpSpeed == SFP_25G_SPEED_VAL) { - *FiberSpeed = SFP_25G_SPEED; - } else if ((SfpSpeed == SFP_GE_SPEED_VAL) || - (SfpSpeed == SFP_GE_SPEED_VAL_VENDOR_FINISAR)) { - *FiberSpeed = SFP_GE_SPEED; - } - - return EFI_SUCCESS; -} - -//Fiber1Type/Fiber2Type/Fiber3Type return: SFP_10G_SPEED, SFP_100G_SPEED, SFP_GE_SPEED -UINT32 -GetCpu2FiberType ( - UINT8* Fiber1Type, - UINT8* Fiber2Type, - UINT8* Fiber100Ge - ) -{ - EFI_STATUS Status; - UINT16 SfpNum1; - UINT8 SfpSpeed1; - UINT16 SfpNum2; - UINT8 SfpSpeed2; - - SfpNum1 = 0x1; - SfpSpeed1 = SFP_10G_SPEED; - SfpNum2 = 0x2; - SfpSpeed2 = SFP_10G_SPEED; - *Fiber100Ge = 0x0; - *Fiber1Type = SFP_10G_SPEED; - *Fiber2Type = SFP_10G_SPEED; - - if ((ReadCpldReg (CPU2_SFP2_100G_CARD_OFFSET) & CARD_PRESENT_100G) != 0) { - // 100 Ge card - *Fiber1Type = SFP_10G_SPEED; - *Fiber2Type = SFP_10G_SPEED; - *Fiber100Ge = SFP_100G_SPEED; - DEBUG ((DEBUG_ERROR,"Detect Fiber SFP_100G is Present, Set 100Ge\n")); - } else if ((ReadCpldReg (CPU2_SFP2_10G_GE_CARD_OFFSET) & CARD_PRESENT_10G) != 0) { - *Fiber100Ge = 0x0; - *Fiber1Type = SFP_10G_SPEED; - *Fiber2Type = SFP_10G_SPEED; - if (ReadCpldReg (CPU2_SFP0_LOCATE_OFFSET) == FIBER_PRESENT) { - // Fiber detected in CPU2 slot0, read speed via i2c - Status = GetSfpSpeed (SOCKET_1, SfpNum1, &SfpSpeed1); - if (EFI_ERROR (Status)) { - DEBUG((DEBUG_ERROR, - "Get Socket1 Sfp%d Speed Error: %r.\n", - SfpNum1, - Status)); - return Status; - } - if (SfpSpeed1 == SFP_25G_SPEED) { - // P1 don't support 25G, so set speed to 10G - *Fiber1Type = SFP_10G_SPEED; - } else { - *Fiber1Type = SfpSpeed1; - } - } else { - // No fiber, set speed to 10G - *Fiber1Type = SFP_10G_SPEED; - } - - if (ReadCpldReg (CPU2_SFP1_LOCATE_OFFSET) == FIBER_PRESENT) { - // Fiber detected in CPU2 slot1, read speed via i2c - Status = GetSfpSpeed (SOCKET_1, SfpNum2, &SfpSpeed2); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Get Sfp%d Speed Error: %r.\n", SfpNum2, Status)); - return Status; - } - if (SfpSpeed2 == SFP_25G_SPEED) { - *Fiber2Type = SFP_10G_SPEED; - } else { - *Fiber2Type = SfpSpeed2; - } - } else { - // No fiber, set speed to 10G - *Fiber2Type = SFP_10G_SPEED; - } - } else { - // 100Ge/10Ge/Ge Fiber is not found. - *Fiber1Type = SFP_10G_SPEED; - *Fiber2Type = SFP_10G_SPEED; - *Fiber100Ge = 0x0; - } - - return EFI_SUCCESS; -} - -//Fiber1Type/Fiber2Type return: SFP_10G_SPEED, SFP_25G_SPEED, SFP_GE_SPEED -UINT32 -GetCpu1FiberType ( - UINT8* Fiber1Type, - UINT8* Fiber2Type - ) -{ - EFI_STATUS Status; - UINT16 SfpNum1; - UINT8 SfpSpeed1; - UINT16 SfpNum2; - UINT8 SfpSpeed2; - - SfpNum1 = 0x1; - SfpSpeed1 = SFP_10G_SPEED; - SfpNum2 = 0x2; - SfpSpeed2 = SFP_10G_SPEED; - *Fiber1Type = SFP_10G_SPEED; - *Fiber2Type = SFP_10G_SPEED; - // Fiber detected in CPU1 slot0, read speed via i2c - if (ReadCpldReg (CPU1_SFP0_LOCATE_OFFSET) == FIBER_PRESENT) { - Status = GetSfpSpeed (SOCKET_0, SfpNum1, &SfpSpeed1); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Get Socket0 Sfp%d Speed Error: %r.\n", - SfpNum1, Status)); - return Status; - } - *Fiber1Type = SfpSpeed1; - } else { - *Fiber1Type = SFP_10G_SPEED; - } - - // Fiber detected in CPU1 slot1, read speed via i2c - if (ReadCpldReg (CPU1_SFP1_LOCATE_OFFSET) == FIBER_PRESENT) { - Status = GetSfpSpeed (SOCKET_0, SfpNum2, &SfpSpeed2); - if (EFI_ERROR (Status)) { - *Fiber2Type = SFP_10G_SPEED; - DEBUG ((DEBUG_ERROR, "Get Sfp%d Speed Error: %r.\n", SfpNum2, Status)); - return Status; - } - *Fiber2Type = SfpSpeed2; - } else { - *Fiber2Type = SFP_10G_SPEED; - } - - return EFI_SUCCESS; -} - UINT16 MakeCrcCheckSum ( UINT8 *Buffer, UINT32 Length @@ -567,3 +346,42 @@ OemIsInitEth ( { return TRUE; } + +EFI_STATUS ConfigCDR(UINT32 Socket) +{ + return EFI_SUCCESS; +} + +UINT32 OemGetNclConfOffset (UINT32 Socket) +{ + UINT32 Cpu1NclConfOffet = 0; + UINT32 Cpu2NclConfOffet = 0; + + if (0 == Socket) { + MmioWrite32 (SRAM_NIC_NCL1_OFFSET_FLAG, Cpu1NclConfOffet); + return Cpu1NclConfOffet; + } else { + //2P only + // P1 + if ((ReadCpldReg (CPU2_SFP2_100G_CARD_OFFSET) & CARD_PRESENT_100G) != 0) { + Cpu2NclConfOffet = 0x20000; + } else { + Cpu2NclConfOffet = 0x10000; + } + MmioWrite32 (SRAM_NIC_NCL2_OFFSET_FLAG, Cpu2NclConfOffet); + return Cpu2NclConfOffet; + } +} + +UINT32 OemGetNetPortNum (UINT32 Socket) +{ + if (0 == Socket){ + return SOCKET0_NET_PORT_NUM; + } + + if ((ReadCpldReg (CPU2_SFP2_100G_CARD_OFFSET) & CARD_PRESENT_100G) != 0) { + return SOCKET1_NET_PORT_100G; + } else { + return SOCKET1_NET_PORT_NUM; + } +} From patchwork Fri Feb 1 13:34:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 157220 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp437812jaa; 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[198.145.21.10]) by mx.google.com with ESMTPS id y20si1059066pgi.50.2019.02.01.05.35.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:35:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=C7FheSMd; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C644E211C6096; Fri, 1 Feb 2019 05:35:55 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::642; helo=mail-pl1-x642.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl1-x642.google.com (mail-pl1-x642.google.com [IPv6:2607:f8b0:4864:20::642]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A6D6C211C5729 for ; Fri, 1 Feb 2019 05:35:54 -0800 (PST) Received: by mail-pl1-x642.google.com with SMTP id 101so3235797pld.6 for ; Fri, 01 Feb 2019 05:35:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EwcF2P2iH50zHX1f0+B3hl0TEujPDDTrwvepRmkDW5U=; b=C7FheSMdULC2l65zcywy/IaCUdX/ofkfVsAceM9CurQg4yBgAKvu56XOa2kWz6EaH5 r+50Gvmz3tpX32vTm2QKoARrqjrMkjsbBV2KpUzwbc01++kSW/YUIinC+b5KV0jAJ/Z/ DVkO2DuXQGVuSbCX1GVkOMtIpIq0yCRT1bMnQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EwcF2P2iH50zHX1f0+B3hl0TEujPDDTrwvepRmkDW5U=; b=trNhfrU983DInSW5bbMSSW6nrbMN5bNjXV1VxIuKoN0NCw9SYhps4mRTfsFnSaL4JA Z8n8w1XyKgdSfn4nzR0BgdBU9nMAlYuSEvY1+UesDJtELsCWMFBs5ks4E3DwbO7bTniM wKnczm5nCLSgzbmweI87WiWxwTKNQFoR3scOv5f5GGnMxJ2HySGwd20t9PAhJyWkswYr kw9gMmqJLDjs60ZHwPU+u4au540ICGJzGs1JwOeegTozgK48a4Zo7KLHd0gP4Ptle6XF rkiW45SrtuS3L3pz0336Gv4jhSaQxLyhSRWZWNXZoXFvu6H4CL04Om6Wx2KBtykQICU8 z4ww== X-Gm-Message-State: AJcUuke/EO1ND5dVVois7gLVlCjS9Pr6Ua47/XrBggvBRx/+Qfzo4uFx NBYtLKdzIVP1WZi7Usn3+J4HLA== X-Received: by 2002:a17:902:20e9:: with SMTP id v38mr37942279plg.250.1549028154072; Fri, 01 Feb 2019 05:35:54 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:35:53 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:31 +0800 Message-Id: <20190201133436.10500-12-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 11/16] Hisilicon/D06: Add Setup Item "Support DPC" X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add setup item "Support DPC" to enable or disable PCIe DPC (Downstream Port Containment). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Include/Library/OemConfigData.h | 1 + Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr | 2 - Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c | 4 + Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr | 197 +------------------- Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni | 3 +- 5 files changed, 10 insertions(+), 197 deletions(-) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h b/Silicon/Hisilicon/Include/Library/OemConfigData.h index f120e3123c83..c0097d0829f0 100644 --- a/Silicon/Hisilicon/Include/Library/OemConfigData.h +++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h @@ -49,6 +49,7 @@ typedef struct { UINT8 OSWdtAction; /*PCIe Config*/ UINT8 PcieSRIOVSupport; + UINT8 PcieDPCSupport; UINT8 PciePort[PCIE_MAX_TOTAL_PORTS]; UINT8 PcieLinkSpeedPort[PCIE_MAX_TOTAL_PORTS]; UINT8 PcieLinkDeEmphasisPort[PCIE_MAX_TOTAL_PORTS]; diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr index 08236704fbfe..93ccb99bdc67 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr @@ -62,11 +62,9 @@ formset prompt = STRING_TOKEN(STR_IBMC_CONFIG_FORM_TITLE), help = STRING_TOKEN(STR_IBMC_CONFIG_FORM_HELP); - suppressif TRUE; goto PCIE_CONFIG_FORM_ID, prompt = STRING_TOKEN(STR_PCIE_CONFIG_FORM_TITLE), help = STRING_TOKEN(STR_PCIE_CONFIG_FORM_HELP); - endif; goto MISC_CONFIG_FORM_ID, prompt = STRING_TOKEN(STR_MISC_CONFIG_FORM_TITLE), diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c index 6668103af027..be4ce8820f73 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c @@ -290,6 +290,10 @@ OemConfigUiLibConstructor ( Configuration.OSWdtTimeout = 5; Configuration.OSWdtAction = 1; // + //Set the default value of the PCIe option + // + Configuration.PcieDPCSupport = 0; + // //Set the default value of the Misc option // Configuration.EnableSmmu = 1; diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr index 7cf7cdd29ba2..c65907fe846e 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr @@ -17,203 +17,12 @@ form formid = PCIE_CONFIG_FORM_ID, title = STRING_TOKEN (STR_PCIE_CONFIG_FORM_TITLE); - goto VFR_FORMID_PCIE_SOCKET0, - prompt = STRING_TOKEN (STR_PCIE_CPU_0_PROMPT), - help = STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP); - - goto VFR_FORMID_PCIE_SOCKET1, - prompt = STRING_TOKEN (STR_PCIE_CPU_1_PROMPT), - help = STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP); - - oneof varid = OEM_CONFIG_DATA.PcieSRIOVSupport, - prompt = STRING_TOKEN (STR_SRIOV_SUPPORT_PROMPT), - help = STRING_TOKEN (STR_SRIOV_SUPPORT_HELP), + oneof varid = OEM_CONFIG_DATA.PcieDPCSupport, + prompt = STRING_TOKEN (STR_DPC_SUPPORT_PROMPT), + help = STRING_TOKEN (STR_DPC_SUPPORT_HELP), option text = STRING_TOKEN (STR_DISABLE), value = 0, flags = MANUFACTURING | DEFAULT | RESET_REQUIRED; option text = STRING_TOKEN (STR_ENABLE), value = 1, flags = RESET_REQUIRED; endoneof; endform; -form formid = VFR_FORMID_PCIE_SOCKET0, - title = STRING_TOKEN(STR_PCIE_CPU_0_PROMPT); - - goto VFR_FORMID_PCIE_PORT2, - prompt = STRING_TOKEN(STR_PCIE_PORT_2_PROMPT), - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP); - - goto VFR_FORMID_PCIE_PORT4, - prompt = STRING_TOKEN(STR_PCIE_PORT_4_PROMPT), - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP); - - goto VFR_FORMID_PCIE_PORT5, - prompt = STRING_TOKEN(STR_PCIE_PORT_5_PROMPT), - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP); - - goto VFR_FORMID_PCIE_PORT6, - prompt = STRING_TOKEN(STR_PCIE_PORT_6_PROMPT), - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP); - - goto VFR_FORMID_PCIE_PORT7, - prompt = STRING_TOKEN(STR_PCIE_PORT_7_PROMPT), - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP); - -endform; - -form formid = VFR_FORMID_PCIE_SOCKET1, - title = STRING_TOKEN(STR_PCIE_CPU_1_PROMPT); - goto VFR_FORMID_PCIE_PORT10, - prompt = STRING_TOKEN(STR_PCIE_PORT_10_PROMPT), - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP); - - goto VFR_FORMID_PCIE_PORT12, - prompt = STRING_TOKEN(STR_PCIE_PORT_12_PROMPT), - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP); - - goto VFR_FORMID_PCIE_PORT13, - prompt = STRING_TOKEN(STR_PCIE_PORT_13_PROMPT), - help = STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP); -endform; - -form formid = VFR_FORMID_PCIE_PORT0, - title = STRING_TOKEN(STR_PCIE_PORT_0_PROMPT); - #undef INDEX - #define INDEX 0 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT1, - title = STRING_TOKEN(STR_PCIE_PORT_1_PROMPT); - - #undef INDEX - #define INDEX 1 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT2, - title = STRING_TOKEN(STR_PCIE_PORT_2_PROMPT); - - #undef INDEX - #define INDEX 2 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT3, - title = STRING_TOKEN(STR_PCIE_PORT_3_PROMPT); - - #undef INDEX - #define INDEX 3 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT4, - title = STRING_TOKEN(STR_PCIE_PORT_4_PROMPT); - - #undef INDEX - #define INDEX 4 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT5, - title = STRING_TOKEN(STR_PCIE_PORT_5_PROMPT); - - #undef INDEX - #define INDEX 5 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT6, - title = STRING_TOKEN(STR_PCIE_PORT_6_PROMPT); - - #undef INDEX - #define INDEX 6 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT7, - title = STRING_TOKEN(STR_PCIE_PORT_7_PROMPT); - - #undef INDEX - #define INDEX 7 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT8, - title = STRING_TOKEN(STR_PCIE_PORT_8_PROMPT); - - #undef INDEX - #define INDEX 8 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT9, - title = STRING_TOKEN(STR_PCIE_PORT_9_PROMPT); - - #undef INDEX - #define INDEX 9 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT10, - title = STRING_TOKEN(STR_PCIE_PORT_10_PROMPT); - - #undef INDEX - #define INDEX 10 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT11, - title = STRING_TOKEN(STR_PCIE_PORT_11_PROMPT); - - #undef INDEX - #define INDEX 11 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT12, - title = STRING_TOKEN(STR_PCIE_PORT_12_PROMPT); - - #undef INDEX - #define INDEX 12 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT13, - title = STRING_TOKEN(STR_PCIE_PORT_13_PROMPT); - - #undef INDEX - #define INDEX 13 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT14, - title = STRING_TOKEN(STR_PCIE_PORT_14_PROMPT); - - #undef INDEX - #define INDEX 14 - #include "PciePortConfig.hfr" - -endform; - -form formid = VFR_FORMID_PCIE_PORT15, - title = STRING_TOKEN(STR_PCIE_PORT_15_PROMPT); - - #undef INDEX - #define INDEX 15 - #include "PciePortConfig.hfr" - -endform; - diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni index d87d30f975b8..0127ea952dee 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni @@ -26,7 +26,8 @@ #string STR_PCIE_CPU_1_PROMPT #language en-US "CPU 1 PCIE Configuration" #string STR_SRIOV_SUPPORT_PROMPT #language en-US "SRIOV" #string STR_SRIOV_SUPPORT_HELP #language en-US "This option enables / disables the SRIOV function" - +#string STR_DPC_SUPPORT_PROMPT #language en-US "Support DPC" +#string STR_DPC_SUPPORT_HELP #language en-US "This option enables / disables the DPC function" #string STR_PCIE_PORT_PROMPT_HELP #language en-US "Press to config this port." #string STR_PCIE_PORT_0_NULL_PROMPT #language en-US "" #string STR_PCIE_PORT_0_PROMPT #language en-US "CPU 0 Pcie - Port 0" From patchwork Fri Feb 1 13:34:32 2019 Content-Type: text/plain; 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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id bi6si7499030plb.279.2019.02.01.05.36.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:36:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="a9IVAMx/"; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 009FA211C609A; Fri, 1 Feb 2019 05:35:58 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::641; helo=mail-pl1-x641.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl1-x641.google.com (mail-pl1-x641.google.com [IPv6:2607:f8b0:4864:20::641]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B8737211C5729 for ; Fri, 1 Feb 2019 05:35:57 -0800 (PST) Received: by mail-pl1-x641.google.com with SMTP id w4so3246748plz.1 for ; Fri, 01 Feb 2019 05:35:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+s4AGV80FE9hgqm7Qa3PaV6XRFznAxjSZXmqi4X2oFk=; b=a9IVAMx/w25xWWY3enjdRlXbx5yq32rwpIgd8+CItKWg17+sXvtG7B0rxGe70l771G 2yfrmKlkdyPupnxQeD6iCB68MYjWgLyXy9QBs5oIVMNJMPwGZnY1Kd6yU/2x2yj0LvB2 pM2zN77zsju4oXgca14QBA0R6+kFZRWivBlPI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+s4AGV80FE9hgqm7Qa3PaV6XRFznAxjSZXmqi4X2oFk=; b=A/Y4r7n5olF3EaC3lhBshjqNaNV3ySC62LYyv2Xhg+VnVSkj+JY2BOfZJtCY7NPrOe h/ghV8K7mDD58m8Aal+t2tjHinRe9Hk1MIIjydwOCEpgCHcKgHa17hL9kwdZKwdrQ1sK SNEIK5jvC5GIgWOcEg801Tx1yzfYlDbIp+ddN9IU92mz0mWo3vrkb5M+QtLYDEFqTZga 26Jh61thuA6uO+020hUtg4218rRfeSyFJpKDNB/DbMM1C2OCfuIFddd6tAJ55ZnCSe6p xQlxaums+fxm3YHvIKRLy/OKmIgvbd6541Tgq23fcEXm5SGvy0OkPoPs7ajuIElExY8b gePg== X-Gm-Message-State: AJcUukc88fj6nraIzs+Ck7oZuLpWFn767bw1LXnQb4Q4Gno5m+A10FkI Tk9vy9JJnZkNW8eDbgJcc1MnPQ== X-Received: by 2002:a17:902:9a8b:: with SMTP id w11mr38573710plp.121.1549028157477; Fri, 01 Feb 2019 05:35:57 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:35:56 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:32 +0800 Message-Id: <20190201133436.10500-13-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 12/16] Hisilicon/D06: Use new flash layout X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" In new flash layout, BIOS fd change from offset 1M to 8M in 16M spi flash. Use the new CustomData.Fv which indicate the offset of fd and which flash area can be updated for BMC. This patch is relative with patch "Use new flash layout" in edk2-non-osi. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D06/D06.fdf | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf index d495ad7f264c..f72b513352fb 100644 --- a/Platform/Hisilicon/D06/D06.fdf +++ b/Platform/Hisilicon/D06/D06.fdf @@ -29,7 +29,7 @@ [DEFINES] ################################################################################ [FD.D06] -BaseAddress = 0x204100000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. +BaseAddress = 0x204800000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device ErasePolarity = 1 @@ -124,7 +124,7 @@ [FD.D06] 0x003E0000|0x00010000 0x003F0000|0x00010000 -FILE = Platform/Hisilicon/D0x-CustomData.Fv +FILE = Platform/Hisilicon/D06/CustomData.Fv ################################################################################ # From patchwork Fri Feb 1 13:34:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 157222 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp437966jaa; Fri, 1 Feb 2019 05:36:05 -0800 (PST) X-Google-Smtp-Source: ALg8bN7W9IpzrNTSm+vJg5XFn167bfe98MDLSmuoKqFJawHrTYHPdrs162g1C0Ctgk5wO45027cg X-Received: by 2002:a17:902:c5:: with SMTP id a63mr40212070pla.267.1549028165207; Fri, 01 Feb 2019 05:36:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549028165; cv=none; d=google.com; s=arc-20160816; b=Hb4wqKaZ4sbgF+95dpB9RCDv6wSM18C0sxcOwfpQrODebOT7nzXhOhGqwFLmKFOLsF B9pBvvEKgRJVrNRWBYmVUO77FVyPyBwvfqogeYBOMsvq+tZ8Fv/McVWsAUc6eIUwBwnT LNDll1u7a8XGZsLhPN2tPA5iw3FotkOt5fgHsPvCUq0AqONx59wjk0ZTcPYth31Pn7wz ccv5Y1rjERRVGUt7cwNb3FIHqqcLRJenuN9Ez7caE2gMrd1bG15L84mHOBRSrJYh3PTz CP8QmTljFrviHHV51qs7HsnkiOr8QdSxekgpGNwSEyu0XPc5n+XyvOk6HFvnWv/DYXhm XE2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to; bh=pqd76FyuC4uq1Hh4OpppA2cgnVFBIAv9Wt2nOcKfPIw=; b=ac2MNm4BPNhGf73EncQI4K4tWqSG+dCothu7ugQfZJufvA3qFi+ON6w4qNo9rgYGyU xdnB6pnFcBGfQ7VL1NNDXJfNK4/qLv1CC5vUReoZMRnbea5I92+p6Nfa5Us5PFQxiptF iGj8JtMzehpWu69h7CXqOZmT6cJpTA+UL7RDhCj6tgkt3bhHtUn0WKQGZaQUrvAjoVCY splAoIbXFlIrxDOXpyz931YzATtwMv/+r+MUAOYk1iKlklklSXEQR3X+yyTLwmrmAFzx YZCrKNHfwK8OlplFo8p3i3ycUlIc9I40d49NAlnpSXKKuqvPvw38R6DxdDimp2s1ons5 pfQg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=RQ+0dL+V; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id f95si8224764plb.60.2019.02.01.05.36.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:36:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=RQ+0dL+V; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 32BA7211C6075; Fri, 1 Feb 2019 05:36:02 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::542; helo=mail-pg1-x542.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 475CD211C5729 for ; Fri, 1 Feb 2019 05:36:01 -0800 (PST) Received: by mail-pg1-x542.google.com with SMTP id y4so2948836pgc.12 for ; Fri, 01 Feb 2019 05:36:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Bfa3JFfG5vqXmoA5jHU1dPz6uLwLTYJOEtsyTVkaaQo=; b=RQ+0dL+Va3I9TtPYl1Ja+wLtem9mMAz5QgoCfHR+M0lAXBTYoJJrsW9Xitu/r+a4Pv nN1uK6bXb/MSQEp43WKSuiAUE4Xenh/epYXBQlngKYgheJYzDAKXg1ZxOykZ98SCxNSO lBs0K5VPMh4E1dsMgGK0rtGjiJmwk3mJoa+Tw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Bfa3JFfG5vqXmoA5jHU1dPz6uLwLTYJOEtsyTVkaaQo=; b=uoHR0pRFAeFaqpc62LFkgUE5Pv+98mrMnBD9TTnqR22Wees4Dj80i5hPcyfjeWSoWJ NwLjvSwHeRPwO4zWQH6oPvhJ6OLIcrQ3fBm0UEpWAgi4+0vWSitm3rYsugdcjmLfHCPJ +m4J0THHOIAIKxcF14raAl8BtsAcRD3Al1MkR/gSRwOjzQG1sQX0QK1PN1vWQv84WR1R Ay0KuuxA6Lbs6Li0Zw4UxOJ6Syfv3Eungwtb9FEN8CLT1iMVzaYpGaUN/iFjW44gHjxC Qjpwo6MaIRlL/+MbTF5Lz/U6aaSARceU7CM77CpfvScxQsAry0xKn2V9pK6s5J9Mtpps 9EDw== X-Gm-Message-State: AJcUukcWT0DsaHUL6VYFdml/pN/CLxAJW3b9tuMZP0jwl8S7EylaIqWg gWSc9qc1kx2aiVvw2+wMm2rzFeLqEa4UnA== X-Received: by 2002:a62:4851:: with SMTP id v78mr39700576pfa.97.1549028160939; Fri, 01 Feb 2019 05:36:00 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.35.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:36:00 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:33 +0800 Message-Id: <20190201133436.10500-14-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 13/16] Hisilicon/D06: Remove SECURE_BOOT_ENABLE definition X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" As secure boot is not ready, remove SECURE_BOOT_ENABLE and relative code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D06/D06.dsc | 12 ------------ Platform/Hisilicon/D06/D06.fdf | 11 ----------- 2 files changed, 23 deletions(-) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index 6d581337f199..a3a01bfb1e23 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -30,7 +30,6 @@ [Defines] FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf DEFINE NETWORK_IP6_ENABLE = FALSE DEFINE HTTP_BOOT_ENABLE = FALSE - DEFINE SECURE_BOOT_ENABLE = FALSE !include Silicon/Hisilicon/Hisilicon.dsc.inc @@ -87,9 +86,6 @@ [LibraryClasses.common] LpcLib|Silicon/Hisilicon/Hi1620/Library/LpcLibHi1620/LpcLib.inf SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf OemNicLib|Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf -!if $(SECURE_BOOT_ENABLE) == TRUE - FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf -!endif PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf PciPlatformLib|Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf @@ -290,15 +286,7 @@ [Components.common] MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf -!if $(SECURE_BOOT_ENABLE) == TRUE - MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf { - - NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf - } - SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf -!else MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf -!endif Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf index f72b513352fb..e402628a1b35 100644 --- a/Platform/Hisilicon/D06/D06.fdf +++ b/Platform/Hisilicon/D06/D06.fdf @@ -88,17 +88,10 @@ [FD.D06] #Blockmap[1]: End 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ## This is the VARIABLE_STORE_HEADER -!if $(SECURE_BOOT_ENABLE) == TRUE - #Signature: gEfiAuthenticatedVariableGuid = - # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }} - 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, - 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92, -!else #Signature: gEfiVariableGuid = # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, -!endif #Size: 0xe000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xdFB8 0xB8, 0xdF, 0x00, 0x00, #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 @@ -183,10 +176,6 @@ [FV.FvMain] INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf -!if $(SECURE_BOOT_ENABLE) == TRUE - INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf -!endif - INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf From patchwork Fri Feb 1 13:34:34 2019 Content-Type: text/plain; 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[198.145.21.10]) by mx.google.com with ESMTPS id y6si7533428pll.384.2019.02.01.05.36.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 05:36:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="Q4/JY4rs"; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 65981211C607A; Fri, 1 Feb 2019 05:36:05 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::52f; helo=mail-pg1-x52f.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x52f.google.com (mail-pg1-x52f.google.com [IPv6:2607:f8b0:4864:20::52f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AF088211C5729 for ; Fri, 1 Feb 2019 05:36:04 -0800 (PST) Received: by mail-pg1-x52f.google.com with SMTP id d72so2957402pga.9 for ; Fri, 01 Feb 2019 05:36:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jSFrkK7s6HzfLKkRikLUSfaUR6DN2fPFfTEXqFyS3p0=; b=Q4/JY4rshMfv5y9Ygx+jzJR05+adQCw9X3PQKFzLenSItL0m2QCxBcaN1BYtOBpn8W ESZ+xTyZ5zzTafDJIz0IdJ+Lgj1/1b+pkeevgQPnnSBuUuFsotZTmm0GoesAQm+6hfHA NWJngBiZkydEZePS7ryVodztBR4AMa31Zd1iw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jSFrkK7s6HzfLKkRikLUSfaUR6DN2fPFfTEXqFyS3p0=; b=MdQI90yuE9/QrO+QWnTjJauB8B7SKPU0aLMaKwOiKJ4PYx0b3GlRumrbUKIo1Pmk9S RrAyeuG224iIaZQh+cSzTj7o4/VmrF1C4d8ZsipVnNMCZjvmLdvE7aiT9dkq4V9TQvzN eEpd3q9B2Ftog1iniMGmiF5yNVllDlAzDhvFLQrqVQmToxAeKurWtZBr5JDANoaHjapj E/284ZIfPIQjSBHzTpYXu8zzCve29AcRdhLpcJbdkgAq6Qf9nFUAi2sG4HNj1tFRxLky z2ChJMdkVhYznnAIm00p1UwC8xIw5mF03+fo+cMpKqWXfI1fjW8wPDthSGIinUNLtwo3 VbBw== X-Gm-Message-State: AJcUukdreXLZIm03v9AelxqzDbdxRRz6ft3Gnj14Z3OENHm9hQKhy/1B iOi1lDL+YlLwAbni8MHnq8n7lQ== X-Received: by 2002:a62:d005:: with SMTP id p5mr39500514pfg.175.1549028164372; Fri, 01 Feb 2019 05:36:04 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id s21sm11134073pfk.133.2019.02.01.05.36.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Feb 2019 05:36:03 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 1 Feb 2019 21:34:34 +0800 Message-Id: <20190201133436.10500-15-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org> References: <20190201133436.10500-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 14/16] Hisilicon/D0x: Remove SP805 watchdog pcd X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" SP805 watchdog is no used for D0x, so remove it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D03/D03.dsc | 3 --- Platform/Hisilicon/D05/D05.dsc | 3 --- Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf | 1 - 3 files changed, 7 deletions(-) -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index fe443dd929ad..35b54f8c83be 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -149,9 +149,6 @@ [PcdsFixedAtBuild.common] gHisiTokenSpaceGuid.PcdPcieRootBridgeMask|0x7 # bit0:HB0RB0,bit1:HB0RB1,bit2:HB0RB2,bit3:HB0RB3,bit4:HB1RB0,bit5:HB1RB1,bit6:HB1RB2,bit7:HB1RB3 - ## SP805 Watchdog - Motherboard Watchdog - gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x601e0000 - ## Serial Terminal gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2F8 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 0c4f21fbe056..49bd5b37ea34 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -163,9 +163,6 @@ [PcdsFixedAtBuild.common] gHisiTokenSpaceGuid.PcdPcieRootBridgeMask2P|0x34F4 # bit0:HB0RB0,bit1:HB0RB1,bit2:HB0RB2,bit3:HB0RB3,bit4:HB0RB4,bit5:HB0RB5,bit6:HB0RB6,bit7:HB0RB7 # bit8:HB1RB0,bit9:HB1RB1,bit10:HB1RB2,bit11:HB1RB3,bit12:HB1RB4,bit13:HB1RB5,bit14:HB1RB6,bit14:HB1RB15 - ## SP805 Watchdog - Motherboard Watchdog - gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x601e0000 - ## Serial Terminal gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x602B0000 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 diff --git a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf index 3563df6e10d1..4ce5f5fea1f3 100644 --- a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf +++ b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf @@ -61,5 +61,4 @@ [FixedPcd] gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase gHisiTokenSpaceGuid.PcdSysControlBaseAddress gHisiTokenSpaceGuid.PcdPeriSubctrlAddress - gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase