From patchwork Tue Jul 26 18:23:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 593463 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:b811:0:0:0:0 with SMTP id fc17csp3780499mab; Tue, 26 Jul 2022 11:31:04 -0700 (PDT) X-Google-Smtp-Source: AGRyM1sLP3uoagj7oyEDgs8ktWlA90qeNBp0+XligG71uU5CTX4o+t2n2i0yzRltBSX4ltFxmAQN X-Received: by 2002:a05:620a:754:b0:6b5:eb92:42e5 with SMTP id i20-20020a05620a075400b006b5eb9242e5mr13833557qki.183.1658860264134; Tue, 26 Jul 2022 11:31:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1658860264; cv=none; d=google.com; s=arc-20160816; b=qDkTNOTCak8r8HhcNU4NrRIOfJY69aDgMa34J8U5tk3XVgC6fA9D8WU9Wz9Iti1c32 ztr6od/DaC1lVMg4R8vkMknx048aEjfhSFEHXV24XlDSaDJiEuzl7PmxZc2CTK4H9Ssh s4zbQNkM4gYI9dQ4YjgNnHNFpPuhzk4BhLkfLEGXbjapuTP/KRpVOFbb+bvKQmy4UHLt a24ZNidc0/5FpNstw4kWBvW1k/6L0ClE/BdGONLpQWf6MT2z2URpUln3VzUfK+1KNNDR 3nusKDHtMXN11WoFK0EWuX4Z9ZaoWSzaiglmwmwdsHFrBI674JdNxpunZQX5BQ5/smNf kumw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=vy16z4ljJdbwe81vd9Sx+BZv55mLr+tRl2mig2DmfaQ=; b=uOzb7QUOLr5lj6T715XRulWKzYuQHFyaX4z9ZqbgR9bTTVjbZg1smf0kkOPiQEAogz YKc2Cq6aOtbSiWPNzT7fpAzFS2UBxrrtIT0dze6ssbA2z+aQOYBldb9o0lRMuOMM2QNt PjFRMXs6q0fNVBmJMOZxaLOhWcZrI49VYX90V6ZfbJspnYmJzF7MoJaw0uEeJ1mSYAzx jQuqaogKDTp3Bey6+KlT0N4joYrcM1gPZCPioVP1DlGmxdX6qveI8PM3NGhfC+weusLa YC4m4wrYbR83emX3M7n5UqtZwEjRHfXJRANrWQ/2Rh+rFECNCIfCdLWGwugoqCW+74SS FnWA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KDQTm0Fx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f5-20020adff445000000b0021e5f32ade7sm11725343wrp.68.2022.07.26.11.23.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jul 2022 11:23:45 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, BALATON Zoltan , Daniel Henrique Barboza , =?utf-8?q?C=C3=A9dric_Le_G?= =?utf-8?q?oater?= Subject: [RFC 1/2] hw/ppc/ppc440_uc: Initialize length passed to cpu_physical_memory_map() Date: Tue, 26 Jul 2022 19:23:40 +0100 Message-Id: <20220726182341.1888115-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220726182341.1888115-1-peter.maydell@linaro.org> References: <20220726182341.1888115-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_HELO_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" In dcr_write_dma(), there is code that uses cpu_physical_memory_map() to implement a DMA transfer. That function takes a 'plen' argument, which points to a hwaddr which is used for both input and output: the caller must set it to the size of the range it wants to map, and on return it is updated to the actual length mapped. The dcr_write_dma() code fails to initialize rlen and wlen, so will end up mapping an unpredictable amount of memory. Initialize the length values correctly, and check that we managed to map the entire range before using the fast-path memmove(). This was spotted by Coverity, which points out that we never initialized the variables before using them. Fixes: Coverity CID 1487137 Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- This seems totally broken, so I presume we just don't have any guest code that actually exercises this... --- hw/ppc/ppc440_uc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index a1ecf6dd1c2..11fdb88c220 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -904,14 +904,17 @@ static void dcr_write_dma(void *opaque, int dcrn, uint32_t val) int width, i, sidx, didx; uint8_t *rptr, *wptr; hwaddr rlen, wlen; + hwaddr xferlen; sidx = didx = 0; width = 1 << ((val & DMA0_CR_PW) >> 25); + xferlen = count * width; + wlen = rlen = xferlen; rptr = cpu_physical_memory_map(dma->ch[chnl].sa, &rlen, false); wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen, true); - if (rptr && wptr) { + if (rptr && rlen == xferlen && wptr && wlen == xferlen) { if (!(val & DMA0_CR_DEC) && val & DMA0_CR_SAI && val & DMA0_CR_DAI) { /* optimise common case */ From patchwork Tue Jul 26 18:23:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 593461 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:b811:0:0:0:0 with SMTP id fc17csp3777907mab; Tue, 26 Jul 2022 11:26:47 -0700 (PDT) X-Google-Smtp-Source: AGRyM1viJg4+r6EoJahh4uJ1dAklIMHYLxt4AmryUHi3zWyukcq6F3+z/KPN9pfn6FpBj0d2gRgQ X-Received: by 2002:a05:620a:2910:b0:6b6:ed0:aad8 with SMTP id m16-20020a05620a291000b006b60ed0aad8mr13025571qkp.212.1658860006951; Tue, 26 Jul 2022 11:26:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1658860006; cv=none; d=google.com; s=arc-20160816; b=MSCCfBu+Dj9lnParOPDOZE7NQO4fNKS1ZEfkRN6sQ86Mbh7Ks8HqRx1T2Tsnp21i+j GNI1ibQAFHBu4W9bUSLTykVJUznQ3pCSCkE6Hc5mvQs5Z4NdWGIF+sdwbvrRHLPwYmiq pekpPcXCQYubK10aNc/RdABMO9ckA6grUpjrnn3pLI1uAOZe4YHpKpeNlr5kL+3PJq64 REiQ8xKcxdePsy3z2px2itCebO7E1EsgfdhAmM/qvOZaIYOEFxbG/rmt9R827N4yfqXP LsUJuHFRfUJ/Trfyw6S59Mz8LJvWwFGCK0lIeCdd4bghoW5g8I6MdgivHGirtUtb9d/b tBeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=QQROlt4QVdWy3PgKcMHnT+BgFWVY7Xfnt+DtI1eK/+U=; b=xh+GvAbTQCol9Pwcti6VVq7bjZnzJgZ7EZi7Zd97AAmoW/6gAXYN8505MwaKJ4qXsd JtJvrEzC0o59icEGxM0evJYKWcnHJCDEYLBgQuxx8/jBy4ExmowszsmguB0ZXLZuYgDv ZPB6JPL3Ai16p0fyHF2iD0Aww3ODmYTpcT428oC0+1/fUu4Z6gH3lJSEDr/s73xI4+Or QioOVRRZhkfZgh7ht/SwsUU5ZsVm1mnILAEGaq/d11AfrstRQp5lzz8KRM+guoU8xg+8 buyjsOnTyuGCpgHtaCYmUhENj//h6ycjgmzeuyGLxuLThsWVhR6cK84Lh4Tl98Hv9Vyk Lzmg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hI4I+aG+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f5-20020adff445000000b0021e5f32ade7sm11725343wrp.68.2022.07.26.11.23.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jul 2022 11:23:46 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, BALATON Zoltan , Daniel Henrique Barboza , =?utf-8?q?C=C3=A9dric_Le_G?= =?utf-8?q?oater?= Subject: [RFC 2/2] hw/ppc/ppc440_uc: Handle mapping failure in DMA engine Date: Tue, 26 Jul 2022 19:23:41 +0100 Message-Id: <20220726182341.1888115-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220726182341.1888115-1-peter.maydell@linaro.org> References: <20220726182341.1888115-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Currently the code for doing DMA in dcr_write_dma() has no fallback code for if its calls to cpu_physical_memory_map() fail. Add handling for this situation, by using address_space_read() and address_space_write() to do the data transfers. Signed-off-by: Peter Maydell --- I believe this to be equivalent to the fastpath code. However, as the comments note, I don't know what the intended behaviour on a DMA memory access error is, because I couldn't find a datasheet for this hardware. I am also a bit suspicious that the current code does not seem to update any of the count, source or destination addresses after the memory transfer: is that really how the hardware behaves? --- hw/ppc/ppc440_uc.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 11fdb88c220..0879f180a14 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -905,6 +905,7 @@ static void dcr_write_dma(void *opaque, int dcrn, uint32_t val) uint8_t *rptr, *wptr; hwaddr rlen, wlen; hwaddr xferlen; + bool fastpathed = false; sidx = didx = 0; width = 1 << ((val & DMA0_CR_PW) >> 25); @@ -915,6 +916,7 @@ static void dcr_write_dma(void *opaque, int dcrn, uint32_t val) wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen, true); if (rptr && rlen == xferlen && wptr && wlen == xferlen) { + fastpathed = true; if (!(val & DMA0_CR_DEC) && val & DMA0_CR_SAI && val & DMA0_CR_DAI) { /* optimise common case */ @@ -940,6 +942,33 @@ static void dcr_write_dma(void *opaque, int dcrn, uint32_t val) if (rptr) { cpu_physical_memory_unmap(rptr, rlen, 0, sidx); } + if (!fastpathed) { + /* Fast-path failed, do each access one at a time */ + for (sidx = didx = i = 0; i < count; i++) { + uint8_t buf[8]; + assert(width <= sizeof(buf)); + if (address_space_read(&address_space_memory, + dma->ch[chnl].sa + sidx, + MEMTXATTRS_UNSPECIFIED, + buf, width) != MEMTX_OK) { + /* FIXME: model correct behaviour on errors */ + break; + } + if (address_space_write(&address_space_memory, + dma->ch[chnl].da + didx, + MEMTXATTRS_UNSPECIFIED, + buf, width) != MEMTX_OK) { + /* FIXME: model correct behaviour on errors */ + break; + } + if (val & DMA0_CR_SAI) { + sidx += width; + } + if (val & DMA0_CR_DAI) { + didx += width; + } + } + } } } break;