From patchwork Sun Jul 24 14:04:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 593170 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37E28C433EF for ; Sun, 24 Jul 2022 14:04:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231377AbiGXOEa (ORCPT ); Sun, 24 Jul 2022 10:04:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229494AbiGXOEa (ORCPT ); Sun, 24 Jul 2022 10:04:30 -0400 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFFAB12631 for ; Sun, 24 Jul 2022 07:04:25 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id y11so14382292lfs.6 for ; Sun, 24 Jul 2022 07:04:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=s0ASRw18lgzywYyTsagXKKvbBg90h5rD8OpC1S5h+xM=; b=mdC50YomQRDZdmSUXeSVcoqF2unvVSJwSGOTDBOhGSB6NG9wjTN4yfUDwie7qJQ2D3 tBoM2jFBm7xUbDt33guWjzjQCWiPJpyeiyo/DA+Xi2+whDBYAxQV0S8atBV3W2OCTKyR S4uQpaxBqUzcoG16O5fxb0Ri+Qg+da+Vf4Avri/yEBgjLbn293ZX9oRuyxoT/PCCru9J wE5KyYUpU+BiP5pxGxN6bXsoc/ZP/RbFt072hn+rPFH6HnPbnxrgnazK4rjOfzWtwbFQ Z2ea2GVhC3WZqY34kKDBSCAddbRNOtFsbmFkGIzgs7YauZloBFsHThH6py/DeA7GZxD3 Fd4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=s0ASRw18lgzywYyTsagXKKvbBg90h5rD8OpC1S5h+xM=; b=VV9IrDcgG709JOFtNdsfcsCHgDxKU/jV/0BS8GeDwJ8fxf4tQIM9XzhNT7xQmSwsms FSnox5+nY2JvaANx9gh3n2WrPKuID3WWT7PdpaCEpqq+Ad8F8X3AxJjKNTZFbJJNcOwQ YvyisniLM49Sy5KwgBtCdaiJQtdqhnyfasYxqB7KEyCyVO3zzNc1ywx/4qu/1VQdDCM7 9bC3UQ3/IG+TwJJgiKYBrpD5GEymTQDOuOBCzlaM/1txnsl/POCdJTqi1o17iY/V/LyQ TyARCR2/YxCS2taObN/kf/jRFCPTqu6HG3Sng5fPxeFta1dNPmEHe/1zTPhC3zGgLLmi 0mxA== X-Gm-Message-State: AJIora8VL5sJ/0JrmXdKguz36fp8JBT9Pov/FgUyZtWtINNXGkmWGdQA 2Y0QVaf0yYMiW8Pt3fYa1BT9Lg== X-Google-Smtp-Source: AGRyM1vIOOLvlHTeWbJYtiX/0i9kEkNs3w/skZ6e1qHR6S0B5uLfGe9xYtt6fYR2nGwubfYk/8lmxA== X-Received: by 2002:a05:6512:2394:b0:48a:7cfd:72ac with SMTP id c20-20020a056512239400b0048a7cfd72acmr2960663lfv.411.1658671463981; Sun, 24 Jul 2022 07:04:23 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s13-20020a056512202d00b00489dedf1dcfsm2192622lfs.289.2022.07.24.07.04.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 24 Jul 2022 07:04:23 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Yassine Oudjana Subject: [PATCH 1/7] dt-bindings: arm: qcom: separate msm8996pro bindings Date: Sun, 24 Jul 2022 17:04:15 +0300 Message-Id: <20220724140421.1933004-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> References: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Xiaomi Mi 5s Plus (natrium) and Xiaomi Mi Note 2 (scorpio) use MSM8996Pro rather than plain MSM8996. Describe this in the arm/qcom.yaml bindings. Since MSM8996Pro is largely compatible with MSM8996, keep old compatible too rather than insiting on qcom,msm8996pro only. This allows the code that doesn't yet know about msm8996pro to continue supporting these devices. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/qcom.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index fb1d00bcc847..3892aedd9215 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -223,8 +223,13 @@ properties: - sony,kagura-row - sony,keyaki-row - xiaomi,gemini + - const: qcom,msm8996 + + - items: + - enum: - xiaomi,natrium - xiaomi,scorpio + - const: qcom,msm8996pro - const: qcom,msm8996 - items: From patchwork Sun Jul 24 14:04:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 593169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C194FCCA47C for ; Sun, 24 Jul 2022 14:04:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229494AbiGXOEb (ORCPT ); Sun, 24 Jul 2022 10:04:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229966AbiGXOEa (ORCPT ); Sun, 24 Jul 2022 10:04:30 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B19951263A for ; Sun, 24 Jul 2022 07:04:26 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id t1so14407773lft.8 for ; Sun, 24 Jul 2022 07:04:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MDl7hBBXyC2qyXOHEtNz4BkIThpm3reDpOdNdy0xwpY=; b=V0Xr0E4DcJ+7+T9b9fM1RN4rkPeqZUtYqAtqhDAep3UUGOg9k42smjvDyjwW3tWgBp dN6u48LiwriKmQWuicn9Cpeu7Njpc1TLIiQ10Y5wJI2QPyl+6xavs3iJBoa9Gr+orcEu CQZVKMoPmQygmFUHyiVJLl2P48pTMAihC1FUhKcPHea89ItpxaIKgFdaMrocIdakFhHD AE302y5Fl2fa/fEB6yaORgD1c2y7EMVdpPIQgCeWVNmabW74pJh7F6yy6wE3ch8Xxwrl WN6p3+dT69ZQJ1yJXgQ4gFvoCawFjAo+OSfbDZiM0wD4jqABOzUak1Bb6MMAS0dmSzVx /dNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MDl7hBBXyC2qyXOHEtNz4BkIThpm3reDpOdNdy0xwpY=; b=cVTStqA+RAtniZ+TCq+PLuM9ln+uLJ6cm80eScFa0H1N2ezdlAjbMwNkxQiv3jbivD U/lhu8m/08IRzEGYjCsWIoaSI+tReN91BbobEg2Mv/V3LdYSlHYTRnL5djjpEj/IWB+y kYLe+HZgGNillJRemb5s45iFCblKIoP7F49PmbfOVUNwS2a9+pif/m4+l6lXBzzPEouL Shz8ZAeqplXcouIgjgzPhj1T0SZIEILOvnC5u6vQeAb9JlLXnzmrRXfmse7OQvZyGGe3 T2VqxHfQtdYU0YZVtMbZM7YrbCqqVBAqfnObLJGh/2YhBV3d7UeTCWmahCn1BEQ/YuTv Dccw== X-Gm-Message-State: AJIora/uqfCAreh0vMNLE6c7xHUB8AqMfNS43BoSMljtc2bKlGH5JWDc 9iCZAS3w7IhtiDj8gJb1z09UIg== X-Google-Smtp-Source: AGRyM1vyJyRGdDu6DQBPZNwjI9MhtKju4zQOvNPrVi3iBLAFwRtSL0JX/Woq+RMrMmiSiFGeUI+DzQ== X-Received: by 2002:a05:6512:258b:b0:48a:83da:4f0a with SMTP id bf11-20020a056512258b00b0048a83da4f0amr1805432lfb.256.1658671464976; Sun, 24 Jul 2022 07:04:24 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s13-20020a056512202d00b00489dedf1dcfsm2192622lfs.289.2022.07.24.07.04.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 24 Jul 2022 07:04:24 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Yassine Oudjana , Yassine Oudjana Subject: [PATCH 2/7] arm64: dts: qcom: msm8996: Add MSM8996 Pro support Date: Sun, 24 Jul 2022 17:04:16 +0300 Message-Id: <20220724140421.1933004-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> References: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Yassine Oudjana Qualcomm MSM8996 Pro is a variant of MSM8996 with higher frequencies supported both on CPU and GPU. There are other minor hardware differencies in the CPU and GPU regulators and bus fabrics. However this results in significant differences between 8996 and 8996 Pro CPU OPP tables. Judging from msm-3.18 there are only few common frequencies supported by both msm8996 and msm8996pro. Rather than hacking the tables for msm8996, split msm8996pro support into a separate file. Later this would allow having additional customizations for the CBF, CPR, retulators, etc. Fixes: 90173a954a22 ("arm64: dts: qcom: msm8996: Add CPU opps") Signed-off-by: Yassine Oudjana [DB: Realigned supported-hw to keep compat with current cpufreq driver] [DB: dropped all non-CPU-OPP changes] Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 82 +++---- arch/arm64/boot/dts/qcom/msm8996pro.dtsi | 266 +++++++++++++++++++++++ 2 files changed, 307 insertions(+), 41 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/msm8996pro.dtsi diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 742eac4ce9b3..41c09895268e 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -143,82 +143,82 @@ cluster0_opp: opp-table-cluster0 { /* Nominal fmax for now */ opp-307200000 { opp-hz = /bits/ 64 <307200000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-422400000 { opp-hz = /bits/ 64 <422400000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-480000000 { opp-hz = /bits/ 64 <480000000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-556800000 { opp-hz = /bits/ 64 <556800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-652800000 { opp-hz = /bits/ 64 <652800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-729600000 { opp-hz = /bits/ 64 <729600000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-844800000 { opp-hz = /bits/ 64 <844800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-960000000 { opp-hz = /bits/ 64 <960000000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1036800000 { opp-hz = /bits/ 64 <1036800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1113600000 { opp-hz = /bits/ 64 <1113600000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1190400000 { opp-hz = /bits/ 64 <1190400000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1228800000 { opp-hz = /bits/ 64 <1228800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1478400000 { opp-hz = /bits/ 64 <1478400000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1593600000 { opp-hz = /bits/ 64 <1593600000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; }; @@ -231,127 +231,127 @@ cluster1_opp: opp-table-cluster1 { /* Nominal fmax for now */ opp-307200000 { opp-hz = /bits/ 64 <307200000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-403200000 { opp-hz = /bits/ 64 <403200000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-480000000 { opp-hz = /bits/ 64 <480000000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-556800000 { opp-hz = /bits/ 64 <556800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-652800000 { opp-hz = /bits/ 64 <652800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-729600000 { opp-hz = /bits/ 64 <729600000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-806400000 { opp-hz = /bits/ 64 <806400000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-883200000 { opp-hz = /bits/ 64 <883200000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-940800000 { opp-hz = /bits/ 64 <940800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1036800000 { opp-hz = /bits/ 64 <1036800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1113600000 { opp-hz = /bits/ 64 <1113600000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1190400000 { opp-hz = /bits/ 64 <1190400000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1248000000 { opp-hz = /bits/ 64 <1248000000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1478400000 { opp-hz = /bits/ 64 <1478400000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1555200000 { opp-hz = /bits/ 64 <1555200000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1632000000 { opp-hz = /bits/ 64 <1632000000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1708800000 { opp-hz = /bits/ 64 <1708800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1785600000 { opp-hz = /bits/ 64 <1785600000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1824000000 { opp-hz = /bits/ 64 <1824000000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1920000000 { opp-hz = /bits/ 64 <1920000000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1996800000 { opp-hz = /bits/ 64 <1996800000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-2073600000 { opp-hz = /bits/ 64 <2073600000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-2150400000 { opp-hz = /bits/ 64 <2150400000>; - opp-supported-hw = <0x77>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; }; diff --git a/arch/arm64/boot/dts/qcom/msm8996pro.dtsi b/arch/arm64/boot/dts/qcom/msm8996pro.dtsi new file mode 100644 index 000000000000..63e1b4ec7a36 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8996pro.dtsi @@ -0,0 +1,266 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Linaro Limited + */ + +#include "msm8996.dtsi" + +/ { + /delete-node/ opp-table-cluster0; + /delete-node/ opp-table-cluster1; + + /* + * On MSM8996 Pro the cpufreq driver shifts speed bins into the high + * nibble of supported hw, so speed bin 0 becomes 0x10, speed bin 1 + * becomes 0x20, speed 2 becomes 0x40. + */ + + cluster0_opp: opp-table-cluster0 { + compatible = "operating-points-v2-kryo-cpu"; + nvmem-cells = <&speedbin_efuse>; + opp-shared; + + opp-307200000 { + opp-hz = /bits/ 64 <307200000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-460800000 { + opp-hz = /bits/ 64 <460800000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-537600000 { + opp-hz = /bits/ 64 <537600000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-614400000 { + opp-hz = /bits/ 64 <614400000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-691200000 { + opp-hz = /bits/ 64 <691200000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-768000000 { + opp-hz = /bits/ 64 <768000000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-844800000 { + opp-hz = /bits/ 64 <844800000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-902400000 { + opp-hz = /bits/ 64 <902400000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-979200000 { + opp-hz = /bits/ 64 <979200000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1132800000 { + opp-hz = /bits/ 64 <1132800000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1209600000 { + opp-hz = /bits/ 64 <1209600000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1286400000 { + opp-hz = /bits/ 64 <1286400000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1363200000 { + opp-hz = /bits/ 64 <1363200000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1440000000 { + opp-hz = /bits/ 64 <1440000000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1516800000 { + opp-hz = /bits/ 64 <1516800000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1593600000 { + opp-hz = /bits/ 64 <1593600000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1996800000 { + opp-hz = /bits/ 64 <1996800000>; + opp-supported-hw = <0x20>; + clock-latency-ns = <200000>; + }; + opp-2188800000 { + opp-hz = /bits/ 64 <2188800000>; + opp-supported-hw = <0x10>; + clock-latency-ns = <200000>; + }; + }; + + cluster1_opp: opp-table-cluster1 { + compatible = "operating-points-v2-kryo-cpu"; + nvmem-cells = <&speedbin_efuse>; + opp-shared; + + opp-307200000 { + opp-hz = /bits/ 64 <307200000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-460800000 { + opp-hz = /bits/ 64 <460800000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-537600000 { + opp-hz = /bits/ 64 <537600000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-614400000 { + opp-hz = /bits/ 64 <614400000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-691200000 { + opp-hz = /bits/ 64 <691200000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-748800000 { + opp-hz = /bits/ 64 <748800000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-825600000 { + opp-hz = /bits/ 64 <825600000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-902400000 { + opp-hz = /bits/ 64 <902400000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-979200000 { + opp-hz = /bits/ 64 <979200000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1132800000 { + opp-hz = /bits/ 64 <1132800000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1209600000 { + opp-hz = /bits/ 64 <1209600000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1286400000 { + opp-hz = /bits/ 64 <1286400000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1363200000 { + opp-hz = /bits/ 64 <1363200000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1440000000 { + opp-hz = /bits/ 64 <1440000000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1516800000 { + opp-hz = /bits/ 64 <1516800000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1593600000 { + opp-hz = /bits/ 64 <1593600000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1670400000 { + opp-hz = /bits/ 64 <1670400000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1747200000 { + opp-hz = /bits/ 64 <1747200000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1824000000 { + opp-hz = /bits/ 64 <1824000000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1900800000 { + opp-hz = /bits/ 64 <1900800000>; + opp-supported-hw = <0x70>; + clock-latency-ns = <200000>; + }; + opp-1977600000 { + opp-hz = /bits/ 64 <1977600000>; + opp-supported-hw = <0x30>; + clock-latency-ns = <200000>; + }; + opp-2054400000 { + opp-hz = /bits/ 64 <2054400000>; + opp-supported-hw = <0x30>; + clock-latency-ns = <200000>; + }; + opp-2150400000 { + opp-hz = /bits/ 64 <2150400000>; + opp-supported-hw = <0x30>; + clock-latency-ns = <200000>; + }; + opp-2246400000 { + opp-hz = /bits/ 64 <2246400000>; + opp-supported-hw = <0x10>; + clock-latency-ns = <200000>; + }; + opp-2342400000 { + opp-hz = /bits/ 64 <2342400000>; + opp-supported-hw = <0x10>; + clock-latency-ns = <200000>; + }; + }; +}; From patchwork Sun Jul 24 14:04:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 593316 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE3ACCCA491 for ; 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Sun, 24 Jul 2022 07:04:25 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Yassine Oudjana , Yassine Oudjana Subject: [PATCH 3/7] arm64: dts: qcom: msm8996-xiaomi-scorpio, natrium: Use MSM8996 Pro Date: Sun, 24 Jul 2022 17:04:17 +0300 Message-Id: <20220724140421.1933004-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> References: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Yassine Oudjana The Xiaomi Mi Note 2 has the MSM8996 Pro SoC. Rename the dts to match, include msm8996pro.dtsi, and add the qcom,msm8996pro compatible. To do that, the msm8996.dtsi include in msm8996-xiaomi-common has to be moved to msm8996-xiaomi-gemini, the only device that needs it included after this change. Since MSM8996Pro is largely compatible with MSM8996, keep old compatible too rather than insiting on qcom,msm8996pro only. This allows the code that doesn't yet know about msm8996pro to continue supporting these devices. Signed-off-by: Yassine Oudjana [DB: Applied the same change to Xiaomi Mi 5s Plus (natrium).] [DB: Dropped msm-id changes.] Signed-off-by: Dmitry Baryshkov Acked-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/Makefile | 4 ++-- arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi | 3 --- arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts | 1 + ...m8996-xiaomi-natrium.dts => msm8996pro-xiaomi-natrium.dts} | 3 ++- ...m8996-xiaomi-scorpio.dts => msm8996pro-xiaomi-scorpio.dts} | 3 ++- 5 files changed, 7 insertions(+), 7 deletions(-) rename arch/arm64/boot/dts/qcom/{msm8996-xiaomi-natrium.dts => msm8996pro-xiaomi-natrium.dts} (99%) rename arch/arm64/boot/dts/qcom/{msm8996-xiaomi-scorpio.dts => msm8996pro-xiaomi-scorpio.dts} (99%) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 1d86a33de528..78534c33a61e 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -34,8 +34,8 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8996-sony-xperia-tone-dora.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8996-sony-xperia-tone-kagura.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8996-sony-xperia-tone-keyaki.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8996-xiaomi-gemini.dtb -dtb-$(CONFIG_ARCH_QCOM) += msm8996-xiaomi-natrium.dtb -dtb-$(CONFIG_ARCH_QCOM) += msm8996-xiaomi-scorpio.dtb +dtb-$(CONFIG_ARCH_QCOM) += msm8996pro-xiaomi-natrium.dtb +dtb-$(CONFIG_ARCH_QCOM) += msm8996pro-xiaomi-scorpio.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-asus-novago-tp370ql.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-fxtec-pro1.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-hp-envy-x2.dtb diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi index 627649979891..90e40fd57f4c 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi @@ -3,9 +3,6 @@ * Copyright (c) 2020, Yassine Oudjana */ -/dts-v1/; - -#include "msm8996.dtsi" #include "pm8994.dtsi" #include "pmi8994.dtsi" #include diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts index 25f30ec277c1..cc76b2210466 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts +++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include "msm8996.dtsi" #include "msm8996-xiaomi-common.dtsi" #include #include diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-natrium.dts b/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts similarity index 99% rename from arch/arm64/boot/dts/qcom/msm8996-xiaomi-natrium.dts rename to arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts index ff4673ee9e81..368e9d837dfa 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-natrium.dts +++ b/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include "msm8996pro.dtsi" #include "msm8996-xiaomi-common.dtsi" #include "pmi8996.dtsi" #include @@ -12,7 +13,7 @@ / { model = "Xiaomi Mi 5s Plus"; - compatible = "xiaomi,natrium", "qcom,msm8996"; + compatible = "xiaomi,natrium", "qcom,msm8996pro", "qcom,msm8996"; chassis-type = "handset"; qcom,msm-id = <305 0x10000>; qcom,board-id = <47 0>; diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts b/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts similarity index 99% rename from arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts rename to arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts index 30a9e4bed4af..54a0854faf5b 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts +++ b/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include "msm8996pro.dtsi" #include "msm8996-xiaomi-common.dtsi" #include "pmi8996.dtsi" #include @@ -12,7 +13,7 @@ / { model = "Xiaomi Mi Note 2"; - compatible = "xiaomi,scorpio", "qcom,msm8996"; + compatible = "xiaomi,scorpio", "qcom,msm8996pro", "qcom,msm8996"; chassis-type = "handset"; qcom,msm-id = <305 0x10000>; qcom,board-id = <34 0>; From patchwork Sun Jul 24 14:04:18 2022 Content-Type: text/plain; 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Sun, 24 Jul 2022 07:04:26 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s13-20020a056512202d00b00489dedf1dcfsm2192622lfs.289.2022.07.24.07.04.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 24 Jul 2022 07:04:26 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Yassine Oudjana Subject: [PATCH 4/7] arm64: dts: qcom: msm8996: fix supported-hw in cpufreq OPP tables Date: Sun, 24 Jul 2022 17:04:18 +0300 Message-Id: <20220724140421.1933004-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> References: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Adjust MSM8996 cpufreq tables according to tables in msm-3.18. Some of the frequencies are not supported on speed bins other than 0. Also other speed bins support intermediate topmost frequencies, not supported on speed bin 0. Implement all these differencies. Fixes: 90173a954a22 ("arm64: dts: qcom: msm8996: Add CPU opps") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 38 ++++++++++++++++++++------- 1 file changed, 29 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 41c09895268e..24791ed436c5 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -203,22 +203,32 @@ opp-1228800000 { }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0x5>; + clock-latency-ns = <200000>; + }; + opp-1363200000 { + opp-hz = /bits/ 64 <1363200000>; + opp-supported-hw = <0x2>; clock-latency-ns = <200000>; }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0x5>; clock-latency-ns = <200000>; }; opp-1478400000 { opp-hz = /bits/ 64 <1478400000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0x1>; + clock-latency-ns = <200000>; + }; + opp-1497600000 { + opp-hz = /bits/ 64 <1497600000>; + opp-supported-hw = <0x04>; clock-latency-ns = <200000>; }; opp-1593600000 { opp-hz = /bits/ 64 <1593600000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0x1>; clock-latency-ns = <200000>; }; }; @@ -329,29 +339,39 @@ opp-1785600000 { opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; + opp-1804800000 { + opp-hz = /bits/ 64 <1804800000>; + opp-supported-hw = <0x6>; + clock-latency-ns = <200000>; + }; opp-1824000000 { opp-hz = /bits/ 64 <1824000000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0x1>; + clock-latency-ns = <200000>; + }; + opp-1900800000 { + opp-hz = /bits/ 64 <1900800000>; + opp-supported-hw = <0x4>; clock-latency-ns = <200000>; }; opp-1920000000 { opp-hz = /bits/ 64 <1920000000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0x1>; clock-latency-ns = <200000>; }; opp-1996800000 { opp-hz = /bits/ 64 <1996800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0x1>; clock-latency-ns = <200000>; }; opp-2073600000 { opp-hz = /bits/ 64 <2073600000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0x1>; clock-latency-ns = <200000>; }; opp-2150400000 { opp-hz = /bits/ 64 <2150400000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0x1>; clock-latency-ns = <200000>; }; }; From patchwork Sun Jul 24 14:04:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 593315 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29F5FCCA48F for ; Sun, 24 Jul 2022 14:04:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231493AbiGXOEe (ORCPT ); Sun, 24 Jul 2022 10:04:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231475AbiGXOEb (ORCPT ); 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Sun, 24 Jul 2022 07:04:27 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Yassine Oudjana Subject: [PATCH 5/7] arm64: dts: qcom: msm8996: add support for speed bin 3 Date: Sun, 24 Jul 2022 17:04:19 +0300 Message-Id: <20220724140421.1933004-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> References: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for msm8996, speed bin 3. It supports full range of frequencies on the power cluster, but is limited to 1.8 GHz on performance cluster. Signed-off-by: Dmitry Baryshkov Acked-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 74 +++++++++++++-------------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 24791ed436c5..3ce572f3765f 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -143,67 +143,67 @@ cluster0_opp: opp-table-cluster0 { /* Nominal fmax for now */ opp-307200000 { opp-hz = /bits/ 64 <307200000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-422400000 { opp-hz = /bits/ 64 <422400000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-480000000 { opp-hz = /bits/ 64 <480000000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-556800000 { opp-hz = /bits/ 64 <556800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-652800000 { opp-hz = /bits/ 64 <652800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-729600000 { opp-hz = /bits/ 64 <729600000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-844800000 { opp-hz = /bits/ 64 <844800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-960000000 { opp-hz = /bits/ 64 <960000000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1036800000 { opp-hz = /bits/ 64 <1036800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1113600000 { opp-hz = /bits/ 64 <1113600000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1190400000 { opp-hz = /bits/ 64 <1190400000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1228800000 { opp-hz = /bits/ 64 <1228800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; - opp-supported-hw = <0x5>; + opp-supported-hw = <0xd>; clock-latency-ns = <200000>; }; opp-1363200000 { @@ -213,12 +213,12 @@ opp-1363200000 { }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; - opp-supported-hw = <0x5>; + opp-supported-hw = <0xd>; clock-latency-ns = <200000>; }; opp-1478400000 { opp-hz = /bits/ 64 <1478400000>; - opp-supported-hw = <0x1>; + opp-supported-hw = <0x9>; clock-latency-ns = <200000>; }; opp-1497600000 { @@ -228,7 +228,7 @@ opp-1497600000 { }; opp-1593600000 { opp-hz = /bits/ 64 <1593600000>; - opp-supported-hw = <0x1>; + opp-supported-hw = <0x9>; clock-latency-ns = <200000>; }; }; @@ -241,107 +241,107 @@ cluster1_opp: opp-table-cluster1 { /* Nominal fmax for now */ opp-307200000 { opp-hz = /bits/ 64 <307200000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-403200000 { opp-hz = /bits/ 64 <403200000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-480000000 { opp-hz = /bits/ 64 <480000000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-556800000 { opp-hz = /bits/ 64 <556800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-652800000 { opp-hz = /bits/ 64 <652800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-729600000 { opp-hz = /bits/ 64 <729600000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-806400000 { opp-hz = /bits/ 64 <806400000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-883200000 { opp-hz = /bits/ 64 <883200000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-940800000 { opp-hz = /bits/ 64 <940800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1036800000 { opp-hz = /bits/ 64 <1036800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1113600000 { opp-hz = /bits/ 64 <1113600000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1190400000 { opp-hz = /bits/ 64 <1190400000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1248000000 { opp-hz = /bits/ 64 <1248000000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1478400000 { opp-hz = /bits/ 64 <1478400000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1555200000 { opp-hz = /bits/ 64 <1555200000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1632000000 { opp-hz = /bits/ 64 <1632000000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1708800000 { opp-hz = /bits/ 64 <1708800000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1785600000 { opp-hz = /bits/ 64 <1785600000>; - opp-supported-hw = <0x7>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1804800000 { opp-hz = /bits/ 64 <1804800000>; - opp-supported-hw = <0x6>; + opp-supported-hw = <0xe>; clock-latency-ns = <200000>; }; opp-1824000000 { From patchwork Sun Jul 24 14:04:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 593168 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F9F5C43334 for ; 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Sun, 24 Jul 2022 07:04:28 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Yassine Oudjana Subject: [PATCH 6/7] arm64: dts: qcom: msm8996: fix GPU OPP table Date: Sun, 24 Jul 2022 17:04:20 +0300 Message-Id: <20220724140421.1933004-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> References: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Fix Adreno OPP table according to the msm-3.18. Enable 624 MHz for the speed bin 3 and 560 MHz for bins 2 and 3. Fixes: 69cc3114ab0f ("arm64: dts: Add Adreno GPU definitions") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 3ce572f3765f..6dfd30a91af7 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1228,17 +1228,17 @@ gpu_opp_table: opp-table { compatible = "operating-points-v2"; /* - * 624Mhz and 560Mhz are only available on speed - * bin (1 << 0). All the rest are available on - * all bins of the hardware + * 624Mhz is only available on speed bins 0 and 3. + * 560Mhz is only available on speed bins 0, 2 and 3. + * All the rest are available on all bins of the hardware. */ opp-624000000 { opp-hz = /bits/ 64 <624000000>; - opp-supported-hw = <0x01>; + opp-supported-hw = <0x09>; }; opp-560000000 { opp-hz = /bits/ 64 <560000000>; - opp-supported-hw = <0x01>; + opp-supported-hw = <0x0d>; }; opp-510000000 { opp-hz = /bits/ 64 <510000000>; From patchwork Sun Jul 24 14:04:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 593167 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC567CCA48E for ; Sun, 24 Jul 2022 14:04:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231814AbiGXOEf (ORCPT ); Sun, 24 Jul 2022 10:04:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229839AbiGXOEc (ORCPT ); Sun, 24 Jul 2022 10:04:32 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D06312747 for ; Sun, 24 Jul 2022 07:04:31 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id o12so10338621ljc.3 for ; Sun, 24 Jul 2022 07:04:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TMAnf+EGgmUpjbvOUJCY6VfEl67ycFCn6aKjkzHtu64=; b=JbkVxxRv5J1hnELOOT67MG2BhN9fVtaCGLTmRqRmg6+bxj6quwhC/7iNK5eZuP6U2k l5t4bhLmGs/7/VsO1aUe5u4NJ+vcMfO4tz5r/eQEwqbzs6o6E2XeoxPBXfa4Vm1oBQlh YK+CXX2ry+EGg1YRNnN7NAlGz8Jn/g/pdC9ng1Oh2dB+RK77deXHfOjy6HZJN2GyYeRU x5of9YeJaUKRZSfm/MLcFP+RUKEjSAbuQMsgGPRUMKPq87AQ+8t/K1PK8o4lrziJ0LEo rRKpeIvsLZTguFUXVY5hqh3SNTkB+MtOjyF0u+7y6I86OQgo/valcG27Wuz4U3Xp1ATa 1KZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TMAnf+EGgmUpjbvOUJCY6VfEl67ycFCn6aKjkzHtu64=; b=XH/M5baPigsSIKlrljvKYwsXKwUx3lO1G8QPk/2tUb0rRrBrtpjlJcTRHAAK3tQPS8 aqhkKgR8MaAPoImmS8oCfH3mepC334wzApkWxqM6XlbCTSABR0mQPnWQ+d6xT7eA63FX 2Tb/88tLiZpazqeKzBWo1sUbRUp+3eBHDZInQhfctpZwq2nIdkoXQFkFlA4IdRHF/TjZ vFvDpxOcMA566PgfLK81i7yLItc4Mo/8FVn+7Vh2D51oM6qKhZQ8HrpG8omTZ4C0Hf0Z jCO+gSzm4Jy1q1VD8rXQYxSknYuuX8P9MqrgGSn2kSrO1Rq3TA78pWMzBIMf8W7gboPm xnwg== X-Gm-Message-State: AJIora+VCDU5WVznsq2HM/rOBoEmx0lst8FnqGj8ub2vFlkZyAlj6zGe X48BVsJjsOsRzfr1+MapT0BLbg== X-Google-Smtp-Source: AGRyM1t+84hjXgSu4poB9GAB58EJvbG7rZcyIreXIf3+bAoqBcTooIDVjgoOoYT4BaS8x8XvXBqVhw== X-Received: by 2002:a2e:3209:0:b0:25d:644e:b9d4 with SMTP id y9-20020a2e3209000000b0025d644eb9d4mr2606210ljy.13.1658671469540; Sun, 24 Jul 2022 07:04:29 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s13-20020a056512202d00b00489dedf1dcfsm2192622lfs.289.2022.07.24.07.04.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 24 Jul 2022 07:04:29 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Yassine Oudjana Subject: [PATCH 7/7] arm64: dts: qcom: msm8996pro: expand Adreno OPP table Date: Sun, 24 Jul 2022 17:04:21 +0300 Message-Id: <20220724140421.1933004-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> References: <20220724140421.1933004-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org There are minor differeces between msm8996 and msm8996pro in terms of GPU frequencies support. For example msm8996pro supports 652.8 MHz frequency for the Adreno. Reclect these differences in msm8996pro.dtsi. Signed-off-by: Dmitry Baryshkov Acked-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8996pro.dtsi | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996pro.dtsi b/arch/arm64/boot/dts/qcom/msm8996pro.dtsi index 63e1b4ec7a36..a679a9c0cf99 100644 --- a/arch/arm64/boot/dts/qcom/msm8996pro.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996pro.dtsi @@ -264,3 +264,28 @@ opp-2342400000 { }; }; }; + +&gpu_opp_table { + /* + * Unlike CPU opp tables, the GPU driver does not shift speed bins. + * + * 652.8 Mhz is available on speed bin 0 only. + * 624 Mhz and 560 Mhz are available on speed bins 0 and 1. + * All the rest are available on all bins of the hardware (like on + * plain 8996). + */ + + opp-652800000 { + opp-hz = /bits/ 64 <652800000>; + opp-supported-hw = <0x01>; + }; + opp-624000000 { + opp-hz = /bits/ 64 <624000000>; + opp-supported-hw = <0x03>; + }; + opp-560000000 { + opp-hz = /bits/ 64 <560000000>; + opp-supported-hw = <0x03>; + }; + /* The rest is inherited from msm8996 */ +};