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[2a01:cb04:613:1800:8440:8ac4:4a1f:a242]) by smtp.googlemail.com with ESMTPSA id z17-20020a05600c0a1100b003a31d200a7dsm3400093wmp.9.2022.07.20.11.19.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jul 2022 11:19:34 -0700 (PDT) From: Amjad Ouled-Ameur To: matthias.bgg@gmail.com Cc: rafael@kernel.org, fparent@baylibre.com, amitk@kernel.org, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, robh+dt@kernel.org, rui.zhang@intel.com, Amjad Ouled-Ameur Subject: [PATCH v2 1/4] dt-bindings: thermal: mediatek: add binding documentation for MT8365 SoC Date: Wed, 20 Jul 2022 20:18:51 +0200 Message-Id: <20220720181854.547881-2-aouledameur@baylibre.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220720181854.547881-1-aouledameur@baylibre.com> References: <20220720181854.547881-1-aouledameur@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Fabien Parent Add the binding documentation for the thermal support on MT8365 SoC. Signed-off-by: Fabien Parent Acked-by: Amjad Ouled-Ameur --- Documentation/devicetree/bindings/thermal/mediatek-thermal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt index 5c7e7bdd029a..ba4ebffeade4 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt @@ -14,6 +14,7 @@ Required properties: - "mediatek,mt2712-thermal" : For MT2712 family of SoCs - "mediatek,mt7622-thermal" : For MT7622 SoC - "mediatek,mt8183-thermal" : For MT8183 family of SoCs + - "mediatek,mt8365-thermal" : For MT8365 family of SoCs - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 family of SoCs - reg: Address range of the thermal controller - interrupts: IRQ for the thermal controller From patchwork Wed Jul 20 18:18:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 592065 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 556A8CCA487 for ; Wed, 20 Jul 2022 18:19:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231289AbiGTSTm (ORCPT ); Wed, 20 Jul 2022 14:19:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231221AbiGTSTk (ORCPT ); Wed, 20 Jul 2022 14:19:40 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 928096F7D4 for ; Wed, 20 Jul 2022 11:19:38 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id b26so27295132wrc.2 for ; Wed, 20 Jul 2022 11:19:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=M1i/0wxRYmvrq6IC7mxhkb2dRV6n4m0qx9SiTZ66LUU=; b=wvCG72+dVbH7vC+FUiUiUlZLxbALX+w2Lr0IOikvpCsLmFn/hOeBIaU1YlrucX7yL0 eERwlr2Ukp2ApNoHVB1QEbN8/S97JCgyHnd1G5ui1uHtcXt4utmSF8MqT9F6XOqlkOau BVOSKeeOoac70OVEa5AzbQQTN3HkwsEfSn9yUksbY25M800xZcNukN9m6l5Bgg5t3hKI gA5GkJVNEw6ZgAi8e7HqFyotAqPQ8nqnjukf+O3sZJH9sY/uP2491T06zRvdODu1SYyW BiWDw1S84c++vZO2E/yFCJwhoM5h8V0HJq203Dvbdpvvamr1dtjJGUwDtkjs61gAA9sP 17/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=M1i/0wxRYmvrq6IC7mxhkb2dRV6n4m0qx9SiTZ66LUU=; b=UPmArKuQzQA6/hPs0qcxgpCkmSrODYrF/Oj8lBQK69+dTF7JVp/pgVupU4XBwo5mYN ob67C50AzEvU/fih+qLbZFGIbXKn8dV5GWQjLCNGvRFafpQYPLDRuuy3dnbTgGgIMf5l /UUyp1GHzZcgRyuW6FaSQA8uoaFoZUKRi66DnR8HMLaoOWgGIc0Eqv9miZQpGca77Hd7 alMwvyEb6X4LLn6lQAlFkhss3VKADm6Z3MCXJK6VshVemdFSl4CT6Dx+hL+psLLRiFqn Q7wvSfmv3eJa3xEhUWAMHiZFq1pkEXnRfBIsWxqytkFXUu1CescHuij2q9GPIhVPwTfo uzvA== X-Gm-Message-State: AJIora+TFQ3txm/Zm/LkfVBfVeUoHciAuZgCvfnpsfKifUzGVLMBJZIZ DSvh+9tx6wLjXtssfXEoCeKSlg== X-Google-Smtp-Source: AGRyM1tJ4ApcHLOkGHWBDanLWrqSKlCjxj6zPXkPYwhUuUsm0V8vXlTq1CWrLAzMq0bV+3Xvi5jBXw== X-Received: by 2002:a05:6000:1545:b0:21d:8f3e:a0bd with SMTP id 5-20020a056000154500b0021d8f3ea0bdmr32428629wry.697.1658341176950; Wed, 20 Jul 2022 11:19:36 -0700 (PDT) Received: from amjad-ThinkPad-T490.home (2a01cb040613180084408ac44a1fa242.ipv6.abo.wanadoo.fr. [2a01:cb04:613:1800:8440:8ac4:4a1f:a242]) by smtp.googlemail.com with ESMTPSA id z17-20020a05600c0a1100b003a31d200a7dsm3400093wmp.9.2022.07.20.11.19.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jul 2022 11:19:35 -0700 (PDT) From: Amjad Ouled-Ameur To: matthias.bgg@gmail.com Cc: rafael@kernel.org, fparent@baylibre.com, amitk@kernel.org, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, robh+dt@kernel.org, rui.zhang@intel.com, Amjad Ouled-Ameur Subject: [PATCH v2 2/4] thermal: mediatek: add support for MT8365 SoC Date: Wed, 20 Jul 2022 20:18:52 +0200 Message-Id: <20220720181854.547881-3-aouledameur@baylibre.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220720181854.547881-1-aouledameur@baylibre.com> References: <20220720181854.547881-1-aouledameur@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Fabien Parent MT8365 is similar to the other SoCs supported by the driver. It has only one bank and 3 actual sensors that can be multiplexed. There is another one sensor that does not have usable data. Signed-off-by: Fabien Parent Reviewed-by: Amjad Ouled-Ameur Tested-by: Amjad Ouled-Ameur --- drivers/thermal/mtk_thermal.c | 68 +++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index ede94eadddda..216eb0d61c5b 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -31,6 +31,7 @@ #define AUXADC_CON2_V 0x010 #define AUXADC_DATA(channel) (0x14 + (channel) * 4) +#define APMIXED_SYS_TS_CON0 0x600 #define APMIXED_SYS_TS_CON1 0x604 /* Thermal Controller Registers */ @@ -245,6 +246,17 @@ enum mtk_thermal_version { /* The calibration coefficient of sensor */ #define MT8183_CALIBRATION 153 +/* MT8365 */ +#define MT8365_TEMP_AUXADC_CHANNEL 11 +#define MT8365_CALIBRATION 164 +#define MT8365_NUM_CONTROLLER 1 +#define MT8365_NUM_BANKS 1 +#define MT8365_NUM_SENSORS 3 +#define MT8365_NUM_SENSORS_PER_ZONE 3 +#define MT8365_TS1 0 +#define MT8365_TS2 1 +#define MT8365_TS3 2 + struct mtk_thermal; struct thermal_bank_cfg { @@ -386,6 +398,24 @@ static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, }; static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 }; static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, }; +/* MT8365 thermal sensor data */ +static const int mt8365_bank_data[MT8365_NUM_SENSORS] = { + MT8365_TS1, MT8365_TS2, MT8365_TS3 +}; + +static const int mt8365_msr[MT8365_NUM_SENSORS_PER_ZONE] = { + TEMP_MSR0, TEMP_MSR1, TEMP_MSR2 +}; + +static const int mt8365_adcpnp[MT8365_NUM_SENSORS_PER_ZONE] = { + TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2 +}; + +static const int mt8365_mux_values[MT8365_NUM_SENSORS] = { 0, 1, 2 }; +static const int mt8365_tc_offset[MT8365_NUM_CONTROLLER] = { 0 }; + +static const int mt8365_vts_index[MT8365_NUM_SENSORS] = { VTS1, VTS2, VTS3 }; + /* * The MT8173 thermal controller has four banks. Each bank can read up to * four temperature sensors simultaneously. The MT8173 has a total of 5 @@ -460,6 +490,40 @@ static const struct mtk_thermal_data mt2701_thermal_data = { .version = MTK_THERMAL_V1, }; +/* + * The MT8365 thermal controller has one bank, which can read up to + * four temperature sensors simultaneously. The MT8365 has a total of 3 + * temperature sensors. + * + * The thermal core only gets the maximum temperature of this one bank, + * so the bank concept wouldn't be necessary here. However, the SVS (Smart + * Voltage Scaling) unit makes its decisions based on the same bank + * data. + */ +static const struct mtk_thermal_data mt8365_thermal_data = { + .auxadc_channel = MT8365_TEMP_AUXADC_CHANNEL, + .num_banks = MT8365_NUM_BANKS, + .num_sensors = MT8365_NUM_SENSORS, + .vts_index = mt8365_vts_index, + .cali_val = MT8365_CALIBRATION, + .num_controller = MT8365_NUM_CONTROLLER, + .controller_offset = mt8365_tc_offset, + .need_switch_bank = false, + .bank_data = { + { + .num_sensors = MT8365_NUM_SENSORS, + .sensors = mt8365_bank_data + }, + }, + .msr = mt8365_msr, + .adcpnp = mt8365_adcpnp, + .sensor_mux_values = mt8365_mux_values, + .version = MTK_THERMAL_V1, + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON0, + .apmixed_buffer_ctl_mask = (u32) ~GENMASK(29, 28), + .apmixed_buffer_ctl_set = 0, +}; + /* * The MT2712 thermal controller has one bank, which can read up to * four temperature sensors simultaneously. The MT2712 has a total of 4 @@ -958,6 +1022,10 @@ static const struct of_device_id mtk_thermal_of_match[] = { { .compatible = "mediatek,mt8183-thermal", .data = (void *)&mt8183_thermal_data, + }, + { + .compatible = "mediatek,mt8365-thermal", + .data = (void *)&mt8365_thermal_data, }, { }, }; From patchwork Wed Jul 20 18:18:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 592747 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7ED0C43334 for ; Wed, 20 Jul 2022 18:19:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238559AbiGTSTp (ORCPT ); Wed, 20 Jul 2022 14:19:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229971AbiGTSTl (ORCPT ); Wed, 20 Jul 2022 14:19:41 -0400 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 516C86FA16 for ; Wed, 20 Jul 2022 11:19:39 -0700 (PDT) Received: by mail-wr1-x435.google.com with SMTP id e15so22041401wro.5 for ; Wed, 20 Jul 2022 11:19:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=u7ClOaY29q/UhKGleJgriKV9seCgrAHzD4o55sbVqbE=; b=U25zxMuTlfG9FKoGJ8D0VJx2M73CYydlvOMHsJis/rV0YVmrC6mR0xG6wVsf0jVtsh LGYhX+2OZHZGLcWAYcBwN/kxj5pEKVfWT5CI5VYGAljVYrY+Tc6MtBikiOmQJ2WG1ElO ORuSxTh7fBcVgNVov8LDetdZJ0eiSyVtZZy/l1UjoMgZsBV8SEaNK5YFxMt6TSF63ODI ZSH8Q+t/5HwvjV+sbwr7RV8a1wYelm/dKcbV6mwjwG45OHZsG1YqVIniZL7nYRd1elvv rEW6Wxoz3UwFc07F5QgYKPyJCr2UYU/mr7bNC/sdKOddwNjIN8nGLWnMAxzpqeAOqmvF 6cAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=u7ClOaY29q/UhKGleJgriKV9seCgrAHzD4o55sbVqbE=; b=AO/Px85j5buUHMmBPzSw6Krt0FcL7v5FdpP9UiAXGwIgs1X2pB5srDPHtetbw3OU9G pATJY0u6FnCVBgZ2YEtPNRejOjY5LiO2tLshGwEvXwtK0FsUFfHtP1E9V03i9G2DGJMG 7GzTOB6x6z0xPNFX5BFJGr1XXqRoGYAeqi6DgLlU8/Z54DysyUn+AeNkniMKHB/BNDaj 6C9c9uMqNlNmqNdU/GRfQ0FkywzI1B7/LS4aOaZyEdzzw2mxTRonY6nz8LeQXYAbXfsh HRzEZzVf04DzxVJob9wHLGvK1UhtzyhrNqham5UovEskDxbEvicwAbgZNIwaJQWZBcYj p9Qg== X-Gm-Message-State: AJIora/NPCDQ11DJaB2FFZNnWMSbod0TFAFR56vlD+NpobX+b3kV0qf2 QygQxT1gCXpP+iwX2BBWdp/pag== X-Google-Smtp-Source: AGRyM1vfj2pobuNQH2wthtGApjgEuP8BunLn/EqZqFLAOjATur0M5PpTlWR4RkCynwXU5aGpbpkUkw== X-Received: by 2002:adf:ee4b:0:b0:21e:4ecf:b150 with SMTP id w11-20020adfee4b000000b0021e4ecfb150mr2128791wro.290.1658341177830; Wed, 20 Jul 2022 11:19:37 -0700 (PDT) Received: from amjad-ThinkPad-T490.home (2a01cb040613180084408ac44a1fa242.ipv6.abo.wanadoo.fr. [2a01:cb04:613:1800:8440:8ac4:4a1f:a242]) by smtp.googlemail.com with ESMTPSA id z17-20020a05600c0a1100b003a31d200a7dsm3400093wmp.9.2022.07.20.11.19.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jul 2022 11:19:37 -0700 (PDT) From: Amjad Ouled-Ameur To: matthias.bgg@gmail.com Cc: rafael@kernel.org, fparent@baylibre.com, amitk@kernel.org, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, robh+dt@kernel.org, rui.zhang@intel.com, Markus Schneider-Pargmann , Amjad Ouled-Ameur Subject: [PATCH v2 3/4] thermal: mediatek: control buffer enablement tweaks Date: Wed, 20 Jul 2022 20:18:53 +0200 Message-Id: <20220720181854.547881-4-aouledameur@baylibre.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220720181854.547881-1-aouledameur@baylibre.com> References: <20220720181854.547881-1-aouledameur@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Markus Schneider-Pargmann Add logic in order to be able to turn on the control buffer on MT8365. This change now allows to have control buffer support for MTK_THERMAL_V1, and it allows to define the register offset, and mask used to enable it. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Fabien Parent Reviewed-by: Amjad Ouled-Ameur Tested-by: Amjad Ouled-Ameur --- drivers/thermal/mtk_thermal.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 216eb0d61c5b..1dc276f8c4f1 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -283,6 +283,9 @@ struct mtk_thermal_data { bool need_switch_bank; struct thermal_bank_cfg bank_data[MAX_NUM_ZONES]; enum mtk_thermal_version version; + u32 apmixed_buffer_ctl_reg; + u32 apmixed_buffer_ctl_mask; + u32 apmixed_buffer_ctl_set; }; struct mtk_thermal { @@ -578,6 +581,9 @@ static const struct mtk_thermal_data mt7622_thermal_data = { .adcpnp = mt7622_adcpnp, .sensor_mux_values = mt7622_mux_values, .version = MTK_THERMAL_V2, + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON1, + .apmixed_buffer_ctl_mask = ~0x37, + .apmixed_buffer_ctl_set = 0x1, }; /* @@ -1031,14 +1037,18 @@ static const struct of_device_id mtk_thermal_of_match[] = { }; MODULE_DEVICE_TABLE(of, mtk_thermal_of_match); -static void mtk_thermal_turn_on_buffer(void __iomem *apmixed_base) +static void mtk_thermal_turn_on_buffer(struct mtk_thermal *mt, + void __iomem *apmixed_base) { int tmp; - tmp = readl(apmixed_base + APMIXED_SYS_TS_CON1); - tmp &= ~(0x37); - tmp |= 0x1; - writel(tmp, apmixed_base + APMIXED_SYS_TS_CON1); + if (!mt->conf->apmixed_buffer_ctl_reg) + return; + + tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg); + tmp &= mt->conf->apmixed_buffer_ctl_mask; + tmp |= mt->conf->apmixed_buffer_ctl_set; + writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg); udelay(200); } @@ -1138,8 +1148,9 @@ static int mtk_thermal_probe(struct platform_device *pdev) goto err_disable_clk_auxadc; } + mtk_thermal_turn_on_buffer(mt, apmixed_base); + if (mt->conf->version == MTK_THERMAL_V2) { - mtk_thermal_turn_on_buffer(apmixed_base); mtk_thermal_release_periodic_ts(mt, auxadc_base); } From patchwork Wed Jul 20 18:18:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 592064 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 388AACCA485 for ; Wed, 20 Jul 2022 18:19:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236955AbiGTSTo (ORCPT ); Wed, 20 Jul 2022 14:19:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231221AbiGTSTn (ORCPT ); Wed, 20 Jul 2022 14:19:43 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DCE466FA31 for ; Wed, 20 Jul 2022 11:19:40 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id c187-20020a1c35c4000000b003a30d88fe8eso1887711wma.2 for ; Wed, 20 Jul 2022 11:19:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/6t1tJznirgBuuhOslr+HrbK0FgxfxpNokiZkLl87qc=; b=jIbnUzr1HAn9joeLX2mrLV6691ELQKqEy3owuhkejKOCKt1cASKXXjB9wMEUyO/jrT s5tUtyzbn1t8G+kZJlIz/Cm67eUcjlh2SfDztzDnH4anMCmyswzuGwbtcoS4ncqRGF2p VoIe1ei2yB23cyB0YfUNuRmPsckQTAWU3G9X8cE3hJmIKjd1U5KyJWwdCwLwdsqizYma sr3KF6IDMPBE6gDy6iX8BTEcU6tJgdBJ+goHrNSSkiuIsJZ+cC0W7d/DwtWQsu/ud2et wOuoUgoaFTHv+6xS/TSJEfF4GvTFskkxX3jdr+EZ7ilhR0NVjqIRQO7vJ7CvmBaDRXeb RxNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/6t1tJznirgBuuhOslr+HrbK0FgxfxpNokiZkLl87qc=; b=LvJh3SFX8cYHwGUdqHyziQfSKriNkzJCXCAwsRFLtK2Vxc84e2lf+2I0n1NDhOkSh0 nTip37GutiY3XBSUCeuIMLid4NcP0usSCIVRHGAb6eDm3m6Eth1omWCYYtkYYPMm+P8f vIaTmRvLaNd+h4qldXylVdNKG1yeN4RbY2OnjMVtkfKBFvxKRR8uWZDFZms7LXIWvBtE FaYeDBb9jzbTYNtfOP6fszHUNXQ0TBf3CeC/ERzRG0TSGHNudALE9KyHXvuT57nSmMrG CCAjr4cFrsGgKyQ53eJPnRxi3viTN0W1Bi8XcpfHp945EFEeGDJGL7p2ay1kHL5gHstM yLMA== X-Gm-Message-State: AJIora/rpThxKyBO17tjM7ATYfCPWCkq1ke23n0z59SO9z/hUYsIFy1i sWES3corTwNZycfSmU2J0QAb0A== X-Google-Smtp-Source: AGRyM1uGKhBM5kBeoQFZ7rJFvEZczSvd1eckDYJ1dkCuDSNjsIsqpCTaawcB/4Ev9F6PK/fbasFdmQ== X-Received: by 2002:a05:600c:1d8a:b0:3a3:1104:88ad with SMTP id p10-20020a05600c1d8a00b003a3110488admr4894543wms.179.1658341179153; Wed, 20 Jul 2022 11:19:39 -0700 (PDT) Received: from amjad-ThinkPad-T490.home (2a01cb040613180084408ac44a1fa242.ipv6.abo.wanadoo.fr. [2a01:cb04:613:1800:8440:8ac4:4a1f:a242]) by smtp.googlemail.com with ESMTPSA id z17-20020a05600c0a1100b003a31d200a7dsm3400093wmp.9.2022.07.20.11.19.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jul 2022 11:19:38 -0700 (PDT) From: Amjad Ouled-Ameur To: matthias.bgg@gmail.com Cc: rafael@kernel.org, fparent@baylibre.com, amitk@kernel.org, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, robh+dt@kernel.org, rui.zhang@intel.com, Amjad Ouled-Ameur , default avatarMichael Kao , default avatarHsin-Yi Wang Subject: [PATCH v2 4/4] thermal: mediatek: add another get_temp ops for thermal sensors Date: Wed, 20 Jul 2022 20:18:54 +0200 Message-Id: <20220720181854.547881-5-aouledameur@baylibre.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220720181854.547881-1-aouledameur@baylibre.com> References: <20220720181854.547881-1-aouledameur@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Provide thermal zone to read thermal sensor in the SoC. We can read all the thermal sensors value in the SoC by the node /sys/class/thermal/ In mtk_thermal_bank_temperature, return -EAGAIN instead of -EACCESS on the first read of sensor that often are bogus values. This can avoid following warning on boot: thermal thermal_zone6: failed to read out thermal zone (-13) Signed-off-by: default avatarMichael Kao Signed-off-by: default avatarHsin-Yi Wang Signed-off-by: Amjad Ouled-Ameur Tested-by: Amjad Ouled-Ameur --- drivers/thermal/mtk_thermal.c | 100 ++++++++++++++++++++++++++-------- 1 file changed, 76 insertions(+), 24 deletions(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 1dc276f8c4f1..79b14ce1a08d 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -259,6 +259,11 @@ enum mtk_thermal_version { struct mtk_thermal; +struct mtk_thermal_zone { + struct mtk_thermal *mt; + int id; +}; + struct thermal_bank_cfg { unsigned int num_sensors; const int *sensors; @@ -709,6 +714,32 @@ static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank) mutex_unlock(&mt->lock); } +static u32 _get_sensor_temp(struct mtk_thermal *mt, int id) +{ + u32 raw; + int temp; + + const struct mtk_thermal_data *conf = mt->conf; + + raw = readl(mt->thermal_base + conf->msr[id]); + + if (mt->conf->version == MTK_THERMAL_V1) + temp = raw_to_mcelsius_v1(mt, id, raw); + else + temp = raw_to_mcelsius_v2(mt, id, raw); + + /* + * The first read of a sensor often contains very high bogus + * temperature value. Filter these out so that the system does + * not immediately shut down. + */ + + if (temp > 200000) + return -EAGAIN; + else + return temp; +} + /** * mtk_thermal_bank_temperature - get the temperature of a bank * @bank: The bank @@ -721,26 +752,9 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) struct mtk_thermal *mt = bank->mt; const struct mtk_thermal_data *conf = mt->conf; int i, temp = INT_MIN, max = INT_MIN; - u32 raw; for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) { - raw = readl(mt->thermal_base + conf->msr[i]); - - if (mt->conf->version == MTK_THERMAL_V1) { - temp = raw_to_mcelsius_v1( - mt, conf->bank_data[bank->id].sensors[i], raw); - } else { - temp = raw_to_mcelsius_v2( - mt, conf->bank_data[bank->id].sensors[i], raw); - } - - /* - * The first read of a sensor often contains very high bogus - * temperature value. Filter these out so that the system does - * not immediately shut down. - */ - if (temp > 200000) - temp = 0; + temp = _get_sensor_temp(mt, i); if (temp > max) max = temp; @@ -751,7 +765,8 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) static int mtk_read_temp(void *data, int *temperature) { - struct mtk_thermal *mt = data; + struct mtk_thermal_zone *tz = data; + struct mtk_thermal *mt = tz->mt; int i; int tempmax = INT_MIN; @@ -770,10 +785,28 @@ static int mtk_read_temp(void *data, int *temperature) return 0; } +static int mtk_read_sensor_temp(void *data, int *temperature) +{ + struct mtk_thermal_zone *tz = data; + struct mtk_thermal *mt = tz->mt; + int id = tz->id - 1; + + if (id < 0) + return -EACCES; + + *temperature = _get_sensor_temp(mt, id); + + return 0; +} + static const struct thermal_zone_of_device_ops mtk_thermal_ops = { .get_temp = mtk_read_temp, }; +static const struct thermal_zone_of_device_ops mtk_thermal_sensor_ops = { + .get_temp = mtk_read_sensor_temp, +}; + static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num, u32 apmixed_phys_base, u32 auxadc_phys_base, int ctrl_id) @@ -1072,6 +1105,7 @@ static int mtk_thermal_probe(struct platform_device *pdev) u64 auxadc_phys_base, apmixed_phys_base; struct thermal_zone_device *tzdev; void __iomem *apmixed_base, *auxadc_base; + struct mtk_thermal_zone *tz; mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL); if (!mt) @@ -1161,11 +1195,29 @@ static int mtk_thermal_probe(struct platform_device *pdev) platform_set_drvdata(pdev, mt); - tzdev = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, mt, - &mtk_thermal_ops); - if (IS_ERR(tzdev)) { - ret = PTR_ERR(tzdev); - goto err_disable_clk_peri_therm; + for (i = 0; i < mt->conf->num_sensors + 1; i++) { + tz = kmalloc(sizeof(*tz), GFP_KERNEL); + if (!tz) + return -ENOMEM; + + tz->mt = mt; + tz->id = i; + + tzdev = devm_thermal_zone_of_sensor_register(&pdev->dev, i, tz, (i == 0) ? + &mtk_thermal_ops : + &mtk_thermal_sensor_ops); + + if (IS_ERR(tzdev)) { + if (PTR_ERR(tzdev) == -ENODEV) { + dev_warn(&pdev->dev, + "sensor %d not registered in thermal zone in dt\n", i); + continue; + } + if (PTR_ERR(tzdev) == -EACCES) { + ret = PTR_ERR(tzdev); + goto err_disable_clk_peri_therm; + } + } } ret = devm_thermal_add_hwmon_sysfs(tzdev);