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resets = <&bpmp TEGRA234_RESET_I2C1>; reset-names = "i2c"; + dmas = <&gpcdma 21>, <&gpcdma 21>; + dma-names = "rx", "tx"; + iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>; + dma-coherent; }; cam_i2c: i2c@3180000 { @@ -683,6 +687,10 @@ clock-names = "div-clk", "parent"; resets = <&bpmp TEGRA234_RESET_I2C3>; reset-names = "i2c"; + dmas = <&gpcdma 23>, <&gpcdma 23>; + dma-names = "rx", "tx"; + iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>; + dma-coherent; }; dp_aux_ch1_i2c: i2c@3190000 { @@ -698,6 +706,10 @@ clock-names = "div-clk", "parent"; resets = <&bpmp TEGRA234_RESET_I2C4>; reset-names = "i2c"; + dmas = <&gpcdma 26>, <&gpcdma 26>; + dma-names = "rx", "tx"; + iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>; + dma-coherent; }; dp_aux_ch0_i2c: i2c@31b0000 { @@ -713,6 +725,10 @@ clock-names = "div-clk", "parent"; resets = <&bpmp TEGRA234_RESET_I2C6>; reset-names = "i2c"; + dmas = <&gpcdma 30>, <&gpcdma 30>; + dma-names = "rx", "tx"; + iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>; + dma-coherent; }; dp_aux_ch2_i2c: i2c@31c0000 { @@ -728,6 +744,10 @@ clock-names = "div-clk", "parent"; resets = <&bpmp TEGRA234_RESET_I2C7>; reset-names = "i2c"; + dmas = <&gpcdma 27>, <&gpcdma 27>; + dma-names = "rx", "tx"; + iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>; + dma-coherent; }; dp_aux_ch3_i2c: i2c@31e0000 { @@ -743,6 +763,10 @@ clock-names = "div-clk", "parent"; resets = <&bpmp TEGRA234_RESET_I2C9>; reset-names = "i2c"; + dmas = <&gpcdma 31>, <&gpcdma 31>; + dma-names = "rx", "tx"; + iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>; + dma-coherent; }; spi@3270000 { @@ -1026,6 +1050,10 @@ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>; resets = <&bpmp TEGRA234_RESET_I2C2>; reset-names = "i2c"; + dmas = <&gpcdma 22>, <&gpcdma 22>; + dma-names = "rx", "tx"; + iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>; + dma-coherent; }; gen8_i2c: i2c@c250000 { @@ -1042,6 +1070,10 @@ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>; resets = <&bpmp TEGRA234_RESET_I2C8>; reset-names = "i2c"; + dmas = <&gpcdma 0>, <&gpcdma 0>; + dma-names = "rx", "tx"; + iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>; + dma-coherent; }; rtc@c2a0000 {