From patchwork Mon Jul 11 08:45:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 589745 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A68CC43334 for ; Mon, 11 Jul 2022 11:13:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230089AbiGKLN5 (ORCPT ); Mon, 11 Jul 2022 07:13:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230198AbiGKLNc (ORCPT ); Mon, 11 Jul 2022 07:13:32 -0400 Received: from laurent.telenet-ops.be (laurent.telenet-ops.be [IPv6:2a02:1800:110:4::f00:19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0EDF21900E for ; Mon, 11 Jul 2022 03:28:03 -0700 (PDT) Received: from ramsan.of.borg ([84.195.186.194]) by laurent.telenet-ops.be with bizsmtp id tmU22700F4C55Sk01mU22y; Mon, 11 Jul 2022 12:28:02 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1oAqCw-0032if-Gc; Mon, 11 Jul 2022 12:00:02 +0200 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1oAp37-004dvg-Q0; Mon, 11 Jul 2022 10:45:49 +0200 From: Geert Uytterhoeven To: Mark Brown , Conor Dooley , Daire McNamara Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH] spi: SPI_MICROCHIP_CORE should depend on SOC_MICROCHIP_POLARFIRE Date: Mon, 11 Jul 2022 10:45:49 +0200 Message-Id: <4e78693a87d6b83847056d22468c370e7232f390.1657529125.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The Microchip "hard" FPGA SPI controller is only present on Microchip PolarFire SoCs. Hence add a dependency on SOC_MICROCHIP_POLARFIRE, to prevent asking the user about this driver when configuring a kernel without Microchip PolarFire SoC support. Fixes: 9ac8d17694b66d54 ("spi: add support for microchip fpga spi controllers") Signed-off-by: Geert Uytterhoeven Reviewed-by: Conor Dooley --- drivers/spi/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index e03cd16f4469079e..b1cb7fe129ff86da 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -585,6 +585,7 @@ config SPI_MESON_SPIFC config SPI_MICROCHIP_CORE tristate "Microchip FPGA SPI controllers" depends on SPI_MASTER + depends on SOC_MICROCHIP_POLARFIRE || COMPILE_TEST help This enables the SPI driver for Microchip FPGA SPI controllers. Say Y or M here if you want to use the "hard" controllers on