From patchwork Fri Jul 8 18:25:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 588654 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB017C433EF for ; Fri, 8 Jul 2022 18:25:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239553AbiGHSZe (ORCPT ); Fri, 8 Jul 2022 14:25:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239480AbiGHSZX (ORCPT ); Fri, 8 Jul 2022 14:25:23 -0400 Received: from mail-pg1-x532.google.com (mail-pg1-x532.google.com [IPv6:2607:f8b0:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75889814A2 for ; Fri, 8 Jul 2022 11:25:22 -0700 (PDT) Received: by mail-pg1-x532.google.com with SMTP id g4so23026825pgc.1 for ; Fri, 08 Jul 2022 11:25:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:mime-version; bh=1OBRJCwb52q2s5TPamdyLJI7pgKmuijVWJ0sif6hpnU=; b=DBIQB6GMzWM50WaHcW8ksoBoZtFHfXJEpeIWswWSIBhzLJRdWCqUmq7tmOt8gTooVL hoAVnFApIzhnkroDYxG1nrFfEs8LEKXZUqFYwPLDVO3xW+xV8SpWLu1mDlPbW0MSQgXc ktyyLy1DNX+brehCBrzqEfLLVArNUp+amusMs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version; bh=1OBRJCwb52q2s5TPamdyLJI7pgKmuijVWJ0sif6hpnU=; b=MnuHaVYNrjhExvC7/dABPQeKbq+Vwog5aWXdWhKebTP3bqL2cTzLIpDsSlRhUOpRNH 6sNUDjBYs44sND7uDUTuRxDM8esqf1HvSUoZXhxUq48bQ/BGieZHJDs/5FebOzbV+5FH EScub9Lgon1coy5cvemyzDKxLEtQCnksQOY/p0Yp5rL4U4WDtUdA0R+jIE81ltxkr1Vv wVTQBpqL1HEqcgK7RAFNG8Ks9nJefEll8tSF9+tigK0+8Zp7YP1+muDs0qZWYGydVHNk zLyKyDMnDWurCz3tum4XtjnaJOeZHCwD/+O5/DxPMoayEvZJrnkFh2VRERvVK6R3QCNK U8+A== X-Gm-Message-State: AJIora/AKJGS0i0OSUDH0780YG49pjVNJEThV31UIlFjK7qq0OfNw6nG 9lxHw+VhQQlgbM0giZdQiJNBQk3/nnei9A== X-Google-Smtp-Source: AGRyM1sLxZ42xZ3TfMroYrzw3b5AW5c9DwlmdNp8WOg7wi4YbCOROcl4SPN0iGb29VPNph39wDfGuA== X-Received: by 2002:a63:6888:0:b0:3fe:49fc:3be3 with SMTP id d130-20020a636888000000b003fe49fc3be3mr4197674pgc.182.1657304721762; Fri, 08 Jul 2022 11:25:21 -0700 (PDT) Received: from ubuntu-22.localdomain ([192.19.222.250]) by smtp.gmail.com with ESMTPSA id 17-20020a17090a1a1100b001ef8de342b8sm1992855pjk.15.2022.07.08.11.25.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 11:25:20 -0700 (PDT) From: William Zhang To: Linux ARM List Cc: Broadcom Kernel List , William Zhang , Florian Fainelli , Krzysztof Kozlowski , =?utf-8?b?UmFmYcWC?= =?utf-8?b?IE1pxYJlY2tp?= , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] arm64: dts: broadcom: bcm4908: Fix timer node for BCM4906 SoC Date: Fri, 8 Jul 2022 11:25:06 -0700 Message-Id: <20220708182507.23542-1-william.zhang@broadcom.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The cpu mask value in interrupt property inherits from bcm4908.dtsi which sets to four cpus. Correct the value to two cpus for dual core BCM4906 SoC. Fixes: c8b404fb05dc ("arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P DTS files") Signed-off-by: William Zhang Reviewed-by: Florian Fainelli --- Changes in v2: - Split into two patches and add fix reference arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi index 66023d553524..d084c33d5ca8 100644 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi @@ -9,6 +9,14 @@ cpus { /delete-node/ cpu@3; }; + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + pmu { compatible = "arm,cortex-a53-pmu"; interrupts = ,