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[93.42.70.190]) by smtp.googlemail.com with ESMTPSA id t27-20020a17090616db00b0071cbc7487e1sm18025172ejd.69.2022.07.06.18.30.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 18:30:47 -0700 (PDT) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Ohad Ben-Cohen , Baolin Wang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 1/3] hwspinlock: qcom: Add support for mmio usage to sfpb-mutex Date: Thu, 7 Jul 2022 03:30:14 +0200 Message-Id: <20220707013017.26654-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Allow sfpb-mutex to use mmio in addition to syscon. Signed-off-by: Christian Marangi Reviewed-by: Bjorn Andersson Reviewed-by: Baolin Wang --- drivers/hwspinlock/qcom_hwspinlock.c | 32 ++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/drivers/hwspinlock/qcom_hwspinlock.c b/drivers/hwspinlock/qcom_hwspinlock.c index 364710966665..23c913095bd0 100644 --- a/drivers/hwspinlock/qcom_hwspinlock.c +++ b/drivers/hwspinlock/qcom_hwspinlock.c @@ -19,6 +19,11 @@ #define QCOM_MUTEX_APPS_PROC_ID 1 #define QCOM_MUTEX_NUM_LOCKS 32 +struct qcom_hwspinlock_of_data { + u32 offset; + u32 stride; +}; + static int qcom_hwspinlock_trylock(struct hwspinlock *lock) { struct regmap_field *field = lock->priv; @@ -63,9 +68,20 @@ static const struct hwspinlock_ops qcom_hwspinlock_ops = { .unlock = qcom_hwspinlock_unlock, }; +static const struct qcom_hwspinlock_of_data of_sfpb_mutex = { + .offset = 0x4, + .stride = 0x4, +}; + +/* All modern platform has offset 0 and stride of 4k */ +static const struct qcom_hwspinlock_of_data of_tcsr_mutex = { + .offset = 0, + .stride = 0x1000, +}; + static const struct of_device_id qcom_hwspinlock_of_match[] = { - { .compatible = "qcom,sfpb-mutex" }, - { .compatible = "qcom,tcsr-mutex" }, + { .compatible = "qcom,sfpb-mutex", .data = &of_sfpb_mutex }, + { .compatible = "qcom,tcsr-mutex", .data = &of_tcsr_mutex }, { } }; MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match); @@ -101,7 +117,7 @@ static struct regmap *qcom_hwspinlock_probe_syscon(struct platform_device *pdev, return regmap; } -static const struct regmap_config tcsr_mutex_config = { +static const struct regmap_config qcom_hwspinlock_mmio_config = { .reg_bits = 32, .reg_stride = 4, .val_bits = 32, @@ -112,18 +128,20 @@ static const struct regmap_config tcsr_mutex_config = { static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev, u32 *offset, u32 *stride) { + const struct qcom_hwspinlock_of_data *data; struct device *dev = &pdev->dev; void __iomem *base; - /* All modern platform has offset 0 and stride of 4k */ - *offset = 0; - *stride = 0x1000; + data = of_device_get_match_data(dev); + + *offset = data->offset; + *stride = data->stride; base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) return ERR_CAST(base); - return devm_regmap_init_mmio(dev, base, &tcsr_mutex_config); + return devm_regmap_init_mmio(dev, base, &qcom_hwspinlock_mmio_config); } static int qcom_hwspinlock_probe(struct platform_device *pdev) From patchwork Thu Jul 7 01:30:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 588999 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFA78CCA47C for ; Thu, 7 Jul 2022 01:30:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234780AbiGGBaw (ORCPT ); Wed, 6 Jul 2022 21:30:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234771AbiGGBav (ORCPT ); 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[93.42.70.190]) by smtp.googlemail.com with ESMTPSA id t27-20020a17090616db00b0071cbc7487e1sm18025172ejd.69.2022.07.06.18.30.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 18:30:48 -0700 (PDT) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Ohad Ben-Cohen , Baolin Wang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 2/3] ARM: dts: qcom: add missing hwlock for ipq8064 dtsi Date: Thu, 7 Jul 2022 03:30:15 +0200 Message-Id: <20220707013017.26654-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220707013017.26654-1-ansuelsmth@gmail.com> References: <20220707013017.26654-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add missing hwlock for ipq8064 dtsi provided by qcom,sfpb-mutex. Signed-off-by: Christian Marangi --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 4b475d98343c..cd1b43e2cab4 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -1224,4 +1224,11 @@ sdcc3: mmc@12180000 { }; }; }; + + sfpb_mutex: hwlock@1200600 { + compatible = "qcom,sfpb-mutex"; + reg = <0x01200600 0x100>; + + #hwlock-cells = <1>; + }; }; From patchwork Thu Jul 7 01:30:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 588213 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F02FDCCA487 for ; Thu, 7 Jul 2022 01:30:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234748AbiGGBax (ORCPT ); Wed, 6 Jul 2022 21:30:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33446 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234783AbiGGBaw (ORCPT ); Wed, 6 Jul 2022 21:30:52 -0400 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DC942E6B3; Wed, 6 Jul 2022 18:30:51 -0700 (PDT) Received: by mail-ed1-x536.google.com with SMTP id v12so8699397edc.10; Wed, 06 Jul 2022 18:30:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IrfFhBH+L4zbS3ugX8pRey925Xtf+IgisH4J8PjPwAs=; b=bJ4yKoNJmHYErL1xYrVwTGGvdvKJv9diit70u6+8+wJIIxB2PW70eO91iUQ9gucdw8 AXYUD6kVU+XW7+t6XkKHYQhRbie+lpwaiJJX/1yiLTaKICHgt7tGWdB4+eB3LeoxIOry 4WyZkSio4IzUi715vktG+Bn5KY0aKucSYw9Plt6TbLv8vx9+BZL1prS8fpBnley7+P7U adGES/k6peItUdaelK8/OOoS6elpatbcJS5Ixgj8zigGikFpuqDkfXQl7NIGQt6Nd9VV m7aS8EMkYxgnycpvy2mJQ8xUjJv0+ajKG7zZdse81BqhqPNFON+szJjpKXr2GMv5EfeD 85tg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IrfFhBH+L4zbS3ugX8pRey925Xtf+IgisH4J8PjPwAs=; b=hEczf9bwGEvgWnR6+n71VwXKGY1IwKPf1Y1XAiP3nVKDcyioR0PpQu05LRPMaLNbk4 JEkTNk09uSFu8Iw2xn5WsFp5ijC9fx519bcFYNRlpuc5bH0Twfl5wkevQoNKBdBbOWql uc66fPRT9G8aW7gVf3E9gBrEBrYOrF7WmZzeLlxcafab3xLC9QYECYAmEM1kIv578RjR FMvVZxX1qBCfVE/U932+/eBgTajSEQfdGmDye18c45qkBOl3iaAGor63oRKUW/xJs8Lf +WPwZU5WAfjsvN8diAWeOKgtgAjmZ5ocd7hbpfoiSDkKE5SdLqprG2n6HrY/podynAbk zKkA== X-Gm-Message-State: AJIora/BDoF5DwPJsY2EGX6rgwgppGPods4qRS7w34Enj1oOtT+OuZ+x mie93K9gO2+E9Eo8Ss63Wuc= X-Google-Smtp-Source: AGRyM1u1Ai6fzTs6ITeLopa0sNMdG+vE1mWq6grvdYItgPG2wOAVRDxA0vDr9kCp+7TTfjrkWBbl1Q== X-Received: by 2002:a05:6402:2710:b0:435:bf54:8569 with SMTP id y16-20020a056402271000b00435bf548569mr58057919edd.165.1657157449957; Wed, 06 Jul 2022 18:30:49 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id t27-20020a17090616db00b0071cbc7487e1sm18025172ejd.69.2022.07.06.18.30.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 18:30:49 -0700 (PDT) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Ohad Ben-Cohen , Baolin Wang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 3/3] ARM: dts: qcom: add missing smem compatible for ipq8064 dtsi Date: Thu, 7 Jul 2022 03:30:16 +0200 Message-Id: <20220707013017.26654-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220707013017.26654-1-ansuelsmth@gmail.com> References: <20220707013017.26654-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add missing smem compatible and hwlocks binding for ipq8064 dtsi smem node. Signed-off-by: Christian Marangi Acked-by: Krzysztof Kozlowski --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index cd1b43e2cab4..ff1a2acb1d83 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -292,8 +292,11 @@ nss@40000000 { }; smem: smem@41000000 { + compatible = "qcom,smem"; reg = <0x41000000 0x200000>; no-map; + + hwlocks = <&sfpb_mutex 3>; }; };