From patchwork Mon Jul 4 16:11:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 587160 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69B41CCA479 for ; Mon, 4 Jul 2022 16:11:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233776AbiGDQLy (ORCPT ); Mon, 4 Jul 2022 12:11:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233492AbiGDQLx (ORCPT ); Mon, 4 Jul 2022 12:11:53 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95B646269 for ; Mon, 4 Jul 2022 09:11:52 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id z13so16469211lfj.13 for ; Mon, 04 Jul 2022 09:11:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=33SMaLh1eoDBAxmhXTjcVQWnyDJ3mzNy1PP5WaC9dV8=; b=rspOa5EajZPOfNl0ESTchvhQgYhmUu8/ueOoPO44oe2+2Wog+oNj1fpANVwPGESYrF 5XvBIRqQLRYgoJfdxt/vk4TpyHZd/ZEG3sxCaKFGtFfeS7whXyDPggGmA71CDY9s6915 2IXUgtBd9BuBTr7dW+Vb0erOlBGKLD9G+mUSlioCNwkwLtOpcyOPF/h2BL/lC0s1St6n xSs7vPhyOP4B4CEwjE8N+BvQHR3TqjV/3JDffKSzfuBG2SCG/3t7D65UOJLTD/pdI1dC 7/DNB/IFANuvTq/u4p1D+IxF+djQM0Lg8QSBwGoja6RbCIA6rpxflr5DfuZTRdhECOd0 lwNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=33SMaLh1eoDBAxmhXTjcVQWnyDJ3mzNy1PP5WaC9dV8=; b=oB5g4EZc1kI3dwYAF6VwDZmklFF5dI7cBnuv6781/ZE9Dp0//1hQIz6wLdbo7yw2yt L6fyY8sIUXscl0fDS7kOXIjOWbDdWasBm7W9xLmmpEDA2cIuM8xVh+6CSaQ1kwjn+GqX TE/bBbwojauC9PySrBMhnBWqJ1FMWH2FndZUwVUiVDMywUzDCmLgoFGhOvFhHpLrgQcJ seNgyaZJhehoqm95CVG5MocdP+oZ0uqGRZopTDvUuUBJI4+Y+p0kZhRFLSooZfysnsnF Uau0lG5TCzMEpPoNSDAvWrfWyV9HV3Cr+mbROzobuXuauwKJkPZGpe2tuKWQxu1XLL/x GeMA== X-Gm-Message-State: AJIora+NBIKPNMiDbHYdMTpgIXKsfvJqzdz1u0bTciRGGA4PzNk1zine HPwWvomZfHu/I6ROpofEKL+tHA== X-Google-Smtp-Source: AGRyM1tME+0Mf2I5nShZjoogNnmb77dv/j/FemxX3GyQsTed1mGiCD2xsSlfShkpWOGQKuQxOnKESQ== X-Received: by 2002:a05:6512:3b9d:b0:47f:7712:3ece with SMTP id g29-20020a0565123b9d00b0047f77123ecemr18483411lfv.127.1656951110999; Mon, 04 Jul 2022 09:11:50 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id bj16-20020a2eaa90000000b0025d254180d7sm381273ljb.113.2022.07.04.09.11.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Jul 2022 09:11:50 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org, Krzysztof Kozlowski Subject: [PATCH v3 1/3] dt-bindings: phy: qcom,hdmi-phy-qmp: add clock-cells and XO clock Date: Mon, 4 Jul 2022 19:11:46 +0300 Message-Id: <20220704161148.814510-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704161148.814510-1-dmitry.baryshkov@linaro.org> References: <20220704161148.814510-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org As the QMP HDMI PHY is a clock provider, add constant #clock-cells property. For the compatibility with older DTs the property is not marked as required. Also add the XO clock to the list of the clocks used by the driver. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov Acked-By: Vinod Koul --- .../bindings/phy/qcom,hdmi-phy-qmp.yaml | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml index eea2e02678ed..83fe4b39b56f 100644 --- a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml @@ -28,12 +28,15 @@ properties: - const: hdmi_phy clocks: - maxItems: 2 + minItems: 2 + maxItems: 3 clock-names: + minItems: 2 items: - const: iface - const: ref + - const: xo power-domains: maxItems: 1 @@ -44,6 +47,9 @@ properties: vddio-supply: description: phandle to VDD I/O supply regulator + '#clock-cells': + const: 0 + '#phy-cells': const: 0 @@ -75,9 +81,12 @@ examples: "hdmi_phy"; clocks = <&mmcc 116>, - <&gcc 214>; + <&gcc 214>, + <&xo_board>; clock-names = "iface", - "ref"; + "ref", + "xo"; + #clock-cells = <0>; #phy-cells = <0>; vddio-supply = <&vreg_l12a_1p8>; From patchwork Mon Jul 4 16:11:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 587554 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBC58CCA47C for ; Mon, 4 Jul 2022 16:11:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233492AbiGDQL4 (ORCPT ); Mon, 4 Jul 2022 12:11:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234129AbiGDQLy (ORCPT ); Mon, 4 Jul 2022 12:11:54 -0400 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 957846152 for ; Mon, 4 Jul 2022 09:11:53 -0700 (PDT) Received: by mail-lj1-x230.google.com with SMTP id r9so11597294ljp.9 for ; Mon, 04 Jul 2022 09:11:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FB+K+cb4f9fS6PvlJKAr+KfimzTAeQrUyeuMC2GkgBE=; b=qnHQkupyk1x/oq6nK9qO2WrA02Ohq8y3d9jjyNLlypjohyGZMyL2XN5Nz3X1UvRaZc bii0DjgQ10zeZWB9eEDKICbFn5YjggZ6LRfL3eOnDvd7TUXS7kYQhUGhzDL5LcjO4r9o fa4MHfr3x6tDVmkDVu5ER+omVEscP6u//DIKD/ZftSG8JXtxdDlBM+TW4yNw5RWm/rOP usSDTCN+a8gQGZH4ndzmT75cfnX14VbWq5OgJ2GyXJZl9YQUyq+d2XqTDczLGb40dKe4 zX3KrjD9UBmole/rb51Hjr5TlhX990vmekb2IoEJCKD9cefKmwTsmhEslf+/uEbTY1Yi Y1cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FB+K+cb4f9fS6PvlJKAr+KfimzTAeQrUyeuMC2GkgBE=; b=oqoH9BV6mR10rfOG9YF2YANmRrgO5MGeCpn6YfwagFMh4hJVpBLq1SPOxZMikxdLif /iuZYLIm4wsyvEmAR1C6stSECjQf+Z5doNt0E+RzCXHnSSHKi1mOaEsAh028Hk9B/hYx mmtAWem2k1HbV7PvA06DX7uNoG+sFyUSNAxo1Ep+HDFyeBL4TQPpkc0Aj2icJca006pf ioikRP3VcePGYg4zpWMwHcQrzMG6dYWPbl9Y3UreuPuNb8WFyQg9Ve5tNrJNWTcE5xMi 668cj7qicIWrMD8hyQ1q3r10SnnGvFK1smhcOph+bhksPQdKZfX6rTMn72HFFgPxS4/5 mgXA== X-Gm-Message-State: AJIora/Sw3tZznLr5p0yQ9MXvDcIKgXtwgvGxn+77yyhCma/J9bxtoU8 7zMKsMlGI3mxocr53tN1qTFahQ== X-Google-Smtp-Source: AGRyM1v+ysGvZlgZlt6B/q+BV0o2A6rgkhQhJIT//BHmupu6q4pUqrhAZCjKNOsCKPz8O00P8lZhbw== X-Received: by 2002:a2e:9808:0:b0:25a:a30c:e5cb with SMTP id a8-20020a2e9808000000b0025aa30ce5cbmr17458567ljj.312.1656951111916; Mon, 04 Jul 2022 09:11:51 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id bj16-20020a2eaa90000000b0025d254180d7sm381273ljb.113.2022.07.04.09.11.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Jul 2022 09:11:51 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org Subject: [PATCH v3 2/3] drm/msm/hdmi: make hdmi_phy_8996 OF clk provider Date: Mon, 4 Jul 2022 19:11:47 +0300 Message-Id: <20220704161148.814510-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704161148.814510-1-dmitry.baryshkov@linaro.org> References: <20220704161148.814510-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On MSM8996 the HDMI PHY provides the PLL clock to the MMCC. As we are preparing to convert the MSM8996 to use DT clocks properties (rather than global clock names), register the OF clock provider. While we are at it, also change the driver to use clk_parent_data rather parent_names to setup a link to the XO clock. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c | 25 +++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c index b06d9d25a189..4dd055416620 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c @@ -691,15 +691,13 @@ static const struct clk_ops hdmi_8996_pll_ops = { .is_enabled = hdmi_8996_pll_is_enabled, }; -static const char * const hdmi_pll_parents[] = { - "xo", -}; - static const struct clk_init_data pll_init = { .name = "hdmipll", .ops = &hdmi_8996_pll_ops, - .parent_names = hdmi_pll_parents, - .num_parents = ARRAY_SIZE(hdmi_pll_parents), + .parent_data = (const struct clk_parent_data[]){ + { .fw_name = "xo", .name = "xo_board" }, + }, + .num_parents = 1, .flags = CLK_IGNORE_UNUSED, }; @@ -707,8 +705,7 @@ int msm_hdmi_pll_8996_init(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct hdmi_pll_8996 *pll; - struct clk *clk; - int i; + int i, ret; pll = devm_kzalloc(dev, sizeof(*pll), GFP_KERNEL); if (!pll) @@ -735,10 +732,16 @@ int msm_hdmi_pll_8996_init(struct platform_device *pdev) } pll->clk_hw.init = &pll_init; - clk = devm_clk_register(dev, &pll->clk_hw); - if (IS_ERR(clk)) { + ret = devm_clk_hw_register(dev, &pll->clk_hw); + if (ret) { DRM_DEV_ERROR(dev, "failed to register pll clock\n"); - return -EINVAL; + return ret; + } + + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &pll->clk_hw); + if (ret) { + DRM_DEV_ERROR(dev, "%s: failed to register clk provider: %d\n", __func__, ret); + return ret; } return 0; From patchwork Mon Jul 4 16:11:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 587159 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5788BCCA482 for ; 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Mon, 04 Jul 2022 09:11:52 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org, Krzysztof Kozlowski Subject: [PATCH v3 3/3] arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY node Date: Mon, 4 Jul 2022 19:11:48 +0300 Message-Id: <20220704161148.814510-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220704161148.814510-1-dmitry.baryshkov@linaro.org> References: <20220704161148.814510-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add #clock-cells property to the HDMI PHY device node to let other nodes resolve the hdmipll clock. While we are at it, also add the XO clock to the device node. Acked-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 25d6b26fab60..b72385ffecc6 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1049,9 +1049,13 @@ hdmi_phy: hdmi-phy@9a0600 { "hdmi_phy"; clocks = <&mmcc MDSS_AHB_CLK>, - <&gcc GCC_HDMI_CLKREF_CLK>; + <&gcc GCC_HDMI_CLKREF_CLK>, + <&xo_board>; clock-names = "iface", - "ref"; + "ref", + "xo"; + + #clock-cells = <0>; status = "disabled"; };