From patchwork Sat Jul 2 05:25:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 586967 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8729CCA481 for ; Sat, 2 Jul 2022 05:25:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231485AbiGBFZv (ORCPT ); Sat, 2 Jul 2022 01:25:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33032 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229951AbiGBFZt (ORCPT ); Sat, 2 Jul 2022 01:25:49 -0400 Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D2452C673; Fri, 1 Jul 2022 22:25:48 -0700 (PDT) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.nyi.internal (Postfix) with ESMTP id 0AA685C0195; Sat, 2 Jul 2022 01:25:46 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Sat, 02 Jul 2022 01:25:46 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :message-id:mime-version:reply-to:sender:subject:subject:to:to; s=fm3; t=1656739546; x=1656825946; bh=ZDVhLQRWt4nVJ5OST5kNBSRBh F8l/TWZdl9kfqTRWzI=; b=mIbeZnXFq0Rs6r+UoMXOGz25PnMMgtnD8SvbMSpBB aGWj8+hY6AD9fRzW3cl0iqrLhGC3k0+DiILkLuzB3VJ3quyitNDNIPfUR1Op9U3r C0sjBHqG2z3FEL6zVX4X/AE13KiNPf4wI4RfaX29ckzu6ox4Ib9nMP+6ajfnteSZ hKHbd/N90oho/qgBmqkCjcjCQvIAKvPF5H139EQq5EkNODFVkQW3lGNIravAOKEd hTHjCDyh6DtJDuU/AqkYEQK+FjrNCte4VxrcBJ1ihAJFnOfxk5LfXb2uHUy9nupJ ckLLVq4AADxJBvKmDpFD8ugr2FlvLNo+qZnYqHUJqzy1A== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:message-id :mime-version:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t= 1656739546; x=1656825946; bh=ZDVhLQRWt4nVJ5OST5kNBSRBhF8l/TWZdl9 kfqTRWzI=; b=l4sZcQ2rtRuAky8TOo1V5MnEsIFU4de9DrmGsml10Gd3V3cJziF IKRWJPLZhhj+8rvUfzaLSfXjZ8MQOvEpzrFz3hGSyvpU99ysPKhLHDqt0O7Go3wc hAG0FSAPabdOkj85H+OMgkL1EFyG3bZaoApKAOaNKcWNzEWQqU9vUuig7QEDSn30 iIozUddiIMQ7ImxbGzR9HaeQKs+8Qq3dMs8NJRZRdU4BATIi8CMJhbhHzMGgMaQq myjt/137qpudzM8zJC8WMZugUhCcMtNtRLUB4/+1e3VKM+RN+llfWXv7BD10EsTx +3w3WAQwib9E63qHa0KCZCbSLe9E+6gS3Fw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrudehgedgleehucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgggfestdekredtredttdenucfhrhhomhepufgrmhhuvghl ucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecuggftrf grthhtvghrnhepkeevlefhjeeuleeltedvjedvfeefteegleehueejffehgffffeekhefh hfekkeegnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomh epshgrmhhuvghlsehshhholhhlrghnugdrohhrgh X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sat, 2 Jul 2022 01:25:45 -0400 (EDT) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec Cc: Andre Przywara , Wolfram Sang , Samuel Holland , Gregory CLEMENT , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: i2c: mv64xxx: Add variants with offload support Date: Sat, 2 Jul 2022 00:25:42 -0500 Message-Id: <20220702052544.31443-1-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org V536 and newer Allwinner SoCs contain an updated I2C controller which includes an offload engine for master mode. The controller retains the existing register interface, so the A31 compatible still applies. Add the V536 compatible and use it as a fallback for other SoCs with the updated hardware. This includes two SoCs that were already documented (H616 and A100) and two new SoCs (R329 and D1). Signed-off-by: Samuel Holland Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml index f771c09aabfc..0ec033e48830 100644 --- a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml @@ -21,10 +21,18 @@ properties: - enum: - allwinner,sun8i-a23-i2c - allwinner,sun8i-a83t-i2c + - allwinner,sun8i-v536-i2c - allwinner,sun50i-a64-i2c - - allwinner,sun50i-a100-i2c - allwinner,sun50i-h6-i2c + - const: allwinner,sun6i-a31-i2c + - description: Allwinner SoCs with offload support + items: + - enum: + - allwinner,sun20i-d1-i2c + - allwinner,sun50i-a100-i2c - allwinner,sun50i-h616-i2c + - allwinner,sun50i-r329-i2c + - const: allwinner,sun8i-v536-i2c - const: allwinner,sun6i-a31-i2c - const: marvell,mv64xxx-i2c - const: marvell,mv78230-i2c From patchwork Sat Jul 2 05:25:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 586671 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 795C2CCA47B for ; Sat, 2 Jul 2022 05:25:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231350AbiGBFZu (ORCPT ); Sat, 2 Jul 2022 01:25:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229446AbiGBFZt (ORCPT ); Sat, 2 Jul 2022 01:25:49 -0400 Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D1E822B2E; Fri, 1 Jul 2022 22:25:48 -0700 (PDT) Received: from compute2.internal (compute2.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id 667545C0170; Sat, 2 Jul 2022 01:25:47 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute2.internal (MEProxy); Sat, 02 Jul 2022 01:25:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm3; t=1656739547; x=1656825947; bh=Tf wGykUWVQ4iE6lFrnkkSnFLx6F0x4K2zszUvg3ut5E=; b=bIvJSEKTWi2bYZ/+Bz zaPRdi4kzggMW1dxBJAucTPjByNiQuYB8gmWbfwbz/Rp1GXG0wEwbYWPRPVpFM8R gqMUEgqHSYVNmJXodQNHEsHbNq8xPagTjpBDCLI+cJ/nzQkfJT1AgcIHD+6qgE1y 57W7gnOY6nGVbtSz8HjRJrMr7xmuRNVcuuItRJjVk+7O80aO84S7mgWcj09fjKGD ceEFf0Ym/Zlv5UPwRoSon53WkwhgreYJt4tPn8p+R55KShBBIA5gt1VbKYYI6BEG I5WAPKH1m966+bapvomAaFeUq2Re1A764uNHbf6efYQdDfwzeZ3M9Be2pMMDlwzo M81w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm2; t=1656739547; x=1656825947; bh=TfwGykUWVQ4iE 6lFrnkkSnFLx6F0x4K2zszUvg3ut5E=; b=WDjgOW8dtx8gQP4y5+3D4Qkf6y3n1 Gf1Rrb3Pm9KWLzUFidWP1Q4U1iPZIX1aJUfyjJUowTkG8u+Ku8RVDu6HybIU7fVY TUuoN9V7bBwxEA3HY6PcanjjFZAwZGzf1BpIAA3IR0etus5Ac6176WPv2yg/wZjk FXMR3eM1wUVbLcpwPjLLzIXt2UvK/vg9M2lR6k3KOKTHP/W7ts2WqM4B5blfzkcN rn35oLx0tDaVOUFMf+fZjZdF8Z8D9DALYHnEgwfyPuT0OryeUTmrAcftnjF5Hh1x DOeSHimGnla3udZwBW+H6TOmRsiAaY9CIZ5Gz2u2DVWORZ+Tu4Jzw7wIw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrudehgedgleeiucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufgrmhhu vghlucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecugg ftrfgrthhtvghrnhepudekteeuudehtdelteevgfduvddvjefhfedulefgudevgeeghefg udefiedtveetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepshgrmhhuvghlsehshhholhhlrghnugdrohhrgh X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sat, 2 Jul 2022 01:25:46 -0400 (EDT) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec Cc: Andre Przywara , Wolfram Sang , Samuel Holland , Gregory CLEMENT , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: [PATCH 2/2] arm64: dts: allwinner: a100: Update I2C controller fallback Date: Sat, 2 Jul 2022 00:25:43 -0500 Message-Id: <20220702052544.31443-2-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220702052544.31443-1-samuel@sholland.org> References: <20220702052544.31443-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The I2C controllers in the A100 SoC are newer-generation hardware which includes an offload engine. Signify that by including the allwinner,sun8i-v536-i2c fallback compatible, as V536 is the first SoC with this generation of I2C controller. Signed-off-by: Samuel Holland --- arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index f6d7d7f7fdab..548539c93ab0 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -203,6 +203,7 @@ uart4: serial@5001000 { i2c0: i2c@5002000 { compatible = "allwinner,sun50i-a100-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x05002000 0x400>; interrupts = ; @@ -215,6 +216,7 @@ i2c0: i2c@5002000 { i2c1: i2c@5002400 { compatible = "allwinner,sun50i-a100-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x05002400 0x400>; interrupts = ; @@ -227,6 +229,7 @@ i2c1: i2c@5002400 { i2c2: i2c@5002800 { compatible = "allwinner,sun50i-a100-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x05002800 0x400>; interrupts = ; @@ -239,6 +242,7 @@ i2c2: i2c@5002800 { i2c3: i2c@5002c00 { compatible = "allwinner,sun50i-a100-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x05002c00 0x400>; interrupts = ; @@ -315,6 +319,7 @@ r_uart: serial@7080000 { r_i2c0: i2c@7081400 { compatible = "allwinner,sun50i-a100-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x07081400 0x400>; interrupts = ; @@ -329,6 +334,7 @@ r_i2c0: i2c@7081400 { r_i2c1: i2c@7081800 { compatible = "allwinner,sun50i-a100-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x07081800 0x400>; interrupts = ;