From patchwork Wed Jun 29 07:52:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 586613 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FFD4CCA47F for ; Wed, 29 Jun 2022 07:53:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231135AbiF2Hxc (ORCPT ); Wed, 29 Jun 2022 03:53:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232583AbiF2HxK (ORCPT ); Wed, 29 Jun 2022 03:53:10 -0400 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EDB153BBD3 for ; Wed, 29 Jun 2022 00:52:57 -0700 (PDT) Received: by mail-ed1-x52d.google.com with SMTP id n8so7047244eda.0 for ; Wed, 29 Jun 2022 00:52:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7DTWZB97Om2EveO4+LeSiMIgS7q933Vk+cFtrI7PvsQ=; b=zo3HdiH3SVClA6tRFUsSAldlGZ7jiFDvugQ1kWdZQ9ekf/Ozhrgk0z81b6Nqrbpks3 sgzhA4O8dTYtfjFIoiPvk0XL60KrbJFjttz5TXomBBdytDCt7EZKt2bHWZaPeeA2FzgW s4k2egFMvlEQ0/QNpZlIJ6QtDVCLs0gBl5m9pBsl6CHVSeB65s3AiwkYVKsCFAAxGLec dpWKx3YtpMzMTcYzySduJwZ/ormwujS1GbV6+4t2PSlZx8HAiXzo7XADHPvJ0AoXpmj1 PwSXz49zZFIqJ+c2emCj4D0xfckpewGxmXZnTBt4zhpkrZ6p2JTfSOxduK7cqJjMnVQX Y/BQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7DTWZB97Om2EveO4+LeSiMIgS7q933Vk+cFtrI7PvsQ=; b=IhTVwDTqeWoivKcZscUBuZVCrACS7r3+Swk+F/jLY5+a32gLH7DHzFcu+gyRT13iAU rXS5aLBAwNU31R+MqG69YOwYCsQthgS6fKuensgs6nWC1WYbAXfKAsAsd5D/y0Y7zTnx QlbZ7kvoRy98sYbW3OO36YxkexPaPXcBAsQbaWuENPYkdlC4/8xDP1Ty+eUBk/6W0yCz akYpmGxXX0sCd7/U6fj/kotVwJgwcel5YZmJlgwFcr1VOuqMZ8vX3tnknJYuCOxHVdDX hU4JdpoobV2y34na3F06MeRLOESV21r932fp8TCizxdjU4L1gJgOv6VbiG4xtXYLzRhY FZ1Q== X-Gm-Message-State: AJIora/3Ez8F5QPM9p/QkTKKtRdbQxXQ+ate8zGn4+glZJXzffRpNyq3 DFJUwM4TLFfEGv5yRG1GWNIpfw== X-Google-Smtp-Source: AGRyM1sGnv4r6LBIqWOayPAKavY0QnXJXgNgdvqXcunixTUkX0nrbuEnqPm5BwFm8eZCnGx2l6S/Gg== X-Received: by 2002:aa7:d353:0:b0:435:6a15:139f with SMTP id m19-20020aa7d353000000b004356a15139fmr2507062edr.19.1656489175969; Wed, 29 Jun 2022 00:52:55 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id t2-20020a056402020200b00437db6acaeesm432173edv.95.2022.06.29.00.52.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jun 2022 00:52:55 -0700 (PDT) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Georgi Djakov , Rob Herring , Catalin Marinas , Will Deacon , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring Subject: [PATCH v5 1/4] dt-bindings: interconnect: qcom, msm8998-cpu-bwmon: add BWMON device Date: Wed, 29 Jun 2022 09:52:47 +0200 Message-Id: <20220629075250.17610-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220629075250.17610-1-krzysztof.kozlowski@linaro.org> References: <20220629075250.17610-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add bindings for the Qualcomm Bandwidth Monitor device providing performance data on interconnects. The bindings describe only BWMON CPU (version 4), e.g. the instance which appeared for the first on Qualcomm MSM8998 SoC and is also used on SDM845. This BWMON device sits between CPU and Last Level Cache Controller. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Acked-by: Georgi Djakov --- .../interconnect/qcom,msm8998-cpu-bwmon.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,msm8998-cpu-bwmon.yaml diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-cpu-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-cpu-bwmon.yaml new file mode 100644 index 000000000000..b6ced53b92f7 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-cpu-bwmon.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-cpu-bwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Interconnect Bandwidth Monitor + +maintainers: + - Krzysztof Kozlowski + +description: + Bandwidth Monitor measures current throughput on buses between various NoC + fabrics and provides information when it crosses configured thresholds. + +properties: + compatible: + oneOf: + - items: + - enum: + - qcom,sdm845-cpu-bwmon + - const: qcom,msm8998-cpu-bwmon + - const: qcom,msm8998-cpu-bwmon # BWMON v4 + + interconnects: + maxItems: 1 + + interrupts: + maxItems: 1 + + operating-points-v2: true + opp-table: true + + reg: + # Currently described BWMON v4 and v5 use one register address space. + # BWMON v2 uses two register spaces - not yet described. + maxItems: 1 + +required: + - compatible + - interconnects + - interrupts + - operating-points-v2 + - opp-table + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + pmu@1436400 { + compatible = "qcom,sdm845-cpu-bwmon", "qcom,msm8998-cpu-bwmon"; + reg = <0x01436400 0x600>; + interrupts = ; + interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>; + + operating-points-v2 = <&cpu_bwmon_opp_table>; + + cpu_bwmon_opp_table: opp-table { + compatible = "operating-points-v2"; + opp-0 { + opp-peak-kBps = <4800000>; + }; + opp-1 { + opp-peak-kBps = <9216000>; + }; + opp-2 { + opp-peak-kBps = <15052800>; + }; + opp-3 { + opp-peak-kBps = <20889600>; + }; + opp-4 { + opp-peak-kBps = <25497600>; + }; + }; + }; From patchwork Wed Jun 29 07:52:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 585897 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF185CCA483 for ; Wed, 29 Jun 2022 07:53:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232409AbiF2Hx3 (ORCPT ); Wed, 29 Jun 2022 03:53:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37090 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232635AbiF2HxM (ORCPT ); Wed, 29 Jun 2022 03:53:12 -0400 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A4CCB39821 for ; Wed, 29 Jun 2022 00:52:59 -0700 (PDT) Received: by mail-ed1-x536.google.com with SMTP id n8so7047352eda.0 for ; Wed, 29 Jun 2022 00:52:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NVOkXLmoRORRDlnK8ZUeIL+gfaMag/9GYHUkDD1/2+A=; b=GFAIyXPMCvtmzn/WTlueMGio4NTjs+kt73DyQldj8eYka+NV2PVXWMl5APQ5wLoJsN A4aHo3W6cQl+o94595z4m5XTe8WS6/8ZUu2pT5RRg2/3AxUDgLMsG0ZIy2H8/k+FGu1e 4zmIEb271W0mvHMvRoEWAqu+kjHSLvhI8uSO8HlzPJDPb5hdzrmnHM2riAwvPfrnr/qA e3XxqcSafwqGUiJzoFZt98rI8Uy/XRYiy8ohlA+oCMCKqJEMxmbSbxtCXqHGPY/HPLyV PoBpMp1y9si1V3MBA4fnj0YI7a/CcUCfFsiOAzH8Y0iNBVL/smFeFRssx4+0uBb9+VdH w0ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NVOkXLmoRORRDlnK8ZUeIL+gfaMag/9GYHUkDD1/2+A=; b=5eGbHW/ivKHKFKGcS9s/slxvll4ry7SAWrmuikQ85CVrAXS2PxZlxk/dL1gI+h7+Bm 3R8nL3IaOsTxoJQ9ZRspDwXY5q+VmyWHA7W7k+Evdo4Ui5g38x5lDbBUmf0Gvp6KA+Dx pF+u7/nA11VSngPZ1616Du/zVdrg9OaaUoFbdEap4ZoaYP41RFcz6eAWUYNqq33+0HIB hUihuFJU2RIaqyGdACws+SjVPZxt644gcFF1lWMyKKIqVGCO5GV2IOOnitiqpa5o61sQ pbJnglCl/VCI1KvaBTo5l8c8lQFeWkJqQms6jCcpHTO1GP6SQuVYsFD/aeYozgyyw5qf ag0g== X-Gm-Message-State: AJIora8rbIeFFLFM8FaPP54ovEqysSk0h/g95Be287YD1mSLySTnKJfz wEXx/el8j/bXQBTD8ZAS69PidA09HGjGJQ== X-Google-Smtp-Source: AGRyM1uXsU6gydS3qaBCPRY0yUuaB5FrBB9jqOH9EHysNs8uKnwjsvft604h6lNls6tkVN9bupQQmA== X-Received: by 2002:a05:6402:2741:b0:434:fe8a:1f96 with SMTP id z1-20020a056402274100b00434fe8a1f96mr2513145edd.331.1656489177835; Wed, 29 Jun 2022 00:52:57 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id t2-20020a056402020200b00437db6acaeesm432173edv.95.2022.06.29.00.52.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jun 2022 00:52:56 -0700 (PDT) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Georgi Djakov , Rob Herring , Catalin Marinas , Will Deacon , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thara Gopinath Subject: [PATCH v5 2/4] soc: qcom: icc-bwmon: Add bandwidth monitoring driver Date: Wed, 29 Jun 2022 09:52:48 +0200 Message-Id: <20220629075250.17610-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220629075250.17610-1-krzysztof.kozlowski@linaro.org> References: <20220629075250.17610-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Bandwidth monitoring (BWMON) sits between various subsytems like CPU, GPU, Last Level caches and memory subsystem. The BWMON can be configured to monitor the data throuhput between memory and other subsytems. The throughput is measured within specified sampling window and is used to vote for corresponding interconnect bandwidth. Current implementation brings support for BWMON v4, used for example on SDM845 to measure bandwidth between CPU (gladiator_noc) and Last Level Cache (memnoc). Usage of this BWMON allows to remove fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high memory throughput even with lower CPU frequencies. Co-developed-by: Thara Gopinath Signed-off-by: Thara Gopinath Signed-off-by: Krzysztof Kozlowski --- MAINTAINERS | 7 + drivers/soc/qcom/Kconfig | 15 ++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/icc-bwmon.c | 421 +++++++++++++++++++++++++++++++++++ 4 files changed, 444 insertions(+) create mode 100644 drivers/soc/qcom/icc-bwmon.c diff --git a/MAINTAINERS b/MAINTAINERS index 6157e706ed02..968a0494d768 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16376,6 +16376,13 @@ S: Maintained F: Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt F: drivers/i2c/busses/i2c-qcom-cci.c +QUALCOMM INTERCONNECT BWMON DRIVER +M: Krzysztof Kozlowski +L: linux-arm-msm@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/interconnect/qcom,msm8998-cpu-bwmon.yaml +F: drivers/soc/qcom/icc-bwmon.c + QUALCOMM IOMMU M: Rob Clark L: iommu@lists.linux-foundation.org diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index e718b8735444..35c5192dcfc7 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -228,4 +228,19 @@ config QCOM_APR application processor and QDSP6. APR is used by audio driver to configure QDSP6 ASM, ADM and AFE modules. + +config QCOM_ICC_BWMON + tristate "QCOM Interconnect Bandwidth Monitor driver" + depends on ARCH_QCOM || COMPILE_TEST + select PM_OPP + help + Sets up driver monitoring bandwidth on various interconnects and + based on that voting for interconnect bandwidth, adjusting their + speed to current demand. + Current implementation brings support for BWMON v4, used for example + on SDM845 to measure bandwidth between CPU (gladiator_noc) and Last + Level Cache (memnoc). Usage of this BWMON allows to remove fixed + bandwidth votes from cpufreq (CPU nodes) thus achieve high memory + throughput even with lower CPU frequencies. + endmenu diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 70d5de69fd7b..d66604aff2b0 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -28,3 +28,4 @@ obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o +obj-$(CONFIG_QCOM_ICC_BWMON) += icc-bwmon.o diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c new file mode 100644 index 000000000000..1eed075545db --- /dev/null +++ b/drivers/soc/qcom/icc-bwmon.c @@ -0,0 +1,421 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021-2022 Linaro Ltd + * Author: Krzysztof Kozlowski , based on + * previous work of Thara Gopinath and msm-4.9 downstream sources. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * The BWMON samples data throughput within 'sample_ms' time. With three + * configurable thresholds (Low, Medium and High) gives four windows (called + * zones) of current bandwidth: + * + * Zone 0: byte count < THRES_LO + * Zone 1: THRES_LO < byte count < THRES_MED + * Zone 2: THRES_MED < byte count < THRES_HIGH + * Zone 3: THRES_HIGH < byte count + * + * Zones 0 and 2 are not used by this driver. + */ + +/* Internal sampling clock frequency */ +#define HW_TIMER_HZ 19200000 + +#define BWMON_GLOBAL_IRQ_STATUS 0x0 +#define BWMON_GLOBAL_IRQ_CLEAR 0x8 +#define BWMON_GLOBAL_IRQ_ENABLE 0xc +#define BWMON_GLOBAL_IRQ_ENABLE_ENABLE BIT(0) + +#define BWMON_IRQ_STATUS 0x100 +#define BWMON_IRQ_STATUS_ZONE_SHIFT 4 +#define BWMON_IRQ_CLEAR 0x108 +#define BWMON_IRQ_ENABLE 0x10c +#define BWMON_IRQ_ENABLE_ZONE1_SHIFT 5 +#define BWMON_IRQ_ENABLE_ZONE2_SHIFT 6 +#define BWMON_IRQ_ENABLE_ZONE3_SHIFT 7 +#define BWMON_IRQ_ENABLE_MASK (BIT(BWMON_IRQ_ENABLE_ZONE1_SHIFT) | \ + BIT(BWMON_IRQ_ENABLE_ZONE3_SHIFT)) + +#define BWMON_ENABLE 0x2a0 +#define BWMON_ENABLE_ENABLE BIT(0) + +#define BWMON_CLEAR 0x2a4 +#define BWMON_CLEAR_CLEAR BIT(0) + +#define BWMON_SAMPLE_WINDOW 0x2a8 +#define BWMON_THRESHOLD_HIGH 0x2ac +#define BWMON_THRESHOLD_MED 0x2b0 +#define BWMON_THRESHOLD_LOW 0x2b4 + +#define BWMON_ZONE_ACTIONS 0x2b8 +/* + * Actions to perform on some zone 'z' when current zone hits the threshold: + * Increment counter of zone 'z' + */ +#define BWMON_ZONE_ACTIONS_INCREMENT(z) (0x2 << ((z) * 2)) +/* Clear counter of zone 'z' */ +#define BWMON_ZONE_ACTIONS_CLEAR(z) (0x1 << ((z) * 2)) + +/* Zone 0 threshold hit: Clear zone count */ +#define BWMON_ZONE_ACTIONS_ZONE0 (BWMON_ZONE_ACTIONS_CLEAR(0)) + +/* Zone 1 threshold hit: Increment zone count & clear lower zones */ +#define BWMON_ZONE_ACTIONS_ZONE1 (BWMON_ZONE_ACTIONS_INCREMENT(1) | \ + BWMON_ZONE_ACTIONS_CLEAR(0)) + +/* Zone 2 threshold hit: Increment zone count & clear lower zones */ +#define BWMON_ZONE_ACTIONS_ZONE2 (BWMON_ZONE_ACTIONS_INCREMENT(2) | \ + BWMON_ZONE_ACTIONS_CLEAR(1) | \ + BWMON_ZONE_ACTIONS_CLEAR(0)) + +/* Zone 3 threshold hit: Increment zone count & clear lower zones */ +#define BWMON_ZONE_ACTIONS_ZONE3 (BWMON_ZONE_ACTIONS_INCREMENT(3) | \ + BWMON_ZONE_ACTIONS_CLEAR(2) | \ + BWMON_ZONE_ACTIONS_CLEAR(1) | \ + BWMON_ZONE_ACTIONS_CLEAR(0)) +/* Value for BWMON_ZONE_ACTIONS */ +#define BWMON_ZONE_ACTIONS_DEFAULT (BWMON_ZONE_ACTIONS_ZONE0 | \ + BWMON_ZONE_ACTIONS_ZONE1 << 8 | \ + BWMON_ZONE_ACTIONS_ZONE2 << 16 | \ + BWMON_ZONE_ACTIONS_ZONE3 << 24) + +/* + * There is no clear documentation/explanation of BWMON_THRESHOLD_COUNT + * register. Based on observations, this is number of times one threshold has to + * be reached, to trigger interrupt in given zone. + * + * 0xff are maximum values meant to ignore the zones 0 and 2. + */ +#define BWMON_THRESHOLD_COUNT 0x2bc +#define BWMON_THRESHOLD_COUNT_ZONE1_SHIFT 8 +#define BWMON_THRESHOLD_COUNT_ZONE2_SHIFT 16 +#define BWMON_THRESHOLD_COUNT_ZONE3_SHIFT 24 +#define BWMON_THRESHOLD_COUNT_ZONE0_DEFAULT 0xff +#define BWMON_THRESHOLD_COUNT_ZONE2_DEFAULT 0xff + +/* BWMONv4 count registers use count unit of 64 kB */ +#define BWMON_COUNT_UNIT_KB 64 +#define BWMON_ZONE_COUNT 0x2d8 +#define BWMON_ZONE_MAX(zone) (0x2e0 + 4 * (zone)) + +struct icc_bwmon_data { + unsigned int sample_ms; + unsigned int default_highbw_kbps; + unsigned int default_medbw_kbps; + unsigned int default_lowbw_kbps; + u8 zone1_thres_count; + u8 zone3_thres_count; +}; + +struct icc_bwmon { + struct device *dev; + void __iomem *base; + int irq; + + unsigned int default_lowbw_kbps; + unsigned int sample_ms; + unsigned int max_bw_kbps; + unsigned int min_bw_kbps; + unsigned int target_kbps; + unsigned int current_kbps; +}; + +static void bwmon_clear_counters(struct icc_bwmon *bwmon) +{ + /* + * Clear counters. The order and barriers are + * important. Quoting downstream Qualcomm msm-4.9 tree: + * + * The counter clear and IRQ clear bits are not in the same 4KB + * region. So, we need to make sure the counter clear is completed + * before we try to clear the IRQ or do any other counter operations. + */ + writel(BWMON_CLEAR_CLEAR, bwmon->base + BWMON_CLEAR); +} + +static void bwmon_clear_irq(struct icc_bwmon *bwmon) +{ + /* + * Clear zone and global interrupts. The order and barriers are + * important. Quoting downstream Qualcomm msm-4.9 tree: + * + * Synchronize the local interrupt clear in mon_irq_clear() + * with the global interrupt clear here. Otherwise, the CPU + * may reorder the two writes and clear the global interrupt + * before the local interrupt, causing the global interrupt + * to be retriggered by the local interrupt still being high. + * + * Similarly, because the global registers are in a different + * region than the local registers, we need to ensure any register + * writes to enable the monitor after this call are ordered with the + * clearing here so that local writes don't happen before the + * interrupt is cleared. + */ + writel(BWMON_IRQ_ENABLE_MASK, bwmon->base + BWMON_IRQ_CLEAR); + writel(BIT(0), bwmon->base + BWMON_GLOBAL_IRQ_CLEAR); +} + +static void bwmon_disable(struct icc_bwmon *bwmon) +{ + /* Disable interrupts. Strict ordering, see bwmon_clear_irq(). */ + writel(0x0, bwmon->base + BWMON_GLOBAL_IRQ_ENABLE); + writel(0x0, bwmon->base + BWMON_IRQ_ENABLE); + + /* + * Disable bwmon. Must happen before bwmon_clear_irq() to avoid spurious + * IRQ. + */ + writel(0x0, bwmon->base + BWMON_ENABLE); +} + +static void bwmon_enable(struct icc_bwmon *bwmon, unsigned int irq_enable) +{ + /* Enable interrupts */ + writel(BWMON_GLOBAL_IRQ_ENABLE_ENABLE, + bwmon->base + BWMON_GLOBAL_IRQ_ENABLE); + writel(irq_enable, bwmon->base + BWMON_IRQ_ENABLE); + + /* Enable bwmon */ + writel(BWMON_ENABLE_ENABLE, bwmon->base + BWMON_ENABLE); +} + +static unsigned int bwmon_kbps_to_count(unsigned int kbps) +{ + return kbps / BWMON_COUNT_UNIT_KB; +} + +static void bwmon_set_threshold(struct icc_bwmon *bwmon, unsigned int reg, + unsigned int kbps) +{ + unsigned int thres; + + thres = mult_frac(bwmon_kbps_to_count(kbps), bwmon->sample_ms, + MSEC_PER_SEC); + writel_relaxed(thres, bwmon->base + reg); +} + +static void bwmon_start(struct icc_bwmon *bwmon, + const struct icc_bwmon_data *data) +{ + unsigned int thres_count; + int window; + + bwmon_clear_counters(bwmon); + + window = mult_frac(bwmon->sample_ms, HW_TIMER_HZ, MSEC_PER_SEC); + /* Maximum sampling window: 0xfffff */ + writel_relaxed(window, bwmon->base + BWMON_SAMPLE_WINDOW); + + bwmon_set_threshold(bwmon, BWMON_THRESHOLD_HIGH, + data->default_highbw_kbps); + bwmon_set_threshold(bwmon, BWMON_THRESHOLD_MED, + data->default_medbw_kbps); + bwmon_set_threshold(bwmon, BWMON_THRESHOLD_LOW, + data->default_lowbw_kbps); + + thres_count = data->zone3_thres_count << BWMON_THRESHOLD_COUNT_ZONE3_SHIFT | + BWMON_THRESHOLD_COUNT_ZONE2_DEFAULT << BWMON_THRESHOLD_COUNT_ZONE2_SHIFT | + data->zone1_thres_count << BWMON_THRESHOLD_COUNT_ZONE1_SHIFT | + BWMON_THRESHOLD_COUNT_ZONE0_DEFAULT; + writel_relaxed(thres_count, bwmon->base + BWMON_THRESHOLD_COUNT); + writel_relaxed(BWMON_ZONE_ACTIONS_DEFAULT, + bwmon->base + BWMON_ZONE_ACTIONS); + /* Write barriers in bwmon_clear_irq() */ + + bwmon_clear_irq(bwmon); + bwmon_enable(bwmon, BWMON_IRQ_ENABLE_MASK); +} + +static irqreturn_t bwmon_intr(int irq, void *dev_id) +{ + struct icc_bwmon *bwmon = dev_id; + unsigned int status, max; + int zone; + + status = readl(bwmon->base + BWMON_IRQ_STATUS); + status &= BWMON_IRQ_ENABLE_MASK; + if (!status) { + /* + * Only zone 1 and zone 3 interrupts are enabled but zone 2 + * threshold could be hit and trigger interrupt even if not + * enabled. + * Such spurious interrupt might come with valuable max count or + * not, so solution would be to always check all + * BWMON_ZONE_MAX() registers to find the highest value. + * Such case is currently ignored. + */ + return IRQ_NONE; + } + + bwmon_disable(bwmon); + + zone = get_bitmask_order(status >> BWMON_IRQ_STATUS_ZONE_SHIFT) - 1; + /* + * Zone max bytes count register returns count units within sampling + * window. Downstream kernel for BWMONv4 (called BWMON type 2 in + * downstream) always increments the max bytes count by one. + */ + max = readl(bwmon->base + BWMON_ZONE_MAX(zone)) + 1; + max *= BWMON_COUNT_UNIT_KB; + bwmon->target_kbps = mult_frac(max, MSEC_PER_SEC, bwmon->sample_ms); + + return IRQ_WAKE_THREAD; +} + +static irqreturn_t bwmon_intr_thread(int irq, void *dev_id) +{ + struct icc_bwmon *bwmon = dev_id; + unsigned int irq_enable = 0; + struct dev_pm_opp *opp, *target_opp; + unsigned int bw_kbps, up_kbps, down_kbps; + + bw_kbps = bwmon->target_kbps; + + target_opp = dev_pm_opp_find_bw_ceil(bwmon->dev, &bw_kbps, 0); + if (IS_ERR(target_opp) && PTR_ERR(target_opp) == -ERANGE) + target_opp = dev_pm_opp_find_bw_floor(bwmon->dev, &bw_kbps, 0); + + bwmon->target_kbps = bw_kbps; + + bw_kbps--; + opp = dev_pm_opp_find_bw_floor(bwmon->dev, &bw_kbps, 0); + if (IS_ERR(opp) && PTR_ERR(opp) == -ERANGE) + down_kbps = bwmon->target_kbps; + else + down_kbps = bw_kbps; + + up_kbps = bwmon->target_kbps + 1; + + if (bwmon->target_kbps >= bwmon->max_bw_kbps) + irq_enable = BIT(BWMON_IRQ_ENABLE_ZONE1_SHIFT); + else if (bwmon->target_kbps <= bwmon->min_bw_kbps) + irq_enable = BIT(BWMON_IRQ_ENABLE_ZONE3_SHIFT); + else + irq_enable = BWMON_IRQ_ENABLE_MASK; + + bwmon_set_threshold(bwmon, BWMON_THRESHOLD_HIGH, up_kbps); + bwmon_set_threshold(bwmon, BWMON_THRESHOLD_MED, down_kbps); + /* Write barriers in bwmon_clear_counters() */ + bwmon_clear_counters(bwmon); + bwmon_clear_irq(bwmon); + bwmon_enable(bwmon, irq_enable); + + if (bwmon->target_kbps == bwmon->current_kbps) + goto out; + + dev_pm_opp_set_opp(bwmon->dev, target_opp); + bwmon->current_kbps = bwmon->target_kbps; + +out: + dev_pm_opp_put(target_opp); + if (!IS_ERR(opp)) + dev_pm_opp_put(opp); + + return IRQ_HANDLED; +} + +static int bwmon_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct dev_pm_opp *opp; + struct icc_bwmon *bwmon; + const struct icc_bwmon_data *data; + int ret; + + bwmon = devm_kzalloc(dev, sizeof(*bwmon), GFP_KERNEL); + if (!bwmon) + return -ENOMEM; + + data = of_device_get_match_data(dev); + + bwmon->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(bwmon->base)) { + dev_err(dev, "failed to map bwmon registers\n"); + return PTR_ERR(bwmon->base); + } + + bwmon->irq = platform_get_irq(pdev, 0); + if (bwmon->irq < 0) { + dev_err(dev, "failed to acquire bwmon IRQ\n"); + return bwmon->irq; + } + + ret = devm_pm_opp_of_add_table(dev); + if (ret) + return dev_err_probe(dev, ret, "failed to add OPP table\n"); + + bwmon->max_bw_kbps = UINT_MAX; + opp = dev_pm_opp_find_bw_floor(dev, &bwmon->max_bw_kbps, 0); + if (IS_ERR(opp)) + return dev_err_probe(dev, ret, "failed to find max peak bandwidth\n"); + + bwmon->min_bw_kbps = 0; + opp = dev_pm_opp_find_bw_ceil(dev, &bwmon->min_bw_kbps, 0); + if (IS_ERR(opp)) + return dev_err_probe(dev, ret, "failed to find min peak bandwidth\n"); + + bwmon->sample_ms = data->sample_ms; + bwmon->default_lowbw_kbps = data->default_lowbw_kbps; + bwmon->dev = dev; + + bwmon_disable(bwmon); + ret = devm_request_threaded_irq(dev, bwmon->irq, bwmon_intr, + bwmon_intr_thread, + IRQF_ONESHOT, dev_name(dev), bwmon); + if (ret) + return dev_err_probe(dev, ret, "failed to request IRQ\n"); + + platform_set_drvdata(pdev, bwmon); + bwmon_start(bwmon, data); + + return 0; +} + +static int bwmon_remove(struct platform_device *pdev) +{ + struct icc_bwmon *bwmon = platform_get_drvdata(pdev); + + bwmon_disable(bwmon); + + return 0; +} + +/* BWMON v4 */ +static const struct icc_bwmon_data sdm845_bwmon_data = { + .sample_ms = 4, + .default_highbw_kbps = 4800 * 1024, /* 4.8 GBps */ + .default_medbw_kbps = 512 * 1024, /* 512 MBps */ + .default_lowbw_kbps = 0, + .zone1_thres_count = 16, + .zone3_thres_count = 1, +}; + +static const struct of_device_id bwmon_of_match[] = { + { .compatible = "qcom,sdm845-cpu-bwmon", .data = &sdm845_bwmon_data }, + {} +}; +MODULE_DEVICE_TABLE(of, bwmon_of_match); + +static struct platform_driver bwmon_driver = { + .probe = bwmon_probe, + .remove = bwmon_remove, + .driver = { + .name = "qcom-bwmon", + .of_match_table = bwmon_of_match, + }, +}; +module_platform_driver(bwmon_driver); + +MODULE_AUTHOR("Krzysztof Kozlowski "); +MODULE_DESCRIPTION("QCOM BWMON driver"); +MODULE_LICENSE("GPL"); From patchwork Wed Jun 29 07:52:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 585898 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEC96C43334 for ; Wed, 29 Jun 2022 07:53:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232622AbiF2Hx2 (ORCPT ); Wed, 29 Jun 2022 03:53:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232636AbiF2HxM (ORCPT ); Wed, 29 Jun 2022 03:53:12 -0400 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB9813B3F9 for ; Wed, 29 Jun 2022 00:53:00 -0700 (PDT) Received: by mail-ej1-x62f.google.com with SMTP id d2so19112903ejy.1 for ; Wed, 29 Jun 2022 00:53:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=l4c6eL6FkT3F5Q2UMeh1SdTOW/jzEthp0aJ+P51R6LI=; b=AV4NEcyHx8w1xqDMI5YOYNDvdZip64G+iNWEh/ZDv5T4AfyWfiY2Dx63X8iNx5c1no 13qprKhyHd6K9peeLiYqGLkEya2BS+rj5WqWdXb+TucvbalQQ8rv/LTe3MrRoHLkoSCK /Xu+4+UUyNHh73MKUWfTNeS4NXOROyPPNjUSHrUiKAWRsxXoMFbkuZuLRExCI6oYQLXJ yiCd34hujtJoszLTJsUG/5Ju1lx566hR2GeAhbx1EKXl2VEZIyLKgUFsTYryaOh9QoRN WrFoBEwj/gJ6Ok7RIMih29H5y5iOPFtjQmOdFrs1bCIwPVDORL6Y0/z1py1r5jfTaGFa 85qQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=l4c6eL6FkT3F5Q2UMeh1SdTOW/jzEthp0aJ+P51R6LI=; b=7lvMBwdl4wsch+/5ZvyFgvL09oVXRUjYg1sOWXkGikY1KbeJdpBXxEOVNjXl9tXjFM NsoGDahMq7p+/pcaLIl2wVDM7HDq+OT4H5lM+6LBPMxgZsEP1pgTq9dhpN1eXGnRm3T2 Opdg7/B6KIvirpNBpV6oBDqPxqKQi1LdOCG/5N5160GDgGXIHPKjMOdfbEOJVwI0MzzG vSAOHmYuV0gZVg9kdfUKlkpamGLf2BcjdI0FbAU+GXaxpWWyw05Stl44EX/syQRU2dq2 n6UfSVqCw7hdW96Mv2d0l5tu0KD/+i6hTXJX40H/+6BMml8q+s4u2NivulbjX59dRwVB VkDg== X-Gm-Message-State: AJIora/3GPb2xQRfZUkr1UxvVbOf/aUA/1m+PND4A0DXPwiewYjjkH6m tv2GXuesKMsamkScpWkrZMUY3g== X-Google-Smtp-Source: AGRyM1tMc7nBQ3SvkzcyGP9WZi4dulRVf6CGwCKOxfFwJ6EBO9vmDI5R4xCDDINWYm2Rk8hIPhTkUA== X-Received: by 2002:a17:906:20c6:b0:716:646d:c019 with SMTP id c6-20020a17090620c600b00716646dc019mr1901895ejc.529.1656489179257; Wed, 29 Jun 2022 00:52:59 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id t2-20020a056402020200b00437db6acaeesm432173edv.95.2022.06.29.00.52.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jun 2022 00:52:58 -0700 (PDT) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Georgi Djakov , Rob Herring , Catalin Marinas , Will Deacon , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 3/4] arm64: defconfig: enable Qualcomm Bandwidth Monitor Date: Wed, 29 Jun 2022 09:52:49 +0200 Message-Id: <20220629075250.17610-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220629075250.17610-1-krzysztof.kozlowski@linaro.org> References: <20220629075250.17610-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable the Qualcomm Bandwidth Monitor to allow scaling interconnects depending on bandwidth usage between CPU and memory. This is used already on Qualcomm SDM845 SoC. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 6906b83f5e45..6edbcfd3f4ca 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1096,6 +1096,7 @@ CONFIG_QCOM_SOCINFO=m CONFIG_QCOM_STATS=m CONFIG_QCOM_WCNSS_CTRL=m CONFIG_QCOM_APR=m +CONFIG_QCOM_ICC_BWMON=m CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77950=y From patchwork Wed Jun 29 07:52:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 586614 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B925BCCA485 for ; Wed, 29 Jun 2022 07:53:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232628AbiF2Hxa (ORCPT ); Wed, 29 Jun 2022 03:53:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232655AbiF2HxO (ORCPT ); Wed, 29 Jun 2022 03:53:14 -0400 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D0B839B93 for ; Wed, 29 Jun 2022 00:53:02 -0700 (PDT) Received: by mail-ed1-x52c.google.com with SMTP id e40so21033940eda.2 for ; Wed, 29 Jun 2022 00:53:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wfc98UIdtcTx3Uk4wA7IydSC5XqKZoBwf1qoiSGq7iA=; b=I2OK1McGbJoBW21ZZeM4sydqnxk1iFbRCGkI6B363FKEW1FIlXSshq4qaP2D7pvPDw 1G18YVReHPvzbZSLXEW2RH9dg6IdzjUC+1u3f1/hNRJNNlVuThDvrxvjbwFvZXi2sVD5 peCT3dZD6c2lI3aGEc9U8744hIe+u+Vb/U0Q4o7s0CyLRJHQtJmrHf+Av5OaBHIoE/QX VqM6LPRtHlz78oms7iX3isNg0ZgbqizAuUeu6KeEvwOWSuiEeSQErdqtSi1vgplh6Z0s 1D79/zo52w4GN9eMnr/HhGbWv8oFi7VWLDGvXtmLySCgKR2M2RmmJUdYVOgLc6k8prjR QZYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wfc98UIdtcTx3Uk4wA7IydSC5XqKZoBwf1qoiSGq7iA=; b=UDVlfjFys0dumopB9VXtVtJPG9TjAPbxlTTtzZixf/NcT0dwjelL3Q5xUA1O1eCfQv jVuNAz5Lp3rDP47+1iZqzAdPc48sJu9zJm09scvzqFibMeMP+rFjFPVLjZ6UWZb4uJYS Vso/qLm2Lv8xmMnANbA0rgQxlazpV2MGG0oxBKeSt/8GX3phz/JfcxbhRpn3raq4gR2l WC3GTwqZAvjZ055+PT0ZzY7R7qfx+TQROFRpxoT1AXbhon28E7T2r8sS4lg3zPEW9gZq C/lSVGuPuOhwS30Keo9upx9CdldeD01Cy2sk6jsfn3T6m1y8dChA5upFV5lZTclZHeE0 mqNA== X-Gm-Message-State: AJIora9UGtQA4x+AZgMH85Wm7ASFyAbrQbkkQMl/LVODDEN+RlQOtQ32 TnhHs2MOaDFlJno+oYmbNwlFPQ== X-Google-Smtp-Source: AGRyM1um2rliocS+nP8zYQiLFTaGyhO3zUYztQsruEO8RAF5jxnR5TWfwm/XUIood6h0BQlrMa5vhg== X-Received: by 2002:a05:6402:43c7:b0:435:8a92:e8d0 with SMTP id p7-20020a05640243c700b004358a92e8d0mr2517359edc.174.1656489181164; Wed, 29 Jun 2022 00:53:01 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id t2-20020a056402020200b00437db6acaeesm432173edv.95.2022.06.29.00.52.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jun 2022 00:53:00 -0700 (PDT) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Georgi Djakov , Rob Herring , Catalin Marinas , Will Deacon , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thara Gopinath Subject: [PATCH v5 4/4] arm64: dts: qcom: sdm845: Add CPU BWMON Date: Wed, 29 Jun 2022 09:52:50 +0200 Message-Id: <20220629075250.17610-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220629075250.17610-1-krzysztof.kozlowski@linaro.org> References: <20220629075250.17610-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add device node for CPU-memory BWMON device (bandwidth monitoring) on SDM845 measuring bandwidth between CPU (gladiator_noc) and Last Level Cache (memnoc). Usage of this BWMON allows to remove fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high memory throughput even with lower CPU frequencies. Co-developed-by: Thara Gopinath Signed-off-by: Thara Gopinath Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 38 ++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 83e8b63f0910..e0f088996390 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2026,6 +2026,44 @@ llcc: system-cache-controller@1100000 { interrupts = ; }; + pmu@1436400 { + compatible = "qcom,sdm845-cpu-bwmon", "qcom,msm8998-cpu-bwmon"; + reg = <0 0x01436400 0 0x600>; + interrupts = ; + interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>; + + operating-points-v2 = <&cpu_bwmon_opp_table>; + + cpu_bwmon_opp_table: opp-table { + compatible = "operating-points-v2"; + + /* + * The interconnect paths bandwidths taken from + * cpu4_opp_table bandwidth. + * They also match different tables from + * msm-4.9 downstream kernel: + * - the OSM L3 from bandwidth table of + * qcom,cpu4-l3lat-mon (qcom,core-dev-table); + * bus width: 16 bytes; + */ + opp-0 { + opp-peak-kBps = <4800000>; + }; + opp-1 { + opp-peak-kBps = <9216000>; + }; + opp-2 { + opp-peak-kBps = <15052800>; + }; + opp-3 { + opp-peak-kBps = <20889600>; + }; + opp-4 { + opp-peak-kBps = <25497600>; + }; + }; + }; + pcie0: pci@1c00000 { compatible = "qcom,pcie-sdm845"; reg = <0 0x01c00000 0 0x2000>,