From patchwork Fri Jan 18 13:40:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 155930 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3268211jaa; Fri, 18 Jan 2019 05:40:11 -0800 (PST) X-Google-Smtp-Source: ALg8bN76B3cnFIRNgXMKh24NRSJBrFLtLODQbRB7IEt5oZPygOWMXTSXXIXronhKSDgW6PZ+XIPz X-Received: by 2002:a63:5402:: with SMTP id i2mr17333037pgb.79.1547818810966; Fri, 18 Jan 2019 05:40:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547818810; cv=none; d=google.com; s=arc-20160816; b=xalkxp5G7/1iBVrEPauVu5AezBGMqKO1Vbfx9krCbCbXN8PGeb0StoMKs7B0ly7IWv B1s7tN0FaFNnVVXWwJxbxbtnD3BvQWKJPHyC26my4yWITLXcntT1zjzYszldE6U+uxsF zb1hR36869qlg7zWVsWJPQqZgWWKWDwFe3lJjiYruXax3kCZlkZ4pNZt6Z9dXHg3zUTQ Yx3HGK5BOdO4KNV+3x79RWCSBxrhi2SD8Ukd2QBgiekXue+QzkKmppouDRRmKkzdjLTd tsymjK14c3QYH2Fht+gtu9bs+wX3vLEsO7V4eB6t2J/p3Ws86fiDl9qUtMmIdo7x3iRU A0ig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=g/X1Iil5nsw95bd81C6k90xkuP1yC4SbRrn0kOYYexc=; b=pohD3gXxW61KaVMzYY6psRyLGe+vvxQjOy/GAT4JTSJb9FDI094r8sVTXskHtsUAwb 1Agx+vj3xW2oYmlQx8SSpkQTqTERfwdk7Dyy9HAPe5TBPeTLWDQvr5cyG0qB+ENJcEe+ 5HP6yDPZf5qjaLL5TtlFdtxqukVV06uZBdUnDEL1XwcLYt/WvCTDRJr7YMix3LRPubpo 0JeCi7w8NLoafFkBMtYDEgABIaf4szoShPmo4yEa1mMdQ8onGfnarz4hQ3SOJludIpIc C70Vt6RoeP4xGItGhsLMgkh1M8wytYq8aGt4eQ5Vmtvx2uGSNq6M/MZvqCjhHvy/4uIC mG5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ej4vK+n5; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p4si1516142pga.514.2019.01.18.05.40.10; Fri, 18 Jan 2019 05:40:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ej4vK+n5; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727337AbfARNkJ (ORCPT + 15 others); Fri, 18 Jan 2019 08:40:09 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:41258 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727513AbfARNkH (ORCPT ); Fri, 18 Jan 2019 08:40:07 -0500 Received: by mail-wr1-f65.google.com with SMTP id x10so15066006wrs.8 for ; Fri, 18 Jan 2019 05:40:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=g/X1Iil5nsw95bd81C6k90xkuP1yC4SbRrn0kOYYexc=; b=ej4vK+n5W7ONF/d1/PKS11adLmV5d2DmS4A0PW9PBiiCCdKfeI/drNxJPBl52RbKl5 ERQLYyZCFHgZJqWBZeKmCsoEzs8dPdlXFzsse9/p5F/Nn66sOtOFcgqY3smGlhJ9p7Ur CHRc37ZAJ0JbeJpudHKCUfbyM6C8w9J7WYeTA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=g/X1Iil5nsw95bd81C6k90xkuP1yC4SbRrn0kOYYexc=; b=phojsLAViGnDNwNYEbukKcufmjsl9819saYU95OWLbJsDVgOPhZfs9q5yoKV8IK55n f0TCbqh0pO7+X9B0/HlR/bng3qd3/ej+sonBoPJj1kzZW4C/yea69dkVDK9rG/REoMk6 Fqek7I+nZCgoWP4Am1WcJaDJF8SGMN0jY6uKZ0WKfnKEJ3vkt+6vpU8Vm7hV9A0Tvpaq WWSiLKBTgiIukpAW4SDo9P9fkqQfB2CeHCqT2fwXeG4MiIsE0en5U3VhMU8id6GF1CG+ F3xPFJJQeiJIuPZZalGGJYhnkcQEWvZUVwDI1Nvvvqer9moM7Dd9tiMFimyotqSF4dny W5kA== X-Gm-Message-State: AJcUukfTDqEuAS1yA77iJ16d4Hf15snvVTmG6t3nvrMLCwXj/JWIjLuE GQ7WhvPtbhtYkzoodMgvmwT2VScQPJM= X-Received: by 2002:a05:6000:104b:: with SMTP id c11mr16927265wrx.303.1547818804862; Fri, 18 Jan 2019 05:40:04 -0800 (PST) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id t4sm55764106wrb.64.2019.01.18.05.40.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 18 Jan 2019 05:40:04 -0800 (PST) From: Georgi Djakov To: stable@vger.kernel.org Cc: loic.poulain@linaro.org, georgi.djakov@linaro.org Subject: [PATCH 4.19,4.20] mmc: sdhci-msm: Disable CDR function on TX Date: Fri, 18 Jan 2019 15:40:00 +0200 Message-Id: <20190118134000.14707-2-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190118134000.14707-1-georgi.djakov@linaro.org> References: <20190118134000.14707-1-georgi.djakov@linaro.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Loic Poulain commit a89e7bcb18081c611eb6cf50edd440fa4983a71a upstream. The Clock Data Recovery (CDR) circuit allows to automatically adjust the RX sampling-point/phase for high frequency cards (SDR104, HS200...). CDR is automatically enabled during DLL configuration. However, according to the APQ8016 reference manual, this function must be disabled during TX and tuning phase in order to prevent any interferences during tuning challenges and unexpected phase alteration during TX transfers. This patch enables/disables CDR according to the current transfer mode. This fixes sporadic write transfer issues observed with some SDR104 and HS200 cards. Inspired by sdhci-msm downstream patch: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/432516/ Reported-by: Leonid Segal Reported-by: Manabu Igusa Signed-off-by: Loic Poulain Acked-by: Adrian Hunter Acked-by: Georgi Djakov Signed-off-by: Ulf Hansson [georgi: backport to v4.19+] Signed-off-by: Georgi Djakov --- drivers/mmc/host/sdhci-msm.c | 43 +++++++++++++++++++++++++++++++++++- 1 file changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 3cc8bfee6c18..8594659cb592 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -258,6 +258,8 @@ struct sdhci_msm_host { bool mci_removed; const struct sdhci_msm_variant_ops *var_ops; const struct sdhci_msm_offset *offset; + bool use_cdr; + u32 transfer_mode; }; static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_host *host) @@ -1025,6 +1027,26 @@ static int sdhci_msm_hs400_dll_calibration(struct sdhci_host *host) return ret; } +static void sdhci_msm_set_cdr(struct sdhci_host *host, bool enable) +{ + const struct sdhci_msm_offset *msm_offset = sdhci_priv_msm_offset(host); + u32 config, oldconfig = readl_relaxed(host->ioaddr + + msm_offset->core_dll_config); + + config = oldconfig; + if (enable) { + config |= CORE_CDR_EN; + config &= ~CORE_CDR_EXT_EN; + } else { + config &= ~CORE_CDR_EN; + config |= CORE_CDR_EXT_EN; + } + + if (config != oldconfig) + writel_relaxed(config, host->ioaddr + + msm_offset->core_dll_config); +} + static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode) { struct sdhci_host *host = mmc_priv(mmc); @@ -1042,8 +1064,14 @@ static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode) if (host->clock <= CORE_FREQ_100MHZ || !(ios.timing == MMC_TIMING_MMC_HS400 || ios.timing == MMC_TIMING_MMC_HS200 || - ios.timing == MMC_TIMING_UHS_SDR104)) + ios.timing == MMC_TIMING_UHS_SDR104)) { + msm_host->use_cdr = false; + sdhci_msm_set_cdr(host, false); return 0; + } + + /* Clock-Data-Recovery used to dynamically adjust RX sampling point */ + msm_host->use_cdr = true; /* * For HS400 tuning in HS200 timing requires: @@ -1525,6 +1553,19 @@ static int __sdhci_msm_check_write(struct sdhci_host *host, u16 val, int reg) case SDHCI_POWER_CONTROL: req_type = !val ? REQ_BUS_OFF : REQ_BUS_ON; break; + case SDHCI_TRANSFER_MODE: + msm_host->transfer_mode = val; + break; + case SDHCI_COMMAND: + if (!msm_host->use_cdr) + break; + if ((msm_host->transfer_mode & SDHCI_TRNS_READ) && + SDHCI_GET_CMD(val) != MMC_SEND_TUNING_BLOCK_HS200 && + SDHCI_GET_CMD(val) != MMC_SEND_TUNING_BLOCK) + sdhci_msm_set_cdr(host, true); + else + sdhci_msm_set_cdr(host, false); + break; } if (req_type) {