From patchwork Thu Jan 17 10:23:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 155814 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp1784293jaa; Thu, 17 Jan 2019 02:23:31 -0800 (PST) X-Google-Smtp-Source: ALg8bN727xvV0Sxgr59wxqJIK+xGjMW3Y4MAVcMuBAwcBJ4m1xpMOp6TewPwX9iDaMQHL9Wo7xOS X-Received: by 2002:a17:902:28c1:: with SMTP id f59mr14412483plb.37.1547720611798; Thu, 17 Jan 2019 02:23:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547720611; cv=none; d=google.com; s=arc-20160816; b=cDWHwN6zV6FX4wEALIBtG0L5MEojxSMk0RM7704IKs6HpW8FNWfxpv99E8Yx1n55X8 rvPNZA45fU7cjDJydXfLiyLAS5l4EtOSK0naTpMijgt3PGqxxxSkk9B5IC5/h+vnaaoh QUuTJ9kmK9hrs4qZd5+tsiSCuGzn3ZwMlo78YkG6WiOGLphXkexEXBZW70g/JTd9y5Jr U9i5TzIt+iH6Ops5Nx1Bnl2FXzpzxD/dHhCHZl04vu6OjDPnfEfDhpVzar5Qb3ECyo6S 3rFkXTx1O4rNHiBfjHpMjhd4IGdLKQ/GB5va2rZFOn++OaodI9CYCTd2Sjpc9Xs3xojB smXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=arU82ZeX78CY4qS47DMaU2XgnlqLaod0sJ3wwiKXdJQ=; b=axzkSsgXXobiLTo4WJncNqT//mQhOEHYeAMywT07ujT/OF7u7GSk+qRAeuYFIxRVk+ td/Lt3h2kjyRef5XrVDopauSSGWUHDfk6zaWcd9NRm7oW2NUyQj44sgDxnaVSh9rEuCy 7+PuMQisCjfpXNdSmqb1i9mM6uSrfubHsY+NSKSXU4LJUfsBgjGif6n8o4hYWB4qJwD4 dz3hYDJzsZTkWMCndwWPxzBjAU8cvRlm9AM5QyGu9aYqzwLNKrelneS9sNeB3nkr4eCm YlS4a4c1wF1brF6QgbRKbhWh6r+cfhF63a06NlyNWqgV97J3AY2Qzwp72laMki1VG3p7 FLnw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=0E6lQZS9; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id be9si1259343plb.143.2019.01.17.02.23.31; Thu, 17 Jan 2019 02:23:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=0E6lQZS9; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728001AbfAQKXa (ORCPT + 11 others); Thu, 17 Jan 2019 05:23:30 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:33065 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727498AbfAQKX0 (ORCPT ); Thu, 17 Jan 2019 05:23:26 -0500 Received: by mail-wm1-f67.google.com with SMTP id r24so683614wmh.0 for ; Thu, 17 Jan 2019 02:23:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=arU82ZeX78CY4qS47DMaU2XgnlqLaod0sJ3wwiKXdJQ=; b=0E6lQZS9zPkUt5xcP+4AMSa1H4NYJRIuU4bWqFMTzdbvL+uRMYXfuhwHxOIGyja/u1 0LiFUR2AM06a0Vnf9p6n1HwdZdxDOV15xV8f//fuc1jIVx8bcl0vpDbmGpDru/NtBu4h ivi6ZDNvISNA/Vm6BJBuvtPxiKjx8LNkbijxrby0qTkY6UDJY+XYg4E3np27WWdJfVqE Wp9q3ln9vEQpZXxjN58sUJCTJCvMaLFcDey/nsptyfPsxOdERxu+Aw63B9t9L7R02adf u8UM0O4GXVK56hn0aogtwTQOje6YdQrsvIcFPiyu8M82BeR7UaadCCXkmh5iswDy7eEK cYzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=arU82ZeX78CY4qS47DMaU2XgnlqLaod0sJ3wwiKXdJQ=; b=fB14+ZjqFllGv6twha7m2/q8MGhVOgbtCllMsGrAdCcKiAKKv32nezMjc7MsFjYoRZ JGSF33Rb3cW3fAE9zlj6hwC7SVg97JY7P83ixe1oB3fR/rrgmtUbkUUSteMmodwEweYI ojffuVI1u3jFDL4r5ym5Ni/NrF1hSbxNkRAiEYEJ6AFlAY1SGSFOCsMJavGEoJlMTFRn G/VvFyb3iyZHAn9lMXGeIPb9xe+EEeD+d3LLrUSt65eUnNPsbk3OdctwTqVwLgZsBBLH 4OiH4Deq3b9jaSy7MRSagTYn2wZrQ34ZFOQ0rLgehH31FcZ/1fn6p8c88i2Zjw3giqec ORYw== X-Gm-Message-State: AJcUukcKT7JzSlNQGPfD/5FZM6JGiAdtRMWJRe7wl/Z+SwJrMBQBPEdE TkP+SWjvGBedg3GzRcQ6pzFwLA== X-Received: by 2002:a7b:cb18:: with SMTP id u24mr10685287wmj.138.1547720604286; Thu, 17 Jan 2019 02:23:24 -0800 (PST) Received: from boomer.local ([2a01:e34:eeb6:4690:106b:bae3:31ed:7561]) by smtp.googlemail.com with ESMTPSA id u10sm66400530wrr.33.2019.01.17.02.23.22 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 17 Jan 2019 02:23:23 -0800 (PST) From: Jerome Brunet To: Linus Walleij , Kevin Hilman Cc: Jerome Brunet , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] dt-bindings: pinctrl: meson: update register descriptions Date: Thu, 17 Jan 2019 11:23:13 +0100 Message-Id: <20190117102315.1833-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190117102315.1833-1-jbrunet@baylibre.com> References: <20190117102315.1833-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org like pull-enable, pull should be optional has this region is available on every controllers. Also, the g12a feature a new region "ds" for the drive-strength All this region thing is one big mess. I suspect that there is only one big GPIO region with holes in it. All registers between the current regions reads '0' so it is probably just spare space to handle more pins. Since we need to continue to handle the existing controllers, switching to one single region now would not simplify things. However, if more organisation layouts and features keep on being added, we may have to look at this again Fixes: 3cd3c83f6752 ("pinctrl: Add compatibles for Amlogic Meson G12A pin controllers") Signed-off-by: Jerome Brunet --- .../devicetree/bindings/pinctrl/meson,pinctrl.txt | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) -- 2.20.1 diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt index 82ead40311f6..a47dd990a8d3 100644 --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt @@ -23,11 +23,11 @@ The GPIO bank for the controller is represented as a sub-node and it acts as a GPIO controller. Required properties for sub-nodes are: - - reg: should contain address and size for mux, pull-enable, pull and - gpio register sets - - reg-names: an array of strings describing the "reg" entries. Must - contain "mux", "pull" and "gpio". "pull-enable" is optional and - when it is missing the "pull" registers are used instead + - reg: should contain a list of address and size, one tuple for each entry + in reg-names. + - reg-names: an array of strings describing the "reg" entries. + Must contain "mux" and "gpio". + May contain "pull", "pull-enable" and "ds" when appropriate. - gpio-controller: identifies the node as a gpio controller - #gpio-cells: must be 2