From patchwork Mon Jun 20 20:12:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuogee Hsieh X-Patchwork-Id: 583323 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4ADEC43334 for ; Mon, 20 Jun 2022 20:15:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344789AbiFTUPi (ORCPT ); Mon, 20 Jun 2022 16:15:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50840 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344868AbiFTUPR (ORCPT ); Mon, 20 Jun 2022 16:15:17 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B262248FD; Mon, 20 Jun 2022 13:12:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1655755957; x=1687291957; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=8HeN6KRb40WyARPYQFZIyhT+SZNu5PP/+lWy1gK9aPI=; b=bnATxhjDWw/WUjs11zVMg4FAZ0FTgKzLmV3mXp7d5eWuUTM9zSfrmqP2 owIkk7VvSGi/gZtrVsl7ueM8L6F6fUg7dL1id/apmDE4sTJ2YdXFop67F dMzTVbcmwurfW9Z7LpkjWyTrtlBN5YVYb5GdqXQAY1vLZz+5O0JqOcoJ9 I=; Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-02.qualcomm.com with ESMTP; 20 Jun 2022 13:12:36 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg05-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2022 13:12:36 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 20 Jun 2022 13:12:36 -0700 Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 20 Jun 2022 13:12:35 -0700 From: Kuogee Hsieh To: , , , , , , , , , , CC: Kuogee Hsieh , , , , , , Subject: [PATCH v14 1/3] phy: qcom-edp: add regulator_set_load to edp phy Date: Mon, 20 Jun 2022 13:12:21 -0700 Message-ID: <1655755943-28594-2-git-send-email-quic_khsieh@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1655755943-28594-1-git-send-email-quic_khsieh@quicinc.com> References: <1655755943-28594-1-git-send-email-quic_khsieh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch add regulator_set_load() before enable regulator at eDP phy driver. Signed-off-by: Kuogee Hsieh Reviewed-by: Douglas Anderson --- drivers/phy/qualcomm/phy-qcom-edp.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c index cacd32f..7e357078 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -639,6 +639,18 @@ static int qcom_edp_phy_probe(struct platform_device *pdev) if (ret) return ret; + ret = regulator_set_load(edp->supplies[0].consumer, 21800); /* 1.2 V vdda-phy */ + if (ret) { + dev_err(dev, "failed to set load at %s\n", edp->supplies[0].supply); + return ret; + } + + ret = regulator_set_load(edp->supplies[1].consumer, 36000); /* 0.9 V vdda-pll */ + if (ret) { + dev_err(dev, "failed to set load at %s\n", edp->supplies[1].supply); + return ret; + } + ret = qcom_edp_clks_register(edp, pdev->dev.of_node); if (ret) return ret; From patchwork Mon Jun 20 20:12:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuogee Hsieh X-Patchwork-Id: 583322 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48CBFCCA481 for ; Mon, 20 Jun 2022 20:15:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245665AbiFTUPj (ORCPT ); Mon, 20 Jun 2022 16:15:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344911AbiFTUPS (ORCPT ); Mon, 20 Jun 2022 16:15:18 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4B802495A; Mon, 20 Jun 2022 13:12:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1655755960; x=1687291960; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=u81JIzQvO0xTa6hdCkqCi0NLpD6qYSGmTgJneLqSkv0=; b=kKT0Jutqn+qxmZcbMh0551Wk3Ht11Ow1NvUa726j6xhMpDyyRM0nH8xQ AFbQlnjAOGe5B5k6350isk6sDiBXGV4gNLvsevkOSaJOJb9YZ7H64mpZq CLtbO67yF92tb4/RQcagQ8+no3ics0hyvuRWRO1XWEcyeD2PiTKI2YTZY w=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-02.qualcomm.com with ESMTP; 20 Jun 2022 13:12:40 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg03-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2022 13:12:39 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 20 Jun 2022 13:12:39 -0700 Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 20 Jun 2022 13:12:38 -0700 From: Kuogee Hsieh To: , , , , , , , , , , CC: Kuogee Hsieh , , , , , , Subject: [PATCH v14 3/3] drm/msm/dp: delete vdda regulator related functions from eDP/DP controller Date: Mon, 20 Jun 2022 13:12:23 -0700 Message-ID: <1655755943-28594-4-git-send-email-quic_khsieh@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1655755943-28594-1-git-send-email-quic_khsieh@quicinc.com> References: <1655755943-28594-1-git-send-email-quic_khsieh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Vdda regulators are related to both eDP and DP phy so that it should be managed at eDP and DP phy driver instead of controller. This patch removes vdda regulators related functions out of eDP/DP controller. Signed-off-by: Kuogee Hsieh Reviewed-by: Stephen Boyd Reviewed-by: Dmitry Baryshkov Reviewed-by: Douglas Anderson --- drivers/gpu/drm/msm/dp/dp_parser.c | 14 ------ drivers/gpu/drm/msm/dp/dp_parser.h | 8 ---- drivers/gpu/drm/msm/dp/dp_power.c | 95 +------------------------------------- 3 files changed, 2 insertions(+), 115 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index 8f9fed9..4ef2130 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -22,14 +22,6 @@ #define DP_DEFAULT_P0_OFFSET 0x1000 #define DP_DEFAULT_P0_SIZE 0x0400 -static const struct dp_regulator_cfg sdm845_dp_reg_cfg = { - .num = 2, - .regs = { - {"vdda-1p2", 21800, 4 }, /* 1.2 V */ - {"vdda-0p9", 36000, 32 }, /* 0.9 V */ - }, -}; - static void __iomem *dp_ioremap(struct platform_device *pdev, int idx, size_t *len) { struct resource *res; @@ -298,12 +290,6 @@ static int dp_parser_parse(struct dp_parser *parser) if (rc) return rc; - /* Map the corresponding regulator information according to - * version. Currently, since we only have one supported platform, - * mapping the regulator directly. - */ - parser->regulator_cfg = &sdm845_dp_reg_cfg; - return 0; } diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index 3a4d797..47430e3 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -92,8 +92,6 @@ struct dp_pinctrl { struct pinctrl_state *state_suspend; }; -#define DP_DEV_REGULATOR_MAX 4 - /* Regulators for DP devices */ struct dp_reg_entry { char name[32]; @@ -101,11 +99,6 @@ struct dp_reg_entry { int disable_load; }; -struct dp_regulator_cfg { - int num; - struct dp_reg_entry regs[DP_DEV_REGULATOR_MAX]; -}; - /** * struct dp_parser - DP parser's data exposed to clients * @@ -121,7 +114,6 @@ struct dp_parser { struct dp_pinctrl pinctrl; struct dp_io io; struct dp_display_data disp_data; - const struct dp_regulator_cfg *regulator_cfg; u32 max_dp_lanes; struct drm_bridge *next_bridge; diff --git a/drivers/gpu/drm/msm/dp/dp_power.c b/drivers/gpu/drm/msm/dp/dp_power.c index d9e0117..b52ac1d 100644 --- a/drivers/gpu/drm/msm/dp/dp_power.c +++ b/drivers/gpu/drm/msm/dp/dp_power.c @@ -20,82 +20,10 @@ struct dp_power_private { struct clk *link_clk_src; struct clk *pixel_provider; struct clk *link_provider; - struct regulator_bulk_data supplies[DP_DEV_REGULATOR_MAX]; struct dp_power dp_power; }; -static void dp_power_regulator_disable(struct dp_power_private *power) -{ - struct regulator_bulk_data *s = power->supplies; - const struct dp_reg_entry *regs = power->parser->regulator_cfg->regs; - int num = power->parser->regulator_cfg->num; - int i; - - DBG(""); - for (i = num - 1; i >= 0; i--) - if (regs[i].disable_load >= 0) - regulator_set_load(s[i].consumer, - regs[i].disable_load); - - regulator_bulk_disable(num, s); -} - -static int dp_power_regulator_enable(struct dp_power_private *power) -{ - struct regulator_bulk_data *s = power->supplies; - const struct dp_reg_entry *regs = power->parser->regulator_cfg->regs; - int num = power->parser->regulator_cfg->num; - int ret, i; - - DBG(""); - for (i = 0; i < num; i++) { - if (regs[i].enable_load >= 0) { - ret = regulator_set_load(s[i].consumer, - regs[i].enable_load); - if (ret < 0) { - pr_err("regulator %d set op mode failed, %d\n", - i, ret); - goto fail; - } - } - } - - ret = regulator_bulk_enable(num, s); - if (ret < 0) { - pr_err("regulator enable failed, %d\n", ret); - goto fail; - } - - return 0; - -fail: - for (i--; i >= 0; i--) - regulator_set_load(s[i].consumer, regs[i].disable_load); - return ret; -} - -static int dp_power_regulator_init(struct dp_power_private *power) -{ - struct regulator_bulk_data *s = power->supplies; - const struct dp_reg_entry *regs = power->parser->regulator_cfg->regs; - struct platform_device *pdev = power->pdev; - int num = power->parser->regulator_cfg->num; - int i, ret; - - for (i = 0; i < num; i++) - s[i].supply = regs[i].name; - - ret = devm_regulator_bulk_get(&pdev->dev, num, s); - if (ret < 0) { - pr_err("%s: failed to init regulator, ret=%d\n", - __func__, ret); - return ret; - } - - return 0; -} - static int dp_power_clk_init(struct dp_power_private *power) { int rc = 0; @@ -318,21 +246,10 @@ int dp_power_client_init(struct dp_power *dp_power) pm_runtime_enable(&power->pdev->dev); - rc = dp_power_regulator_init(power); - if (rc) { - DRM_ERROR("failed to init regulators %d\n", rc); - goto error; - } - rc = dp_power_clk_init(power); - if (rc) { + if (rc) DRM_ERROR("failed to init clocks %d\n", rc); - goto error; - } - return 0; -error: - pm_runtime_disable(&power->pdev->dev); return rc; } @@ -365,22 +282,15 @@ int dp_power_init(struct dp_power *dp_power, bool flip) power = container_of(dp_power, struct dp_power_private, dp_power); pm_runtime_get_sync(&power->pdev->dev); - rc = dp_power_regulator_enable(power); - if (rc) { - DRM_ERROR("failed to enable regulators, %d\n", rc); - goto exit; - } rc = dp_power_clk_enable(dp_power, DP_CORE_PM, true); if (rc) { DRM_ERROR("failed to enable DP core clocks, %d\n", rc); - goto err_clk; + goto exit; } return 0; -err_clk: - dp_power_regulator_disable(power); exit: pm_runtime_put_sync(&power->pdev->dev); return rc; @@ -393,7 +303,6 @@ int dp_power_deinit(struct dp_power *dp_power) power = container_of(dp_power, struct dp_power_private, dp_power); dp_power_clk_enable(dp_power, DP_CORE_PM, false); - dp_power_regulator_disable(power); pm_runtime_put_sync(&power->pdev->dev); return 0; }