From patchwork Sun Jun 19 21:25:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 583044 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05ABFCCA47A for ; Sun, 19 Jun 2022 21:25:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236345AbiFSVZ5 (ORCPT ); Sun, 19 Jun 2022 17:25:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235090AbiFSVZz (ORCPT ); Sun, 19 Jun 2022 17:25:55 -0400 Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AC184AE40 for ; Sun, 19 Jun 2022 14:25:54 -0700 (PDT) Received: by mail-lj1-x231.google.com with SMTP id s10so9927536ljh.12 for ; Sun, 19 Jun 2022 14:25:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yPj7GOpWp1DSXI8ysjZP1E1qF++Mm4LPpAM6Pwa9fAw=; b=eELOzUWaYIB24DqAip66PpDuAeimY9mn2gXhrspneQI6clam/DiBL5D1revRnmKglc gANfJ8HGC5sUe8Nu+aZ7UdE/MGEGAUlGZ7WQqTjoHevWJOcvmKW9zlnO8ho8jcnxZ+4V YVaUoT4yOpQZAG7W+hBVEgeqViJy64X6v2XCJY/J//DAyef7xbOU8SpPW1QZj/REnGQw aAxGo0Y7WKVL/xXF8AA/6Xtxm6dgnkFMU1AIBCngthcPzTb+/gPTnL985UdQrChVJ01T quz/bl3GRdVQTzQdTqKmNls6sBRP0egqgsLU5A4gnBQo0wcSDrYkxP36BpubXOBPd8oh TNUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yPj7GOpWp1DSXI8ysjZP1E1qF++Mm4LPpAM6Pwa9fAw=; b=W1C1sBOXX51Yi/6BqfFa9ZR19hJ/NcVT6e9+q6X7eEdrmYARY5neGtBSNL/cG5qX7B Ef6xodHJqWwacNuIBVnS53LmyQUdUDMrh6QI3jTzz0rwbKk1oth49/5SZdENHPDyVd+L epqc/Av4rinqyBgRMc+CpulqtByihs08QApo9CQQv9Rnm8wQQICwSde68U1QZNCsF2Sf /BnpVY5gipWEXRrAy97LgtFPEog4kOvcuhG32c4a8csV5kPubk8Ky6fzq48O8kfR/pRq 3ixTX1iDnbeoS7aIXGchKFo+B3pf5A87seYDy6bCtJrZlViYD5KP4IZJ7niMQIP6yX7w D8IQ== X-Gm-Message-State: AJIora/zSTJEcwRERsnZiEAeCsQFOxBv/YQ+kYir9qiklfy4AcP735aE MW0jmeil59ZHsapagzYb/bc8XQ== X-Google-Smtp-Source: AGRyM1uGeIBHjqrCAlcPO8ZDoRc7CEEfeeyqFPuE+xqRAlBqRELPnhL51jjTUbub7fHO9zQ3oOq9UA== X-Received: by 2002:a2e:b0ce:0:b0:25a:6ad3:1ee7 with SMTP id g14-20020a2eb0ce000000b0025a6ad31ee7mr2235556ljl.1.1655673952967; Sun, 19 Jun 2022 14:25:52 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u3-20020ac258c3000000b00478de10cf5esm626866lfo.247.2022.06.19.14.25.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jun 2022 14:25:51 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten , Konrad Dybcio Subject: [PATCH v2 2/7] dt-bindings: clock: separate bindings for MSM8916 GCC device Date: Mon, 20 Jun 2022 00:25:44 +0300 Message-Id: <20220619212549.1240891-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220619212549.1240891-1-dmitry.baryshkov@linaro.org> References: <20220619212549.1240891-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Separate bindings for GCC on Qualcomm MSM8916 platforms. This adds new clocks/clock-names properties to be used for clock links. Signed-off-by: Dmitry Baryshkov --- .../bindings/clock/qcom,gcc-msm8916.yaml | 61 +++++++++++++++++++ .../bindings/clock/qcom,gcc-other.yaml | 1 - 2 files changed, 61 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml new file mode 100644 index 000000000000..564aa764b17b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8916.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for MSM8916 + +maintainers: + - Stephen Boyd + - Taniya Das + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on MSM8916. + + See also: + - dt-bindings/clock/qcom,gcc-msm8916.h + +properties: + compatible: + const: qcom,gcc-msm8916 + + clocks: + items: + - description: XO source + - description: Sleep clock source + - description: DSI phy instance 0 dsi clock + - description: DSI phy instance 0 byte clock + - description: External MCLK clock + - description: External Primary I2S clock + - description: External Secondary I2S clock + + clock-names: + items: + - const: xo + - const: sleep_clk + - const: dsi0pll + - const: dsi0pllbyte + - const: ext_mclk + - const: ext_pri_i2s + - const: ext_sec_i2s + +required: + - compatible + +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false + +examples: + - | + clock-controller@300000 { + compatible = "qcom,gcc-msm8916"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + reg = <0x300000 0x90000>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml index 6c78df0c46a9..61b90e836b5b 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml @@ -41,7 +41,6 @@ properties: - qcom,gcc-mdm9607 - qcom,gcc-msm8226 - qcom,gcc-msm8660 - - qcom,gcc-msm8916 - qcom,gcc-msm8939 - qcom,gcc-msm8953 - qcom,gcc-msm8974 From patchwork Sun Jun 19 21:25:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 583042 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85820CCA488 for ; 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Sun, 19 Jun 2022 14:25:56 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten , Konrad Dybcio Subject: [PATCH v2 5/7] clk: qcom: gcc-msm8916: move gcc_mss_q6_bimc_axi_clk down Date: Mon, 20 Jun 2022 00:25:47 +0300 Message-Id: <20220619212549.1240891-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220619212549.1240891-1-dmitry.baryshkov@linaro.org> References: <20220619212549.1240891-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The gcc_mss_q6_bimc_axi_clk clock depends on the bimc_ddr_clk_src clock. Move it down in the file to come after the source clock. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/clk/qcom/gcc-msm8916.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c index 7962edbdbcf6..4d726ca4b0da 100644 --- a/drivers/clk/qcom/gcc-msm8916.c +++ b/drivers/clk/qcom/gcc-msm8916.c @@ -2594,23 +2594,6 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = { }, }; -static struct clk_branch gcc_mss_q6_bimc_axi_clk = { - .halt_reg = 0x49004, - .clkr = { - .enable_reg = 0x49004, - .enable_mask = BIT(0), - .hw.init = &(struct clk_init_data){ - .name = "gcc_mss_q6_bimc_axi_clk", - .parent_names = (const char *[]){ - "bimc_ddr_clk_src", - }, - .num_parents = 1, - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_oxili_ahb_clk = { .halt_reg = 0x59028, .clkr = { @@ -2860,6 +2843,23 @@ static struct clk_branch gcc_bimc_gpu_clk = { }, }; +static struct clk_branch gcc_mss_q6_bimc_axi_clk = { + .halt_reg = 0x49004, + .clkr = { + .enable_reg = 0x49004, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_q6_bimc_axi_clk", + .parent_names = (const char *[]){ + "bimc_ddr_clk_src", + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_jpeg_tbu_clk = { .halt_reg = 0x12034, .clkr = { From patchwork Sun Jun 19 21:25:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 583043 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73A3ACCA47E for ; Sun, 19 Jun 2022 21:26:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237328AbiFSV0C (ORCPT ); Sun, 19 Jun 2022 17:26:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237288AbiFSV0A (ORCPT ); Sun, 19 Jun 2022 17:26:00 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41BEF656B for ; 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Sun, 19 Jun 2022 14:25:58 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u3-20020ac258c3000000b00478de10cf5esm626866lfo.247.2022.06.19.14.25.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jun 2022 14:25:58 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten , Konrad Dybcio Subject: [PATCH v2 7/7] arm64: dts: qcom: msm8916: add clocks to the GCC device node Date: Mon, 20 Jun 2022 00:25:49 +0300 Message-Id: <20220619212549.1240891-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220619212549.1240891-1-dmitry.baryshkov@linaro.org> References: <20220619212549.1240891-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org As we are converting this platform to use DT clock bindings, add clocks and clock-names properties to the MMCC device tree node. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 05472510e29d..e905415b3456 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -934,6 +934,20 @@ gcc: clock-controller@1800000 { #reset-cells = <1>; #power-domain-cells = <1>; reg = <0x01800000 0x80000>; + clocks = <&rpmcc RPM_SMD_BB_CLK1_PIN>, + <&sleep_clk>, + <&dsi_phy0 1>, + <&dsi_phy0 0>, + <0>, + <0>, + <0>; + clock-names = "xo", + "sleep_clk", + "dsi0pll", + "dsi0pllbyte", + "ext_mclk", + "ext_pri_i2s", + "ext_sec_i2s"; }; tcsr_mutex: hwlock@1905000 {