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([2602:47:d49e:3c01:848a:b814:8a9c:88d6]) by smtp.gmail.com with ESMTPSA id s17-20020a17090a5d1100b001e0d4169365sm7790724pji.17.2022.06.18.17.15.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Jun 2022 17:15:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH 1/2] target/arm: Extend arm_pamax to more than aarch64 Date: Sat, 18 Jun 2022 17:15:40 -0700 Message-Id: <20220619001541.131672-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220619001541.131672-1-richard.henderson@linaro.org> References: <20220619001541.131672-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Move the code from hw/arm/virt.c that is supposed to handle v7 into the one function. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- hw/arm/virt.c | 10 +--------- target/arm/ptw.c | 24 ++++++++++++++++-------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 097238faa7..5502aa60c8 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2010,15 +2010,7 @@ static void machvirt_init(MachineState *machine) cpuobj = object_new(possible_cpus->cpus[0].type); armcpu = ARM_CPU(cpuobj); - if (object_property_get_bool(cpuobj, "aarch64", NULL)) { - pa_bits = arm_pamax(armcpu); - } else if (arm_feature(&armcpu->env, ARM_FEATURE_LPAE)) { - /* v7 with LPAE */ - pa_bits = 40; - } else { - /* Anything else */ - pa_bits = 32; - } + pa_bits = arm_pamax(armcpu); object_unref(cpuobj); diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 4d97a24808..07f7a21861 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -36,15 +36,23 @@ static const uint8_t pamax_map[] = { /* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */ unsigned int arm_pamax(ARMCPU *cpu) { - unsigned int parange = - FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); + if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { + unsigned int parange = + FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); - /* - * id_aa64mmfr0 is a read-only register so values outside of the - * supported mappings can be considered an implementation error. - */ - assert(parange < ARRAY_SIZE(pamax_map)); - return pamax_map[parange]; + /* + * id_aa64mmfr0 is a read-only register so values outside of the + * supported mappings can be considered an implementation error. + */ + assert(parange < ARRAY_SIZE(pamax_map)); + return pamax_map[parange]; + } + if (arm_feature(&cpu->env, ARM_FEATURE_LPAE)) { + /* v7 with LPAE */ + return 40; + } + /* Anything else */ + return 32; } /* From patchwork Sun Jun 19 00:15:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 582989 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:7814:0:0:0:0 with SMTP id b20csp622813mav; Sat, 18 Jun 2022 17:17:29 -0700 (PDT) X-Google-Smtp-Source: AGRyM1v+GSzGVdHRCow8+e52aX5DHUYt1kZvgyfHihW8il7iayELvDgNLxZCNf98ZeTwM3qcOFqP X-Received: by 2002:a05:622a:1715:b0:304:f325:5562 with SMTP id h21-20020a05622a171500b00304f3255562mr14224787qtk.573.1655597849145; Sat, 18 Jun 2022 17:17:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655597849; cv=none; d=google.com; s=arc-20160816; b=n32fguzObKOwPL2kDTXTuK7XDlq9fFvgCI1zeJhOkTHbn1UArPOIQ3GFUbhjfiMKnw L891HytY1LE0/s3uWjWTWJd30L6HfrFdgxKaIeRyiteeWuu5aVzAg8KI9rZmnuRoczQQ PGDeNz8FsZxrEKC8yNCQHEccWfbZ7iof/45FelIohR7jB6hOFUbqtDakCDeiQu3DGBI6 xkQc2PgIVMC2wdL95UwSgjTPgwwoGKux58suFA5E0z4cEzzjeSmWCtH0KlpiZB/gj6qv 7+rza4mi+vrZhIZCBWzbA53M6NRMcay3GYHHbMXw3klFdm56t8CUWta05DLEk5Kqd3IL lDtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cQ3LSmMq/PEbxO4xqtFc8lNO19/pPJ0Q5K0mnc2j/gw=; b=ebKp4GWWgrX13YEr2prwla9Uw4MmLBr+y6SXkxHLn+ggj0MPCqgzaxl096ygaRQQmX wbjoTFwvQuXGQfObTFLDL9/d5gOtfJVFqk1XsW3J91P7D23ak6CMi8KeZDEmMizDm4n1 W0BrVKiPDRer1oqO7oKzS910DRsfVz4LTbKCADyEoLQWsNd8kv6Npb1selSHkg5d1umU MPGGGjzXKAeYdQSVapLi4Vgro5iWO+D38hSv18SQAqqpxPhpy0STfXFImV3pqUj0THL2 SmufSZVYkuLYkEnPwPBKkn9BdWvOUVPhqSDFfFHVRBwn7I1uH2VAx90mKK0ljFxqoGsc WXDw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aSH7Eh6d; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2602:47:d49e:3c01:848a:b814:8a9c:88d6]) by smtp.gmail.com with ESMTPSA id s17-20020a17090a5d1100b001e0d4169365sm7790724pji.17.2022.06.18.17.15.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Jun 2022 17:15:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH 2/2] target/arm: Check V7VE as well as LPAE in arm_pamax Date: Sat, 18 Jun 2022 17:15:41 -0700 Message-Id: <20220619001541.131672-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220619001541.131672-1-richard.henderson@linaro.org> References: <20220619001541.131672-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" In machvirt_init we create a cpu but do not fully initialize it. Thus the propagation of V7VE to LPAE has not been done, and we compute the wrong value for some v7 cpus, e.g. cortex-a15. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1078 Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/ptw.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 07f7a21861..da478104f0 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -47,7 +47,13 @@ unsigned int arm_pamax(ARMCPU *cpu) assert(parange < ARRAY_SIZE(pamax_map)); return pamax_map[parange]; } - if (arm_feature(&cpu->env, ARM_FEATURE_LPAE)) { + + /* + * In machvirt_init, we call arm_pamax on a cpu that is not fully + * initialized, so we can't rely on the propagation done in realize. + */ + if (arm_feature(&cpu->env, ARM_FEATURE_LPAE) || + arm_feature(&cpu->env, ARM_FEATURE_V7VE)) { /* v7 with LPAE */ return 40; }