From patchwork Thu Jun 16 01:37:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Frank Zago X-Patchwork-Id: 582867 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47773C43334 for ; Thu, 16 Jun 2022 01:38:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350296AbiFPBiE (ORCPT ); Wed, 15 Jun 2022 21:38:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43092 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350809AbiFPBiC (ORCPT ); Wed, 15 Jun 2022 21:38:02 -0400 Received: from relay12.mail.gandi.net (relay12.mail.gandi.net [217.70.178.232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2DB9B50451; Wed, 15 Jun 2022 18:38:01 -0700 (PDT) Received: (Authenticated sender: frank@zago.net) by mail.gandi.net (Postfix) with ESMTPSA id EE077200003; Thu, 16 Jun 2022 01:37:56 +0000 (UTC) From: frank zago To: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Bartosz Golaszewski , Wolfram Sang , Johan Hovold , linux-usb@vger.kernel.org, Lee Jones , Linus Walleij , linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, frank zago Subject: [PATCH v6 1/4] mfd: ch341: add core driver for the WCH CH341 in I2C/SPI/GPIO mode Date: Wed, 15 Jun 2022 20:37:44 -0500 Message-Id: <20220616013747.126051-2-frank@zago.net> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220616013747.126051-1-frank@zago.net> References: <20220616013747.126051-1-frank@zago.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The CH341 is a multifunction chip, presenting 3 different USB PID. One of these functions is for I2C/SPI/GPIO. This new set of drivers will manage I2C and GPIO. Signed-off-by: frank zago --- MAINTAINERS | 7 +++ drivers/mfd/Kconfig | 10 +++++ drivers/mfd/Makefile | 1 + drivers/mfd/ch341-core.c | 90 +++++++++++++++++++++++++++++++++++++++ include/linux/mfd/ch341.h | 18 ++++++++ 5 files changed, 126 insertions(+) create mode 100644 drivers/mfd/ch341-core.c create mode 100644 include/linux/mfd/ch341.h diff --git a/MAINTAINERS b/MAINTAINERS index 43d3d07afccd..628eeaa9bf68 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21475,6 +21475,13 @@ M: David Härdeman S: Maintained F: drivers/media/rc/winbond-cir.c +WINCHIPHEAD CH341 I2C/GPIO MFD DRIVER +M: Frank Zago +L: linux-usb@vger.kernel.org +S: Maintained +F: drivers/mfd/ch341-core.c +F: include/linux/mfd/ch341.h + WINSYSTEMS EBC-C384 WATCHDOG DRIVER M: William Breathitt Gray L: linux-watchdog@vger.kernel.org diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 3b59456f5545..893acc821a42 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1784,6 +1784,16 @@ config MFD_LOCHNAGAR help Support for Cirrus Logic Lochnagar audio development board. +config MFD_CH341 + tristate "WinChipHead CH341 in I2C/SPI/GPIO mode" + depends on USB + help + If you say yes to this option, support for the CH341 series + of chips, running in I2C/SPI/GPIO mode will be included. + + This driver can also be built as a module. If so, the + module will be called ch341-core. + config MFD_ARIZONA select REGMAP select REGMAP_IRQ diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 858cacf659d6..fd615ab3929f 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_MFD_ASIC3) += asic3.o tmio_core.o obj-$(CONFIG_ARCH_BCM2835) += bcm2835-pm.o obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o obj-$(CONFIG_MFD_BD9571MWV) += bd9571mwv.o +obj-$(CONFIG_MFD_CH341) += ch341-core.o obj-$(CONFIG_MFD_CROS_EC_DEV) += cros_ec_dev.o obj-$(CONFIG_MFD_ENE_KB3930) += ene-kb3930.o obj-$(CONFIG_MFD_EXYNOS_LPASS) += exynos-lpass.o diff --git a/drivers/mfd/ch341-core.c b/drivers/mfd/ch341-core.c new file mode 100644 index 000000000000..f08a67dd6074 --- /dev/null +++ b/drivers/mfd/ch341-core.c @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Core driver for the CH341A, CH341B and CH341T in I2C/SPI/GPIO + * mode. There are cell drivers available for I2C and GPIO. SPI is not + * yet supported. + * + * Copyright 2022, Frank Zago + * Copyright (c) 2017 Gunar Schorcht (gunar@schorcht.net) + * Copyright (c) 2016 Tse Lun Bien + * Copyright (c) 2014 Marco Gittler + * Copyright (c) 2006-2007 Till Harbaum (Till@Harbaum.org) + */ + +#include +#include +#include +#include +#include +#include + +static const struct mfd_cell ch341_devs[] = { + { + .name = "ch341-gpio", + }, + { + .name = "ch341-i2c", + }, +}; + +static int ch341_usb_probe(struct usb_interface *iface, + const struct usb_device_id *usb_id) +{ + struct usb_endpoint_descriptor *bulk_out; + struct usb_endpoint_descriptor *bulk_in; + struct usb_endpoint_descriptor *intr_in; + struct ch341_ddata *ddata; + int ret; + + ddata = devm_kzalloc(&iface->dev, sizeof(*ddata), GFP_KERNEL); + if (!ddata) + return -ENOMEM; + + ddata->usb_dev = interface_to_usbdev(iface); + mutex_init(&ddata->usb_lock); + + ret = usb_find_common_endpoints(iface->cur_altsetting, &bulk_in, + &bulk_out, &intr_in, NULL); + if (ret) { + dev_err(&iface->dev, "Could not find all endpoints\n"); + return -ENODEV; + } + + ddata->ep_in = bulk_in->bEndpointAddress; + ddata->ep_out = bulk_out->bEndpointAddress; + ddata->ep_intr = intr_in->bEndpointAddress; + ddata->ep_intr_interval = intr_in->bInterval; + + usb_set_intfdata(iface, ddata); + + ret = mfd_add_devices(&iface->dev, PLATFORM_DEVID_AUTO, ch341_devs, + ARRAY_SIZE(ch341_devs), NULL, 0, NULL); + if (ret) + return dev_err_probe(&iface->dev, ret, + "Failed to register child devices\n"); + + return 0; +} + +static void ch341_usb_disconnect(struct usb_interface *usb_if) +{ + mfd_remove_devices(&usb_if->dev); +} + +static const struct usb_device_id ch341_usb_table[] = { + { USB_DEVICE(0x1a86, 0x5512) }, + { } +}; +MODULE_DEVICE_TABLE(usb, ch341_usb_table); + +static struct usb_driver ch341_usb_driver = { + .name = "ch341-mfd", + .id_table = ch341_usb_table, + .probe = ch341_usb_probe, + .disconnect = ch341_usb_disconnect, +}; +module_usb_driver(ch341_usb_driver); + +MODULE_AUTHOR("Frank Zago "); +MODULE_DESCRIPTION("CH341 USB to I2C/SPI/GPIO adapter"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/ch341.h b/include/linux/mfd/ch341.h new file mode 100644 index 000000000000..44f5da0720bd --- /dev/null +++ b/include/linux/mfd/ch341.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Definitions for the CH341 driver */ + +#include +#include + +struct usb_device; +struct usb_interface; + +struct ch341_ddata { + struct usb_device *usb_dev; + struct mutex usb_lock; + + int ep_in; + int ep_out; + int ep_intr; + u8 ep_intr_interval; +}; From patchwork Thu Jun 16 01:37:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Zago X-Patchwork-Id: 582391 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D916C433EF for ; Thu, 16 Jun 2022 01:38:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357523AbiFPBiM (ORCPT ); Wed, 15 Jun 2022 21:38:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357147AbiFPBiI (ORCPT ); Wed, 15 Jun 2022 21:38:08 -0400 Received: from relay12.mail.gandi.net (relay12.mail.gandi.net [IPv6:2001:4b98:dc4:8::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F56D56C10; Wed, 15 Jun 2022 18:38:05 -0700 (PDT) Received: (Authenticated sender: frank@zago.net) by mail.gandi.net (Postfix) with ESMTPSA id 51A41200004; Thu, 16 Jun 2022 01:38:00 +0000 (UTC) From: frank zago To: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Bartosz Golaszewski , Wolfram Sang , Johan Hovold , linux-usb@vger.kernel.org, Lee Jones , Linus Walleij , linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, frank zago Subject: [PATCH v6 2/4] gpio: ch341: add GPIO MFD cell driver for the CH341 Date: Wed, 15 Jun 2022 20:37:45 -0500 Message-Id: <20220616013747.126051-3-frank@zago.net> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220616013747.126051-1-frank@zago.net> References: <20220616013747.126051-1-frank@zago.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The GPIO interface offers 16 GPIOs. 6 are read/write, and 10 are read-only. Signed-off-by: frank zago Acked-by: Linus Walleij --- MAINTAINERS | 1 + drivers/gpio/Kconfig | 10 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-ch341.c | 385 ++++++++++++++++++++++++++++++++++++++ include/linux/mfd/ch341.h | 8 + 5 files changed, 405 insertions(+) create mode 100644 drivers/gpio/gpio-ch341.c diff --git a/MAINTAINERS b/MAINTAINERS index 628eeaa9bf68..8b93f6192704 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21479,6 +21479,7 @@ WINCHIPHEAD CH341 I2C/GPIO MFD DRIVER M: Frank Zago L: linux-usb@vger.kernel.org S: Maintained +F: drivers/gpio/gpio-ch341.c F: drivers/mfd/ch341-core.c F: include/linux/mfd/ch341.h diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index b01961999ced..473b6e7226ca 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1653,6 +1653,16 @@ endmenu menu "USB GPIO expanders" depends on USB +config GPIO_CH341 + tristate "CH341 USB to GPIO support" + select MFD_CH341 + help + If you say yes to this option, GPIO support will be included for the + WCH CH341, a USB to I2C/SPI/GPIO interface. + + This driver can also be built as a module. If so, the module + will be called gpio-ch341. + config GPIO_VIPERBOARD tristate "Viperboard GPIO a & b support" depends on MFD_VIPERBOARD diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 14352f6dfe8e..beef802cbfb1 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -44,6 +44,7 @@ obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o obj-$(CONFIG_GPIO_CADENCE) += gpio-cadence.o +obj-$(CONFIG_GPIO_CH341) += gpio-ch341.o obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o obj-$(CONFIG_GPIO_SNPS_CREG) += gpio-creg-snps.o obj-$(CONFIG_GPIO_CRYSTAL_COVE) += gpio-crystalcove.o diff --git a/drivers/gpio/gpio-ch341.c b/drivers/gpio/gpio-ch341.c new file mode 100644 index 000000000000..233dfe1f2ae8 --- /dev/null +++ b/drivers/gpio/gpio-ch341.c @@ -0,0 +1,385 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * GPIO cell driver for the CH341A and CH341B chips. + * + * Copyright 2022, Frank Zago + * Copyright (c) 2017 Gunar Schorcht (gunar@schorcht.net) + * Copyright (c) 2016 Tse Lun Bien + * Copyright (c) 2014 Marco Gittler + * Copyright (c) 2006-2007 Till Harbaum (Till@Harbaum.org) + */ + +/* + * Notes. + * + * For the CH341, 0=IN, 1=OUT, but for the GPIO subsystem, 1=IN and + * 0=OUT. Translation happens in a couple places. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define CH341_GPIO_NUM_PINS 16 /* Number of GPIO pins */ + +/* GPIO chip commands */ +#define CH341_PARA_CMD_STS 0xA0 /* Get pins status */ +#define CH341_CMD_UIO_STREAM 0xAB /* pin IO stream command */ + +#define CH341_CMD_UIO_STM_OUT 0x80 /* pin IO interface OUT command (D0~D5) */ +#define CH341_CMD_UIO_STM_DIR 0x40 /* pin IO interface DIR command (D0~D5) */ +#define CH341_CMD_UIO_STM_END 0x20 /* pin IO interface END command */ + +#define CH341_USB_MAX_INTR_SIZE 8 + +struct ch341_gpio { + struct gpio_chip gpio; + struct mutex gpio_lock; + u16 gpio_dir; /* 1 bit per pin, 0=IN, 1=OUT. */ + u16 gpio_last_read; /* last GPIO values read */ + u16 gpio_last_written; /* last GPIO values written */ + union { + u8 gpio_buf[SEG_SIZE]; + __le16 gpio_buf_status; + }; + + struct urb *irq_urb; + struct usb_anchor irq_urb_out; + u8 irq_buf[CH341_USB_MAX_INTR_SIZE]; + struct irq_chip irq_chip; + + struct ch341_ddata *ddata; +}; + +/* + * Masks to describe the 16 GPIOs. Pins D0 to D5 (mapped to GPIOs 0 to + * 5) can do input/output, but the other pins are input-only. + */ +static const u16 pin_can_output = 0b111111; + +/* Only GPIO 10 (INT# line) has hardware interrupt */ +#define CH341_GPIO_INT_LINE 10 + +/* Send a command and get a reply if requested */ +static int gpio_transfer(struct ch341_gpio *dev, int out_len, int in_len) +{ + struct ch341_ddata *ddata = dev->ddata; + int actual; + int ret; + + mutex_lock(&ddata->usb_lock); + + ret = usb_bulk_msg(ddata->usb_dev, + usb_sndbulkpipe(ddata->usb_dev, ddata->ep_out), + dev->gpio_buf, out_len, + &actual, DEFAULT_TIMEOUT_MS); + if (ret < 0) + goto out_unlock; + + if (in_len == 0) + goto out_unlock; + + ret = usb_bulk_msg(ddata->usb_dev, + usb_rcvbulkpipe(ddata->usb_dev, ddata->ep_in), + dev->gpio_buf, SEG_SIZE, &actual, DEFAULT_TIMEOUT_MS); + +out_unlock: + mutex_unlock(&ddata->usb_lock); + + if (ret < 0) + return ret; + + return actual; +} + +/* Read the GPIO line status. */ +static int read_inputs(struct ch341_gpio *dev) +{ + int ret; + + mutex_lock(&dev->gpio_lock); + + dev->gpio_buf[0] = CH341_PARA_CMD_STS; + + ret = gpio_transfer(dev, 1, 1); + + /* + * The status command returns 6 bytes of data. Byte 0 has + * status for lines 0 to 7, and byte 1 is lines 8 to 15. The + * 3rd has the status for the SCL/SDA/SCK pins. The 4th byte + * might have some remaining pin status. Byte 5 and 6 content + * is unknown. + */ + if (ret == 6) + dev->gpio_last_read = le16_to_cpu(dev->gpio_buf_status); + else + ret = -EIO; + + mutex_unlock(&dev->gpio_lock); + + if (ret < 0) + return ret; + + return 0; +} + +static int ch341_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct ch341_gpio *dev = gpiochip_get_data(chip); + int ret; + + ret = read_inputs(dev); + if (ret) + return ret; + + return !!(dev->gpio_last_read & BIT(offset)); +} + +static int ch341_gpio_get_multiple(struct gpio_chip *chip, + unsigned long *mask, unsigned long *bits) +{ + struct ch341_gpio *dev = gpiochip_get_data(chip); + int ret; + + ret = read_inputs(dev); + if (ret) + return ret; + + *bits = dev->gpio_last_read & *mask; + + return 0; +} + +static void write_outputs(struct ch341_gpio *dev) +{ + mutex_lock(&dev->gpio_lock); + + /* Only the first 6 lines can output. */ + dev->gpio_buf[0] = CH341_CMD_UIO_STREAM; + dev->gpio_buf[1] = CH341_CMD_UIO_STM_DIR | (dev->gpio_dir & pin_can_output); + dev->gpio_buf[2] = CH341_CMD_UIO_STM_OUT | + (dev->gpio_last_written & dev->gpio_dir & pin_can_output); + dev->gpio_buf[3] = CH341_CMD_UIO_STM_END; + + gpio_transfer(dev, 4, 0); + + mutex_unlock(&dev->gpio_lock); +} + +static void ch341_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) +{ + struct ch341_gpio *dev = gpiochip_get_data(chip); + + if (value) + dev->gpio_last_written |= BIT(offset); + else + dev->gpio_last_written &= ~BIT(offset); + + write_outputs(dev); +} + +static void ch341_gpio_set_multiple(struct gpio_chip *chip, + unsigned long *mask, unsigned long *bits) +{ + struct ch341_gpio *dev = gpiochip_get_data(chip); + + dev->gpio_last_written = (dev->gpio_last_written & ~*mask) | (*bits & *mask); + + write_outputs(dev); +} + +static int ch341_gpio_get_direction(struct gpio_chip *chip, + unsigned int offset) +{ + struct ch341_gpio *dev = gpiochip_get_data(chip); + + return !(dev->gpio_dir & BIT(offset)); +} + +static int ch341_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + struct ch341_gpio *dev = gpiochip_get_data(chip); + + dev->gpio_dir &= ~BIT(offset); + + write_outputs(dev); + + return 0; +} + +static int ch341_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct ch341_gpio *dev = gpiochip_get_data(chip); + u16 mask = BIT(offset); + + if (!(pin_can_output & mask)) + return -EINVAL; + + dev->gpio_dir |= mask; + + ch341_gpio_set(chip, offset, value); + + return 0; +} + +static void ch341_complete_intr_urb(struct urb *urb) +{ + struct ch341_gpio *dev = urb->context; + int ret; + + if (urb->status) { + usb_unanchor_urb(dev->irq_urb); + } else { + /* + * Data is 8 bytes. Byte 0 might be the length of + * significant data, which is 3 more bytes. Bytes 1 + * and 2, and possibly 3, are the pin status. The byte + * order is different than for the GET_STATUS + * command. Byte 1 is GPIOs 8 to 15, and byte 2 is + * GPIOs 0 to 7. + */ + + handle_nested_irq(irq_find_mapping(dev->gpio.irq.domain, + CH341_GPIO_INT_LINE)); + + ret = usb_submit_urb(dev->irq_urb, GFP_ATOMIC); + if (ret) + usb_unanchor_urb(dev->irq_urb); + } +} + +static int ch341_gpio_irq_set_type(struct irq_data *data, unsigned int flow_type) +{ + const unsigned long offset = irqd_to_hwirq(data); + + if (offset != CH341_GPIO_INT_LINE || flow_type != IRQ_TYPE_EDGE_RISING) + return -EINVAL; + + return 0; +} + +static void ch341_gpio_irq_enable(struct irq_data *data) +{ + struct ch341_gpio *dev = irq_data_get_irq_chip_data(data); + int ret; + + /* + * The URB might have just been unlinked in + * ch341_gpio_irq_disable, but the completion handler hasn't + * been called yet. + */ + if (!usb_wait_anchor_empty_timeout(&dev->irq_urb_out, 5000)) + usb_kill_anchored_urbs(&dev->irq_urb_out); + + usb_anchor_urb(dev->irq_urb, &dev->irq_urb_out); + ret = usb_submit_urb(dev->irq_urb, GFP_KERNEL); + if (ret) + usb_unanchor_urb(dev->irq_urb); +} + +static void ch341_gpio_irq_disable(struct irq_data *data) +{ + struct ch341_gpio *dev = irq_data_get_irq_chip_data(data); + + usb_unlink_urb(dev->irq_urb); +} + +static int ch341_gpio_remove(struct platform_device *pdev) +{ + struct ch341_gpio *dev = platform_get_drvdata(pdev); + + usb_kill_anchored_urbs(&dev->irq_urb_out); + gpiochip_remove(&dev->gpio); + usb_free_urb(dev->irq_urb); + + return 0; +} + +static const struct irq_chip ch341_irqchip = { + .name = "CH341", + .irq_set_type = ch341_gpio_irq_set_type, + .irq_enable = ch341_gpio_irq_enable, + .irq_disable = ch341_gpio_irq_disable, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + +static int ch341_gpio_probe(struct platform_device *pdev) +{ + struct ch341_ddata *ddata = dev_get_drvdata(pdev->dev.parent); + struct gpio_irq_chip *girq; + struct ch341_gpio *dev; + struct gpio_chip *gpio; + int ret; + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); + if (dev == NULL) + return -ENOMEM; + + platform_set_drvdata(pdev, dev); + dev->ddata = ddata; + mutex_init(&dev->gpio_lock); + + gpio = &dev->gpio; + gpio->label = dev_name(&pdev->dev); + gpio->parent = &pdev->dev; + gpio->owner = THIS_MODULE; + gpio->get_direction = ch341_gpio_get_direction; + gpio->direction_input = ch341_gpio_direction_input; + gpio->direction_output = ch341_gpio_direction_output; + gpio->get = ch341_gpio_get; + gpio->get_multiple = ch341_gpio_get_multiple; + gpio->set = ch341_gpio_set; + gpio->set_multiple = ch341_gpio_set_multiple; + gpio->base = -1; + gpio->ngpio = CH341_GPIO_NUM_PINS; + gpio->can_sleep = true; + + girq = &gpio->irq; + gpio_irq_chip_set_chip(girq, &ch341_irqchip); + girq->handler = handle_simple_irq; + girq->default_type = IRQ_TYPE_NONE; + + /* Create an URB for handling interrupt */ + dev->irq_urb = usb_alloc_urb(0, GFP_KERNEL); + if (!dev->irq_urb) + return dev_err_probe(&pdev->dev, -ENOMEM, "Cannot allocate the int URB\n"); + + usb_fill_int_urb(dev->irq_urb, ddata->usb_dev, + usb_rcvintpipe(ddata->usb_dev, ddata->ep_intr), + dev->irq_buf, CH341_USB_MAX_INTR_SIZE, + ch341_complete_intr_urb, dev, ddata->ep_intr_interval); + + init_usb_anchor(&dev->irq_urb_out); + + ret = gpiochip_add_data(gpio, dev); + if (ret) { + ret = dev_err_probe(&pdev->dev, ret, "Could not add GPIO\n"); + goto release_urb; + } + + return 0; + +release_urb: + usb_free_urb(dev->irq_urb); + + return ret; +} + +static struct platform_driver ch341_gpio_driver = { + .driver.name = "ch341-gpio", + .probe = ch341_gpio_probe, + .remove = ch341_gpio_remove, +}; +module_platform_driver(ch341_gpio_driver); + +MODULE_AUTHOR("Frank Zago "); +MODULE_DESCRIPTION("CH341 USB to GPIO"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:ch341-gpio"); diff --git a/include/linux/mfd/ch341.h b/include/linux/mfd/ch341.h index 44f5da0720bd..804d671fbe45 100644 --- a/include/linux/mfd/ch341.h +++ b/include/linux/mfd/ch341.h @@ -4,6 +4,14 @@ #include #include +#define DEFAULT_TIMEOUT_MS 1000 /* 1s USB requests timeout */ + +/* + * All commands fit inside a 32-byte segment. There may be several of + * these segments in a USB command. + */ +#define SEG_SIZE 32 + struct usb_device; struct usb_interface; From patchwork Thu Jun 16 01:37:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Zago X-Patchwork-Id: 582866 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04C2CC433EF for ; Thu, 16 Jun 2022 01:38:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357234AbiFPBiP (ORCPT ); Wed, 15 Jun 2022 21:38:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357467AbiFPBiM (ORCPT ); Wed, 15 Jun 2022 21:38:12 -0400 Received: from relay12.mail.gandi.net (relay12.mail.gandi.net [IPv6:2001:4b98:dc4:8::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E839857B3A; Wed, 15 Jun 2022 18:38:08 -0700 (PDT) Received: (Authenticated sender: frank@zago.net) by mail.gandi.net (Postfix) with ESMTPSA id 35989200006; Thu, 16 Jun 2022 01:38:03 +0000 (UTC) From: frank zago To: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Bartosz Golaszewski , Wolfram Sang , Johan Hovold , linux-usb@vger.kernel.org, Lee Jones , Linus Walleij , linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, frank zago Subject: [PATCH v6 3/4] i2c: ch341: add I2C MFD cell driver for the CH341 Date: Wed, 15 Jun 2022 20:37:46 -0500 Message-Id: <20220616013747.126051-4-frank@zago.net> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220616013747.126051-1-frank@zago.net> References: <20220616013747.126051-1-frank@zago.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The I2C interface can run at 4 different speeds. This driver currently only offer 100kHz. Tested with a variety of I2C sensors, and the IIO subsystem. Signed-off-by: frank zago --- MAINTAINERS | 1 + drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-ch341.c | 377 +++++++++++++++++++++++++++++++++ 4 files changed, 389 insertions(+) create mode 100644 drivers/i2c/busses/i2c-ch341.c diff --git a/MAINTAINERS b/MAINTAINERS index 8b93f6192704..837065fd3150 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21480,6 +21480,7 @@ M: Frank Zago L: linux-usb@vger.kernel.org S: Maintained F: drivers/gpio/gpio-ch341.c +F: drivers/i2c/busses/i2c-ch341.c F: drivers/mfd/ch341-core.c F: include/linux/mfd/ch341.h diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index a1bae59208e3..db9797345ad5 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -1199,6 +1199,16 @@ config I2C_RCAR comment "External I2C/SMBus adapter drivers" +config I2C_CH341 + tristate "CH341 USB to I2C support" + select MFD_CH341 + help + If you say yes to this option, I2C support will be included for the + WCH CH341, a USB to I2C/SPI/GPIO interface. + + This driver can also be built as a module. If so, the module + will be called i2c-ch341. + config I2C_DIOLAN_U2C tristate "Diolan U2C-12 USB adapter" depends on USB diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 479f60e4ee3d..e83ca4a472f2 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -127,6 +127,7 @@ obj-$(CONFIG_I2C_XLP9XX) += i2c-xlp9xx.o obj-$(CONFIG_I2C_RCAR) += i2c-rcar.o # External I2C/SMBus adapter drivers +obj-$(CONFIG_I2C_CH341) += i2c-ch341.o obj-$(CONFIG_I2C_DIOLAN_U2C) += i2c-diolan-u2c.o obj-$(CONFIG_I2C_DLN2) += i2c-dln2.o obj-$(CONFIG_I2C_CP2615) += i2c-cp2615.o diff --git a/drivers/i2c/busses/i2c-ch341.c b/drivers/i2c/busses/i2c-ch341.c new file mode 100644 index 000000000000..60c587cca4eb --- /dev/null +++ b/drivers/i2c/busses/i2c-ch341.c @@ -0,0 +1,377 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * I2C cell driver for the CH341A, CH341B and CH341T. + * + * Copyright 2022, Frank Zago + * Copyright (c) 2016 Tse Lun Bien + * Copyright (c) 2014 Marco Gittler + * Copyright (C) 2006-2007 Till Harbaum (Till@Harbaum.org) + */ + +#include +#include +#include +#include +#include +#include +#include + +/* I2C bus speed. Speed selection is not implemented. */ +#define CH341_I2C_20KHZ 0 +#define CH341_I2C_100KHZ 1 +#define CH341_I2C_400KHZ 2 +#define CH341_I2C_750KHZ 3 + +/* I2C chip commands */ +#define CH341_CMD_I2C_STREAM 0xAA +#define CH341_CMD_I2C_STM_END 0x00 + +#define CH341_CMD_I2C_STM_STA 0x74 +#define CH341_CMD_I2C_STM_STO 0x75 +#define CH341_CMD_I2C_STM_OUT 0x80 +#define CH341_CMD_I2C_STM_IN 0xC0 +#define CH341_CMD_I2C_STM_SET 0x60 + +/* + * The maximum request size is 4096 bytes, both for reading and + * writing, split in up to 128 32-byte segments, which includes the + * CH341 commands and the I2C data. + */ +#define SEG_COUNT 128 + +/* + * Limit the transfer size that can be written. 4KiB is the maximum + * size of the whole buffer, but it must include all the command + * delimiters. 3KiB sounds reasonable. + */ +#define MAX_RW_LENGTH 3072 + +struct ch341_i2c { + struct i2c_adapter adapter; + + /* I2C request and response state */ + int idx_out; /* current offset in buf */ + int out_seg; /* current segment */ + u8 i2c_buf[SEG_COUNT * SEG_SIZE]; +}; + +/* + * Special case the no data transfer (SMBUS quick message), since some + * parameters are a bit different than the normal case. + */ +static int no_data_xfer(struct i2c_adapter *adapter, const struct i2c_msg *msg) +{ + struct ch341_i2c *dev = i2c_get_adapdata(adapter); + struct ch341_ddata *ddata = adapter->algo_data; + u8 *out = dev->i2c_buf; + int actual; + int ret; + + out[0] = CH341_CMD_I2C_STREAM; + out[1] = CH341_CMD_I2C_STM_STA; + out[2] = CH341_CMD_I2C_STM_OUT; + out[3] = msg->addr << 1 | (msg->flags & I2C_M_RD); + out[4] = CH341_CMD_I2C_STM_IN; + out[5] = CH341_CMD_I2C_STM_STO; + out[6] = CH341_CMD_I2C_STM_END; + + mutex_lock(&ddata->usb_lock); + + /* Issue the request */ + ret = usb_bulk_msg(ddata->usb_dev, + usb_sndbulkpipe(ddata->usb_dev, ddata->ep_out), + dev->i2c_buf, 7, &actual, DEFAULT_TIMEOUT_MS); + if (ret < 0) { + mutex_unlock(&ddata->usb_lock); + return ret; + } + + ret = usb_bulk_msg(ddata->usb_dev, + usb_rcvbulkpipe(ddata->usb_dev, ddata->ep_in), + dev->i2c_buf, 2, &actual, + DEFAULT_TIMEOUT_MS); + if (ret < 0) { + mutex_unlock(&ddata->usb_lock); + return ret; + } + + mutex_unlock(&ddata->usb_lock); + + if (actual != 2 || dev->i2c_buf[0] & 0x80) + return -ETIMEDOUT; + + return 1; +} + +/* + * Append a write command to the current request. A set of 32-byte + * packets is filled. Each packet starts with STREAM and finishes with + * END, and contains an OUT field, leaving up to 29 bytes of data. The + * first packet must also include a START and the device address. + */ +static int append_write(struct ch341_i2c *dev, const struct i2c_msg *msg) +{ + bool start_done = false; + u8 *out = dev->i2c_buf; + int len; + u8 *p; + + len = msg->len; + p = msg->buf; + + while (len) { + int to_write; + int avail; + + if (dev->idx_out % SEG_SIZE) { + /* Finish current packet, and advance to the next one */ + out[dev->idx_out++] = CH341_CMD_I2C_STM_END; + dev->out_seg++; + dev->idx_out = dev->out_seg * SEG_SIZE; + + if (dev->out_seg == SEG_COUNT) + return -E2BIG; + } + + out[dev->idx_out++] = CH341_CMD_I2C_STREAM; + + /* account for stream start and end */ + avail = SEG_SIZE - 3; + + if (!start_done) { + /* Each message has a start */ + out[dev->idx_out++] = CH341_CMD_I2C_STM_STA; + + avail -= 2; /* room for STA and device address */ + } + + to_write = min_t(int, len, avail); + + if (!start_done) { + out[dev->idx_out++] = CH341_CMD_I2C_STM_OUT | (to_write + 1); + out[dev->idx_out++] = msg->addr << 1; + + start_done = true; + } else { + out[dev->idx_out++] = CH341_CMD_I2C_STM_OUT | to_write; + } + + memcpy(&out[dev->idx_out], p, to_write); + dev->idx_out += to_write; + len -= to_write; + p += to_write; + } + + return 0; +} + +/* + * Append a read command to the request. It usually follows a write + * command. When that happens, the driver will attempt to concat the + * read command into the same packet. Each read command, of up to 32 + * bytes, must be written to a new packet. It is not possible to + * concat them. + */ +static int append_read(struct ch341_i2c *dev, const struct i2c_msg *msg) +{ + bool start_done = false; + u8 *out = dev->i2c_buf; + int len; + + len = msg->len; + + while (len) { + int to_read; + + if (dev->idx_out % SEG_SIZE) { + if (!start_done && + (dev->idx_out % SEG_SIZE) < (SEG_SIZE - 7)) { + /* There's enough left for a read */ + } else { + /* Finish current packet, and advance to the next one */ + out[dev->idx_out++] = CH341_CMD_I2C_STM_END; + dev->out_seg++; + dev->idx_out = dev->out_seg * SEG_SIZE; + + if (dev->out_seg == SEG_COUNT) + return -E2BIG; + + out[dev->idx_out++] = CH341_CMD_I2C_STREAM; + } + } else { + out[dev->idx_out++] = CH341_CMD_I2C_STREAM; + } + + if (!start_done) { + /* Each message has a start */ + out[dev->idx_out++] = CH341_CMD_I2C_STM_STA; + out[dev->idx_out++] = CH341_CMD_I2C_STM_OUT | 1; + out[dev->idx_out++] = msg->addr << 1 | 1; + + start_done = true; + } + + /* Apparently the last command must be an STM_IN to + * read the last byte. Without it, the adapter gets + * lost. + */ + to_read = min_t(int, len, 32); + len -= to_read; + if (len == 0) { + if (to_read > 1) + out[dev->idx_out++] = CH341_CMD_I2C_STM_IN | (to_read - 1); + out[dev->idx_out++] = CH341_CMD_I2C_STM_IN; + } else { + out[dev->idx_out++] = CH341_CMD_I2C_STM_IN | to_read; + } + } + + return 0; +} + +static int ch341_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) +{ + struct ch341_i2c *dev = i2c_get_adapdata(adapter); + struct ch341_ddata *ddata = adapter->algo_data; + u8 *out = dev->i2c_buf; + int actual; + int ret; + int i; + + /* Special case */ + if (num == 1 && msgs[0].len == 0) + return no_data_xfer(adapter, &msgs[0]); + + /* Prepare the request */ + dev->idx_out = 0; + dev->out_seg = 0; + + for (i = 0; i != num; i++) { + if (msgs[i].flags & I2C_M_RD) + ret = append_read(dev, &msgs[i]); + else + ret = append_write(dev, &msgs[i]); + + if (ret) + return ret; + } + + /* Finish the last packet */ + if (SEG_SIZE - (dev->idx_out % SEG_SIZE) < 2) { + out[dev->idx_out++] = CH341_CMD_I2C_STM_END; + + dev->out_seg++; + if (dev->out_seg == SEG_COUNT) + return -E2BIG; + + dev->idx_out = dev->out_seg * SEG_SIZE; + + out[dev->idx_out++] = CH341_CMD_I2C_STREAM; + } + + out[dev->idx_out++] = CH341_CMD_I2C_STM_STO; + out[dev->idx_out++] = CH341_CMD_I2C_STM_END; + + mutex_lock(&ddata->usb_lock); + + /* Issue the request */ + ret = usb_bulk_msg(ddata->usb_dev, + usb_sndbulkpipe(ddata->usb_dev, ddata->ep_out), + dev->i2c_buf, dev->idx_out, &actual, DEFAULT_TIMEOUT_MS); + if (ret < 0) { + mutex_unlock(&ddata->usb_lock); + return ret; + } + + for (i = 0; i != num; i++) { + if (!(msgs[i].flags & I2C_M_RD)) + continue; + + ret = usb_bulk_msg(ddata->usb_dev, + usb_rcvbulkpipe(ddata->usb_dev, ddata->ep_in), + dev->i2c_buf, msgs[i].len, &actual, + DEFAULT_TIMEOUT_MS); + + if (ret) { + mutex_unlock(&ddata->usb_lock); + return ret; + } + + if (actual != msgs[i].len) { + mutex_unlock(&ddata->usb_lock); + return -EIO; + } + + memcpy(msgs[i].buf, dev->i2c_buf, actual); + } + + mutex_unlock(&ddata->usb_lock); + + return num; +} + +static u32 ch341_i2c_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm ch341_i2c_algorithm = { + .master_xfer = ch341_i2c_xfer, + .functionality = ch341_i2c_func, +}; + +static const struct i2c_adapter_quirks ch341_i2c_quirks = { + .max_read_len = MAX_RW_LENGTH, + .max_write_len = MAX_RW_LENGTH, +}; + +static int ch341_i2c_probe(struct platform_device *pdev) +{ + struct ch341_ddata *ddata = dev_get_drvdata(pdev->dev.parent); + struct ch341_i2c *ch341_i2c; + int actual; + int ret; + + ch341_i2c = devm_kzalloc(&pdev->dev, sizeof(*ch341_i2c), GFP_KERNEL); + if (ch341_i2c == NULL) + return -ENOMEM; + + ch341_i2c->adapter.owner = THIS_MODULE; + ch341_i2c->adapter.class = I2C_CLASS_HWMON; + ch341_i2c->adapter.algo = &ch341_i2c_algorithm; + ch341_i2c->adapter.algo_data = ddata; + ch341_i2c->adapter.quirks = &ch341_i2c_quirks; + ch341_i2c->adapter.dev.parent = &pdev->dev; + snprintf(ch341_i2c->adapter.name, sizeof(ch341_i2c->adapter.name), + "CH341 I2C USB bus %03d device %03d", + ddata->usb_dev->bus->busnum, ddata->usb_dev->devnum); + + i2c_set_adapdata(&ch341_i2c->adapter, ch341_i2c); + platform_set_drvdata(pdev, ch341_i2c); + + /* Set ch341 i2c speed */ + ch341_i2c->i2c_buf[0] = CH341_CMD_I2C_STREAM; + ch341_i2c->i2c_buf[1] = CH341_CMD_I2C_STM_SET | CH341_I2C_100KHZ; + ch341_i2c->i2c_buf[2] = CH341_CMD_I2C_STM_END; + mutex_lock(&ddata->usb_lock); + ret = usb_bulk_msg(ddata->usb_dev, + usb_sndbulkpipe(ddata->usb_dev, ddata->ep_out), + ch341_i2c->i2c_buf, 3, &actual, DEFAULT_TIMEOUT_MS); + mutex_unlock(&ddata->usb_lock); + + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, "Cannot set I2C speed\n"); + + return devm_i2c_add_adapter(&pdev->dev, &ch341_i2c->adapter); +} + +static struct platform_driver ch341_i2c_driver = { + .driver.name = "ch341-i2c", + .probe = ch341_i2c_probe, +}; +module_platform_driver(ch341_i2c_driver); + +MODULE_AUTHOR("Frank Zago "); +MODULE_DESCRIPTION("CH341 USB to I2C"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:ch341-i2c"); From patchwork Thu Jun 16 01:37:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Frank Zago X-Patchwork-Id: 582390 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D4FCC43334 for ; Thu, 16 Jun 2022 01:38:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242403AbiFPBif (ORCPT ); Wed, 15 Jun 2022 21:38:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344998AbiFPBiO (ORCPT ); Wed, 15 Jun 2022 21:38:14 -0400 Received: from relay12.mail.gandi.net (relay12.mail.gandi.net [217.70.178.232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E22EC57B20; Wed, 15 Jun 2022 18:38:11 -0700 (PDT) Received: (Authenticated sender: frank@zago.net) by mail.gandi.net (Postfix) with ESMTPSA id 8B365200003; Thu, 16 Jun 2022 01:38:07 +0000 (UTC) From: frank zago To: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Bartosz Golaszewski , Wolfram Sang , Johan Hovold , linux-usb@vger.kernel.org, Lee Jones , Linus Walleij , linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, frank zago Subject: [PATCH v6 4/4] docs: misc: add documentation for ch341 driver Date: Wed, 15 Jun 2022 20:37:47 -0500 Message-Id: <20220616013747.126051-5-frank@zago.net> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220616013747.126051-1-frank@zago.net> References: <20220616013747.126051-1-frank@zago.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Document the multifunction CH341 chip driver, in GPIO and I2C mode. Signed-off-by: frank zago --- Documentation/misc-devices/ch341.rst | 109 +++++++++++++++++++++++++++ Documentation/misc-devices/index.rst | 1 + 2 files changed, 110 insertions(+) create mode 100644 Documentation/misc-devices/ch341.rst diff --git a/Documentation/misc-devices/ch341.rst b/Documentation/misc-devices/ch341.rst new file mode 100644 index 000000000000..65ba293bdc2d --- /dev/null +++ b/Documentation/misc-devices/ch341.rst @@ -0,0 +1,109 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +=========================================================== +WinChipHead (沁恒) CH341 linux driver for I2C and GPIO mode +=========================================================== + +The CH341 is declined in several flavors, and may support one or more +of UART, SPI, I2C and GPIO, but not always simultaneously: + + - CH341 A/B/F: UART, Printer, SPI, I2C and GPIO + - CH341 C/T: UART and I2C + - CH341 H: SPI + +They work in 3 different modes, with only one being presented +depending on the USB PID: + + - 0x5523: UART mode, covered by the USB `ch341` serial driver + - 0x5512: SPI/I2C/GPIO mode, covered by the ch341 MFD drivers + - 0x5584: Parallel printer mode, covered by the USB `usblp` driver + +Mode selection is done at the hardware level by tying some +pins. Breakout boards with one of the CH341 chip usually have one or +more jumpers to select which mode they work on. At least one model +(CJMCU-341) appears to need bridging some solder pads to select a +different default. Breakout boards also don't usually offer an option +to configure the chip into printer mode; for that case, connect the +SCL and SDA lines directly together. + +The various CH341 appear to be indistinguishable from the +software. For instance the ch341 MFD driver will present a GPIO +interface for the CH341T although physical pins are not present, and +the device will accept GPIO commands. + +The ch341 MFD driver has been tested with a CH341A, CH341B and +CH341T. + +Some breakout boards work in 3.3V and 5V depending on some jumpers. + +The black chip programmer with a ZIF socket will power the CH341 at +3.3V if a jumper is set, but will only output 5V to the chips to be +programmed, which is not always desirable. A hardware hack to use 3.3V +everywhere, involving some soldering, is available at +https://eevblog.com/forum/repair/ch341a-serial-memory-programmer-power-supply-fix/ + +Some sample code for the CH341 is available at the manufacturer +website, at http://wch-ic.com/products/CH341.html + +The repository at https://github.com/boseji/CH341-Store contains a lot +of information on these chips, including datasheets. + +This driver is based on the pre-existing work at +https://github.com/gschorcht/i2c-ch341-usb + + +I2C Caveats +----------- + +The ch341 doesn't work with a Wii nunchuk, possibly because the +pull-up value is too low (1500 ohms). + +i2c AT24 eeproms can be read but not programmed properly because the +at24 linux driver tries to write a byte at a time, and doesn't wait at +all (or enough) between writes. Data corruption on writes does occur. + + +The GPIOs +--------- + +16 GPIOs are available on the CH341 A/B/F. The first 6 are input/output, +and the last 10 are input only. + +Pinout and their names as they appear on some breakout boards:: + + CH341A/B/F GPIO Names Mode + pin line + + 15 0 D0, CS0 input/output + 16 1 D1, CS1 input/output + 17 2 D2, CS2 input/output + 18 3 D3, SCK, DCK input/output + 19 4 D4, DOUT2, CS3 input/output + 20 5 D5, MOSI, DOUT, SDO input/output + 21 6 D6, DIN2 input + 22 7 D7, MISO, DIN input + 5 8 ERR input + 6 9 PEMP input + 7 10 INT input + 8 11 SLCT (SELECT) input + 26 12 RST# (?) input + 27 13 WT (WAIT) input + 4 14 DS (Data Select?) input + 3 15 AS (Address Select?) input + + +GPIO interrupt +~~~~~~~~~~~~~~ + +The INT pin, corresponding to GPIO 10 is an input pin that can trigger +an interrupt on a rising edge. Only that pin is able to generate an +interrupt, and only on a rising edge. Trying to monitor events on +another GPIO, or that GPIO on something other than a rising edge, will +be rejected. + + +SPI +--- + +This driver doesn't offer an SPI interface (yet) due to the +impossibility of declaring an SPI device like I2C does. diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst index 756be15a49a4..e85531a4f354 100644 --- a/Documentation/misc-devices/index.rst +++ b/Documentation/misc-devices/index.rst @@ -19,6 +19,7 @@ fit into other categories. bh1770glc eeprom c2port + ch341 dw-xdata-pcie ibmvmc ics932s401