From patchwork Thu Jun 16 08:11:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 582302 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6992CC43334 for ; Thu, 16 Jun 2022 08:11:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359586AbiFPILN (ORCPT ); Thu, 16 Jun 2022 04:11:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58778 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358831AbiFPILN (ORCPT ); Thu, 16 Jun 2022 04:11:13 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DDCD15D66F for ; Thu, 16 Jun 2022 01:11:11 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id c4so1022715lfj.12 for ; Thu, 16 Jun 2022 01:11:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wkVQHqN9sHWvqiIpS3oFqgJKwWLK+jcdAbCwGIc3Us0=; b=z2A2r4hQ3v5XMbMi5nKTm8eVigco81hiZGqy4RYhDnppTbW5C07vQa+Z49yHky5Zb1 4MJZzxlwQHNAwYDTtk5h3iXanrpq2b/ZVuiWljG7AK2e7yhURZ37aQn0gdYGsARlQ3AH mljVsKYpfDIFa0ACzjNOA0RitV+Q8q22JHAJWoc8WQa1P8qgIbuLudPjEdsWA1Objx4E GMmSLA9jIKp/veENqEKdTQfzBz0VVno+YkwNVCRgYdDzlb089ZET3DcA4zwEddRdozGh AHwGMC4af3TqxB3xeDtURhgEFO7eo3RVAqzaNHEp7V4yWLDf5jvJzNrUXuZweCv9tL0W 09LQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wkVQHqN9sHWvqiIpS3oFqgJKwWLK+jcdAbCwGIc3Us0=; b=PyC4vvnCdb4h/rC0jHzyFCDvKBL4nZfUAp5zHVdO8P3rd8emTbLWxuU9RMnXdWXj9H ukQDQN6mWCN1hGuMdk+zlyJd+zWawQfEiYmWv49XQtniZce0gXj/jtJaLirH8YSPhQYW EHLKYur045opRXTbjKJ4YJB9VkfIPvLFEP1+lhPTwi92OXPapdKT1iFhC/VfkdQDkJPQ BoGtmCFhYD1dF7AlpslFMo67h6B9CXVaq+9SFeR2hgBY4m6EUuSAEsCBNf9tn6EUlxOF f3b/vG4X2Fk/UC65uenSYIMJBqHXffaEFQfzr2ija/or8KK9LPgQtKby7i4GybbnORQq FjTg== X-Gm-Message-State: AJIora8+pKIMJlHoibFImdXDwscAQf+bUDI6zgkJiQ1BF88O3gHao+XI lPWxcgi8RlXIl8JNPW4c4gNtZQ== X-Google-Smtp-Source: AGRyM1stjvw4oXhtIOuav4qdwjxvxKLEG7e/5DDRJQYYmjqvEYKLNUFrirGRqVmjzwqGW2tJmsnejA== X-Received: by 2002:a19:7916:0:b0:479:2c32:7bad with SMTP id u22-20020a197916000000b004792c327badmr2014693lfc.519.1655367070185; Thu, 16 Jun 2022 01:11:10 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id y29-20020a19641d000000b004790823d354sm142144lfb.26.2022.06.16.01.11.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 01:11:09 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v3 2/5] drm/msm/mdp5: move iommu_domain_alloc() call close to its usage Date: Thu, 16 Jun 2022 11:11:03 +0300 Message-Id: <20220616081106.350262-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220616081106.350262-1-dmitry.baryshkov@linaro.org> References: <20220616081106.350262-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Move iommu_domain_alloc() in front of adress space/IOMMU initialization. This allows us to drop final bits of struct mdp5_cfg_platform which remained from the pre-DT days. Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 16 ---------------- drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h | 6 ------ drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 6 ++++-- 3 files changed, 4 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c index 1bf9ff5dbabc..714effb967ff 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c @@ -1248,8 +1248,6 @@ static const struct mdp5_cfg_handler cfg_handlers_v3[] = { { .revision = 3, .config = { .hw = &sdm630_config } }, }; -static struct mdp5_cfg_platform *mdp5_get_config(struct platform_device *dev); - const struct mdp5_cfg_hw *mdp5_cfg_get_hw_config(struct mdp5_cfg_handler *cfg_handler) { return cfg_handler->config.hw; @@ -1274,10 +1272,8 @@ struct mdp5_cfg_handler *mdp5_cfg_init(struct mdp5_kms *mdp5_kms, uint32_t major, uint32_t minor) { struct drm_device *dev = mdp5_kms->dev; - struct platform_device *pdev = to_platform_device(dev->dev); struct mdp5_cfg_handler *cfg_handler; const struct mdp5_cfg_handler *cfg_handlers; - struct mdp5_cfg_platform *pconfig; int i, ret = 0, num_handlers; cfg_handler = kzalloc(sizeof(*cfg_handler), GFP_KERNEL); @@ -1320,9 +1316,6 @@ struct mdp5_cfg_handler *mdp5_cfg_init(struct mdp5_kms *mdp5_kms, cfg_handler->revision = minor; cfg_handler->config.hw = mdp5_cfg; - pconfig = mdp5_get_config(pdev); - memcpy(&cfg_handler->config.platform, pconfig, sizeof(*pconfig)); - DBG("MDP5: %s hw config selected", mdp5_cfg->name); return cfg_handler; @@ -1333,12 +1326,3 @@ struct mdp5_cfg_handler *mdp5_cfg_init(struct mdp5_kms *mdp5_kms, return ERR_PTR(ret); } - -static struct mdp5_cfg_platform *mdp5_get_config(struct platform_device *dev) -{ - static struct mdp5_cfg_platform config = {}; - - config.iommu = iommu_domain_alloc(&platform_bus_type); - - return &config; -} diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h index 6b03d7899309..c2502cc33864 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h @@ -104,14 +104,8 @@ struct mdp5_cfg_hw { uint32_t max_clk; }; -/* platform config data (ie. from DT, or pdata) */ -struct mdp5_cfg_platform { - struct iommu_domain *iommu; -}; - struct mdp5_cfg { const struct mdp5_cfg_hw *hw; - struct mdp5_cfg_platform platform; }; struct mdp5_kms; diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c index 3d5621a68f85..a69e23f10d91 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c @@ -558,6 +558,7 @@ static int mdp5_kms_init(struct drm_device *dev) struct msm_gem_address_space *aspace; int irq, i, ret; struct device *iommu_dev; + struct iommu_domain *iommu; ret = mdp5_init(to_platform_device(dev->dev), dev); @@ -601,14 +602,15 @@ static int mdp5_kms_init(struct drm_device *dev) } mdelay(16); - if (config->platform.iommu) { + iommu = iommu_domain_alloc(&platform_bus_type); + if (iommu) { struct msm_mmu *mmu; iommu_dev = &pdev->dev; if (!dev_iommu_fwspec_get(iommu_dev)) iommu_dev = iommu_dev->parent; - mmu = msm_iommu_new(iommu_dev, config->platform.iommu); + mmu = msm_iommu_new(iommu_dev, iommu); aspace = msm_gem_address_space_create(mmu, "mdp5", 0x1000, 0x100000000 - 0x1000); From patchwork Thu Jun 16 08:11:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 582301 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76915C43334 for ; Thu, 16 Jun 2022 08:11:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359282AbiFPILQ (ORCPT ); Thu, 16 Jun 2022 04:11:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359639AbiFPILP (ORCPT ); Thu, 16 Jun 2022 04:11:15 -0400 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 996A85D5D7 for ; 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Thu, 16 Jun 2022 01:11:12 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id y29-20020a19641d000000b004790823d354sm142144lfb.26.2022.06.16.01.11.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 01:11:11 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v3 4/5] drm/msm: move KMS aspace init to the separate helper Date: Thu, 16 Jun 2022 11:11:05 +0300 Message-Id: <20220616081106.350262-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220616081106.350262-1-dmitry.baryshkov@linaro.org> References: <20220616081106.350262-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org MDP5 and DPU drivers have the same piece of code now to initialize IOMMU and GEM address space. Move it to the msm_drv.c Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 32 ++----------------- drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 33 ++++---------------- drivers/gpu/drm/msm/msm_drv.c | 39 ++++++++++++++++++++++++ drivers/gpu/drm/msm/msm_drv.h | 1 + 4 files changed, 49 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index e8bc6d5f6ac1..8cbe56694892 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -997,40 +997,14 @@ static void _dpu_kms_mmu_destroy(struct dpu_kms *dpu_kms) static int _dpu_kms_mmu_init(struct dpu_kms *dpu_kms) { - struct iommu_domain *domain; struct msm_gem_address_space *aspace; - struct msm_mmu *mmu; - struct device *dpu_dev = dpu_kms->dev->dev; - struct device *mdss_dev = dpu_dev->parent; - struct device *iommu_dev; - - domain = iommu_domain_alloc(&platform_bus_type); - if (!domain) - return 0; - - /* - * IOMMUs can be a part of MDSS device tree binding, or the - * MDP/DPU device. - */ - if (dev_iommu_fwspec_get(dpu_dev)) - iommu_dev = dpu_dev; - else - iommu_dev = mdss_dev; - - mmu = msm_iommu_new(iommu_dev, domain); - if (IS_ERR(mmu)) { - iommu_domain_free(domain); - return PTR_ERR(mmu); - } - aspace = msm_gem_address_space_create(mmu, "dpu1", - 0x1000, 0x100000000 - 0x1000); - if (IS_ERR(aspace)) { - mmu->funcs->destroy(mmu); + aspace = msm_kms_init_aspace(dpu_kms->dev); + if (IS_ERR(aspace)) return PTR_ERR(aspace); - } dpu_kms->base.aspace = aspace; + return 0; } diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c index a69e23f10d91..d2a48caf9d27 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c @@ -557,8 +557,6 @@ static int mdp5_kms_init(struct drm_device *dev) struct msm_kms *kms; struct msm_gem_address_space *aspace; int irq, i, ret; - struct device *iommu_dev; - struct iommu_domain *iommu; ret = mdp5_init(to_platform_device(dev->dev), dev); @@ -602,33 +600,14 @@ static int mdp5_kms_init(struct drm_device *dev) } mdelay(16); - iommu = iommu_domain_alloc(&platform_bus_type); - if (iommu) { - struct msm_mmu *mmu; - - iommu_dev = &pdev->dev; - if (!dev_iommu_fwspec_get(iommu_dev)) - iommu_dev = iommu_dev->parent; - - mmu = msm_iommu_new(iommu_dev, iommu); - - aspace = msm_gem_address_space_create(mmu, "mdp5", - 0x1000, 0x100000000 - 0x1000); - - if (IS_ERR(aspace)) { - if (!IS_ERR(mmu)) - mmu->funcs->destroy(mmu); - ret = PTR_ERR(aspace); - goto fail; - } - - kms->aspace = aspace; - } else { - DRM_DEV_INFO(&pdev->dev, - "no iommu, fallback to phys contig buffers for scanout\n"); - aspace = NULL; + aspace = msm_kms_init_aspace(mdp5_kms->dev); + if (IS_ERR(aspace)) { + ret = PTR_ERR(aspace); + goto fail; } + kms->aspace = aspace; + pm_runtime_put_sync(&pdev->dev); ret = modeset_init(mdp5_kms); diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index c781307464a0..258632d5c411 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -26,6 +26,7 @@ #include "msm_gem.h" #include "msm_gpu.h" #include "msm_kms.h" +#include "msm_mmu.h" #include "adreno/adreno_gpu.h" /* @@ -267,6 +268,44 @@ static int msm_drm_uninit(struct device *dev) #include +struct msm_gem_address_space *msm_kms_init_aspace(struct drm_device *dev) +{ + struct iommu_domain *domain; + struct msm_gem_address_space *aspace; + struct msm_mmu *mmu; + struct device *mdp_dev = dev->dev; + struct device *mdss_dev = mdp_dev->parent; + struct device *iommu_dev; + + domain = iommu_domain_alloc(&platform_bus_type); + if (!domain) { + drm_info(dev, "no IOMMU, fallback to phys contig buffers for scanout\n"); + return NULL; + } + + /* + * IOMMUs can be a part of MDSS device tree binding, or the + * MDP/DPU device. + */ + if (dev_iommu_fwspec_get(mdp_dev)) + iommu_dev = mdp_dev; + else + iommu_dev = mdss_dev; + + mmu = msm_iommu_new(iommu_dev, domain); + if (IS_ERR(mmu)) { + iommu_domain_free(domain); + return ERR_CAST(mmu); + } + + aspace = msm_gem_address_space_create(mmu, "mdp_kms", + 0x1000, 0x100000000 - 0x1000); + if (IS_ERR(aspace)) + mmu->funcs->destroy(mmu); + + return aspace; +} + bool msm_use_mmu(struct drm_device *dev) { struct msm_drm_private *priv = dev->dev_private; diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 08388d742d65..97d8ce07e8ed 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -234,6 +234,7 @@ void msm_crtc_disable_vblank(struct drm_crtc *crtc); int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu); void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu); +struct msm_gem_address_space *msm_kms_init_aspace(struct drm_device *dev); bool msm_use_mmu(struct drm_device *dev); int msm_ioctl_gem_submit(struct drm_device *dev, void *data,