From patchwork Tue Jan 15 09:15:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 155644 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4650591jaa; Tue, 15 Jan 2019 01:15:36 -0800 (PST) X-Google-Smtp-Source: ALg8bN7VqU+gox/Ye+Q4mQ1QYx8jVqyIvFeOgnM1j/q5LNI9l2zVTRP51nmrgmxBu2/F2AipNz5r X-Received: by 2002:a17:902:9047:: with SMTP id w7mr3076867plz.270.1547543736436; Tue, 15 Jan 2019 01:15:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547543736; cv=none; d=google.com; s=arc-20160816; b=KGMt+CbZagdsBk1IQqsaK14SqJUzVM1ePJvt6p0IZEHvY82bhY77IeUzpeC7f6/zeI u2wfXy9X5e2ITqut4/LZX0/pBi5wUN/ygo6PqOWL4Rr+0bburkwfcPHHUXfsQX26HTs3 Vl2bBnq5jl624SyoXxf0Zbv/w4NfLfYLFxuDG1X8o5aqZgzvbMp4NnDl8Sm3s7H+jYKj X/ZDsOPf1tgdv9WeKi7kQUBD6oSB9Hr+4ckHl5Kan14lKmI4TK/l1cseVsAk4cR81PPX aPT4Trwcx4rei4CdAkMlzRbYmujyTzss88Hi9/vA5jQPwFAdvP0Qa/N6Et9clUKfpXka zk6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=dEjhObeoLYo5bkbndho3KeoPPf8I0IhddokdBIOf3mE=; b=S7bQly75safADcL5Twn+2QV+g5e6Ygx6y9XDLyVt4HyitEvCGQxjoEhlBitYoAPjl5 QgneqRvLNBjuk6kUnIl/vuP6gHwgwLcj5PGHCKCJIAUISAoVRIuDd25HYNYshBY/p8sR 6/3t2+aCTb7R3y5R0iVYc6ydPnAGjM2Zu9+k5XoPnJZ8zlPkVsMVmlBehfFQYfE7cnnz NwdQaxAIpIzr1SIuoE5y2nB0jQXuxX4iSNXpEbPFFDtWLZSOKilyf69l8rhJx96mXKYx FbxcIWaREUliHyDTYzjwQ0gEm1eFjhXurkNS5E7enavi32DL2ESfcfg3kMcNFvgVl65i YVXQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kDE6tL5+; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e37si2812235plb.172.2019.01.15.01.15.36; Tue, 15 Jan 2019 01:15:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kDE6tL5+; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728310AbfAOJPf (ORCPT + 5 others); Tue, 15 Jan 2019 04:15:35 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:42698 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725929AbfAOJPf (ORCPT ); Tue, 15 Jan 2019 04:15:35 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0F9FUQw125989; Tue, 15 Jan 2019 03:15:30 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547543731; bh=dEjhObeoLYo5bkbndho3KeoPPf8I0IhddokdBIOf3mE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=kDE6tL5+dqCxh11MokblBJWTQhDy7GDPClgmAzo9HQ6/gewrUYDAl+iGUdaSxqwM2 PytJOUUh60Lj/6I3nkrYrgkQyOpID7K0zOXit+SZ96vh7C87OEY/Hc/K6j9qcQVa8/ okgCdtIPeTZYjonn6O28KGi51n5Gs1sFnZAM6Wwc= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0F9FUbU013223 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 15 Jan 2019 03:15:30 -0600 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Tue, 15 Jan 2019 03:15:29 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 15 Jan 2019 03:15:29 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0F9FNLh016112; Tue, 15 Jan 2019 03:15:26 -0600 From: Tero Kristo To: , , CC: , Subject: [PATCH 1/4] clk: ti: move clk_hw_omap list handling under generic part of the driver Date: Tue, 15 Jan 2019 11:15:12 +0200 Message-ID: <1547543715-16467-2-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1547543715-16467-1-git-send-email-t-kristo@ti.com> References: <1547543715-16467-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Currently the clk_hw_omap list is handled under the autoidle code, but it should be accessible generically. Add a few APIs towards this, and update the autoidle code to use the generic implementations. Signed-off-by: Tero Kristo --- drivers/clk/ti/autoidle.c | 65 +++++++++++++++++++---------------------------- drivers/clk/ti/clk.c | 42 ++++++++++++++++++++++++++++++ drivers/clk/ti/clock.h | 1 + 3 files changed, 69 insertions(+), 39 deletions(-) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/autoidle.c b/drivers/clk/ti/autoidle.c index 7bb9afb..a129b4b 100644 --- a/drivers/clk/ti/autoidle.c +++ b/drivers/clk/ti/autoidle.c @@ -35,7 +35,20 @@ struct clk_ti_autoidle { #define AUTOIDLE_LOW 0x1 static LIST_HEAD(autoidle_clks); -static LIST_HEAD(clk_hw_omap_clocks); + +static int _omap2_clk_deny_idle(struct clk_hw_omap *clk) +{ + if (clk->ops && clk->ops->deny_idle) + clk->ops->deny_idle(clk); + return 0; +} + +static int _omap2_clk_allow_idle(struct clk_hw_omap *clk) +{ + if (clk->ops && clk->ops->allow_idle) + clk->ops->allow_idle(clk); + return 0; +} /** * omap2_clk_deny_idle - disable autoidle on an OMAP clock @@ -45,12 +58,9 @@ struct clk_ti_autoidle { */ int omap2_clk_deny_idle(struct clk *clk) { - struct clk_hw_omap *c; + struct clk_hw_omap *c = to_clk_hw_omap(__clk_get_hw(clk)); - c = to_clk_hw_omap(__clk_get_hw(clk)); - if (c->ops && c->ops->deny_idle) - c->ops->deny_idle(c); - return 0; + return _omap2_clk_deny_idle(c); } /** @@ -61,12 +71,9 @@ int omap2_clk_deny_idle(struct clk *clk) */ int omap2_clk_allow_idle(struct clk *clk) { - struct clk_hw_omap *c; + struct clk_hw_omap *c = to_clk_hw_omap(__clk_get_hw(clk)); - c = to_clk_hw_omap(__clk_get_hw(clk)); - if (c->ops && c->ops->allow_idle) - c->ops->allow_idle(c); - return 0; + return _omap2_clk_allow_idle(c); } static void _allow_autoidle(struct clk_ti_autoidle *clk) @@ -168,26 +175,6 @@ int __init of_ti_clk_autoidle_setup(struct device_node *node) } /** - * omap2_init_clk_hw_omap_clocks - initialize an OMAP clock - * @hw: struct clk_hw * to initialize - * - * Add an OMAP clock @clk to the internal list of OMAP clocks. Used - * temporarily for autoidle handling, until this support can be - * integrated into the common clock framework code in some way. No - * return value. - */ -void omap2_init_clk_hw_omap_clocks(struct clk_hw *hw) -{ - struct clk_hw_omap *c; - - if (clk_hw_get_flags(hw) & CLK_IS_BASIC) - return; - - c = to_clk_hw_omap(hw); - list_add(&c->node, &clk_hw_omap_clocks); -} - -/** * omap2_clk_enable_autoidle_all - enable autoidle on all OMAP clocks that * support it * @@ -198,11 +185,11 @@ void omap2_init_clk_hw_omap_clocks(struct clk_hw *hw) */ int omap2_clk_enable_autoidle_all(void) { - struct clk_hw_omap *c; + int ret; - list_for_each_entry(c, &clk_hw_omap_clocks, node) - if (c->ops && c->ops->allow_idle) - c->ops->allow_idle(c); + ret = omap2_clk_for_each(_omap2_clk_allow_idle); + if (ret) + return ret; _clk_generic_allow_autoidle_all(); @@ -220,11 +207,11 @@ int omap2_clk_enable_autoidle_all(void) */ int omap2_clk_disable_autoidle_all(void) { - struct clk_hw_omap *c; + int ret; - list_for_each_entry(c, &clk_hw_omap_clocks, node) - if (c->ops && c->ops->deny_idle) - c->ops->deny_idle(c); + ret = omap2_clk_for_each(_omap2_clk_deny_idle); + if (ret) + return ret; _clk_generic_deny_autoidle_all(); diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c index d0cd585..8172843 100644 --- a/drivers/clk/ti/clk.c +++ b/drivers/clk/ti/clk.c @@ -31,6 +31,7 @@ #undef pr_fmt #define pr_fmt(fmt) "%s: " fmt, __func__ +static LIST_HEAD(clk_hw_omap_clocks); struct ti_clk_ll_ops *ti_clk_ll_ops; static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS]; @@ -517,3 +518,44 @@ struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw, return clk; } + +/** + * omap2_init_clk_hw_omap_clocks - initialize an OMAP clock + * @hw: struct clk_hw * to initialize + * + * Add an OMAP clock @clk to the internal list of OMAP clocks. Used + * temporarily for autoidle handling, until this support can be + * integrated into the common clock framework code in some way. No + * return value. + */ +void omap2_init_clk_hw_omap_clocks(struct clk_hw *hw) +{ + struct clk_hw_omap *c; + + c = to_clk_hw_omap(hw); + list_add(&c->node, &clk_hw_omap_clocks); +} + +/** + * omap2_clk_for_each - call function for each registered clk_hw_omap + * @fn: pointer to a callback function + * + * Call @fn for each registered clk_hw_omap, passing @hw to each + * function. @fn must return 0 for success or any other value for + * failure. If @fn returns non-zero, the iteration across clocks + * will stop and the non-zero return value will be passed to the + * caller of omap2_clk_for_each(). + */ +int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw)) +{ + int ret; + struct clk_hw_omap *hw; + + list_for_each_entry(hw, &clk_hw_omap_clocks, node) { + ret = (*fn)(hw); + if (ret) + break; + } + + return ret; +} diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h index 9f312a2..e5b8af3 100644 --- a/drivers/clk/ti/clock.h +++ b/drivers/clk/ti/clock.h @@ -301,6 +301,7 @@ long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw, unsigned long *parent_rate); int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, struct clk_rate_request *req); +int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw)); extern struct ti_clk_ll_ops *ti_clk_ll_ops; From patchwork Tue Jan 15 09:15:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 155645 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4650656jaa; Tue, 15 Jan 2019 01:15:40 -0800 (PST) X-Google-Smtp-Source: ALg8bN64yald9U5tAPF/HxpF9RC73sRbbFPbgOuJ64A67KeG1K9bQFWMC/J62YpWyUDVy+aAPwZ4 X-Received: by 2002:a63:8c6:: with SMTP id 189mr2947174pgi.322.1547543740161; Tue, 15 Jan 2019 01:15:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547543740; cv=none; d=google.com; s=arc-20160816; b=qLz8S12bGBYUa5IXTLPQhA9Zyfag6rXd9mUrcRdwV2/xUkMNWiK8VrJ6DMQ53KBbu2 lL3VhdYMacbzKsVJk3DV3+QUUz2OtgJ+UgfcZH/qiUJ1W8hCP/Zqu6GbVovNQ3Z60xns vA1pKuPyzf9feuxJHnehGAbsYyjx3f8ecjkNbgqokrCSEnrBdOV3eNECMLfBNGO3f2bI +Q5RFPUAMu4X80tPyzlgSADO5WgG3cRQ4fHHV7DGUq3b3mzJDp+Bvq88zbuFVMVjJ1I8 bvcxY7+ElS+WY7Rezpji1RuVxhS9fkgfRmihVKLgEp3+ErLyRxzda+PfOHUceIqndF77 NT1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=AUjqUXTUv6t7jIPtmRhlTHS2oJ7GrPvxwSKt3tsz4oI=; b=v0jwioQlIv8EARwYYAgdxs83nytE+YfxpaCFRtWPlTe6FWZH4ZZaJV1rdopqtHWATa PqgN/Fd81HCrGdXgzJeRoFD1LF4RfZunPBabEfaHmPjMgw0uqnty2XaBd6FW0VF1JVPm ywWyo3OxDrugdt1GBHmvlQyQxJD2VEx7YIXqMCK7ilgrD+uGnQt6jhp7WI+4v65NmfY3 FochZFduxxsS4/WTShONM7rfGDBcvzIGgsQcZYFiVBbBa5TuonR7HBS5pOajt6vbo7SA ghqz0y0ioCrA+Gwshbm50d3p6G448QDiq9+HAS9Gwzt0KSlJwjU0wTnyJ4mfiI9xGeKK meZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=t5MGrblB; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e37si2812235plb.172.2019.01.15.01.15.39; Tue, 15 Jan 2019 01:15:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=t5MGrblB; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728456AbfAOJPj (ORCPT + 5 others); Tue, 15 Jan 2019 04:15:39 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:40890 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725929AbfAOJPj (ORCPT ); Tue, 15 Jan 2019 04:15:39 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0F9FW27015989; Tue, 15 Jan 2019 03:15:32 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547543732; bh=AUjqUXTUv6t7jIPtmRhlTHS2oJ7GrPvxwSKt3tsz4oI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=t5MGrblBo4oZYYKF44/Ag32i+B/f4kwRMuY/uhJww/sbqyCjMgc6wV4Mqr1CEyGTi wCkqc2F9cCVdQVF7ia5bpifp63RRN4jq4WafPtCMpRPysMb38dRIvs9IhpG6NKFZQy ybPWDOCDrZIu31oK2Kb4f+jLGTrqEfMMf177iNBg= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0F9FWWK007623 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 15 Jan 2019 03:15:32 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Tue, 15 Jan 2019 03:15:31 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 15 Jan 2019 03:15:31 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0F9FNLi016112; Tue, 15 Jan 2019 03:15:30 -0600 From: Tero Kristo To: , , CC: , Subject: [PATCH 2/4] clk: ti: add new API for checking if a provided clock is an OMAP clock Date: Tue, 15 Jan 2019 11:15:13 +0200 Message-ID: <1547543715-16467-3-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1547543715-16467-1-git-send-email-t-kristo@ti.com> References: <1547543715-16467-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org omap2_clk_is_hw_omap can now be used to verify if the provided clk_hw is an omap HW clock or not. This is done to replace the usage of CLK_IS_BASIC flag within the TI clock drivers. Signed-off-by: Tero Kristo --- drivers/clk/ti/clk.c | 18 ++++++++++++++++++ drivers/clk/ti/clock.h | 1 + 2 files changed, 19 insertions(+) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c index 8172843..05f9d1a 100644 --- a/drivers/clk/ti/clk.c +++ b/drivers/clk/ti/clk.c @@ -559,3 +559,22 @@ int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw)) return ret; } + +/** + * omap2_clk_is_hw_omap - check if the provided clk_hw is OMAP clock + * @hw: clk_hw to check if it is an omap clock or not + * + * Checks if the provided clk_hw is OMAP clock or not. Returns true if + * it is, false otherwise. + */ +bool omap2_clk_is_hw_omap(struct clk_hw *hw) +{ + struct clk_hw_omap *oclk; + + list_for_each_entry(oclk, &clk_hw_omap_clocks, node) { + if (&oclk->hw == hw) + return true; + } + + return false; +} diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h index e5b8af3..034ff6a 100644 --- a/drivers/clk/ti/clock.h +++ b/drivers/clk/ti/clock.h @@ -302,6 +302,7 @@ long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw, int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, struct clk_rate_request *req); int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw)); +bool omap2_clk_is_hw_omap(struct clk_hw *hw); extern struct ti_clk_ll_ops *ti_clk_ll_ops; From patchwork Tue Jan 15 09:15:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 155646 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4650669jaa; Tue, 15 Jan 2019 01:15:40 -0800 (PST) X-Google-Smtp-Source: ALg8bN5+ayJZnweL/V93l9O2m9b7v2XibYifTJwtlw/bG76HALWmqPwFJlCat1HiM+UCoxSWO9Pz X-Received: by 2002:a17:902:59c8:: with SMTP id d8mr3074875plj.116.1547543740914; Tue, 15 Jan 2019 01:15:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547543740; cv=none; d=google.com; s=arc-20160816; b=0YJbewMtUccXoGixK++gBi8swIReKz1XXjtV9qaxeBbpr5f3E7cH9n4+9JeQa8g7qZ ainwLxe2Q3miSj4heOOB6vT7iEz8VovuLK4aZco+B7HcLAXNSIUSD3xjNeZu5/dFmj1y hGK/1uX8kq1f0LnV000fFISKOFML2NcdbzO9u8wg1TKZzcYOR45IgB17y1WksoMpZ1iV sqhpTg1Ohi9gbmhoO8eRmO5lomy5CaGmvcQvnw8iLg/hKuOeJpmcopkdlnUSa2Rl+o9z 0trVNiCPJDrNbj3XJ8N+jeYEO+Ku+ZIvxgac4xWr8VEWv2lS2ZaywGp+tVuUlGXFi45Y zc2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=T6PjqVkgv1u1cUd6qFRSr4ittLIj0ye68XBnBrorT5g=; b=IK70B5ISGLEuYwV9uqtitp4pUy+1qNYpr4j1BtX74sKwS9nE9sEFuZrjny69Bp8hLA NIWrHthNlMxg6/G8AT6lx66ykCJxZI1NmWlRhyuJU5/ht0a5fMG7TrhvggnDri4XTfSj +7NvoVZg+IKILPuoAJGr7NjFrd7Gz++R/eLLUiSYb+v9yMzOFH9KMMtR/uRqf0b6OH1a o196x0NCO/7jMKKXQ9trVEEOD3a7JT8nRkxBp51Ue/ZbT8rIhgnd9v9oNueJKOc54+q+ kVDaMqr8cNv0wn8aiIBnt+40Qon0EsziUV4wyQW22VJoVKbE7hQciR5/y04Bj9GfhNKx RjCw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=C8TvSnW7; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e37si2812235plb.172.2019.01.15.01.15.40; Tue, 15 Jan 2019 01:15:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=C8TvSnW7; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728583AbfAOJPk (ORCPT + 5 others); Tue, 15 Jan 2019 04:15:40 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:40898 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725929AbfAOJPj (ORCPT ); Tue, 15 Jan 2019 04:15:39 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0F9FatA016112; Tue, 15 Jan 2019 03:15:36 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547543736; bh=T6PjqVkgv1u1cUd6qFRSr4ittLIj0ye68XBnBrorT5g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=C8TvSnW7JCUHG3XDZ1Q7xLlstgXXMuJTSJRuAZDrb9fV8ysPEcycAWqw1mUg9uN0s Ot0LWkYlNIperKLq0tqXXutBOketC7hLh3k8ET9v4TWwDR8UG+rCqJDGnjDDRYcRQA ciwEq+d0uTDdcjh5oi9Ky1d9KAcHeJpRIoMH4b40= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0F9FaAT013313 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 15 Jan 2019 03:15:36 -0600 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Tue, 15 Jan 2019 03:15:35 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 15 Jan 2019 03:15:35 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0F9FNLj016112; Tue, 15 Jan 2019 03:15:32 -0600 From: Tero Kristo To: , , CC: , Subject: [PATCH 3/4] clk: ti: remove usage of CLK_IS_BASIC Date: Tue, 15 Jan 2019 11:15:14 +0200 Message-ID: <1547543715-16467-4-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1547543715-16467-1-git-send-email-t-kristo@ti.com> References: <1547543715-16467-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Remove the usage of CLK_IS_BASIC flag completely from TI clock driver. In most cases, the use is completely redundant, but in some cases we need to use the new API to check if the clock is an OMAP clock or not. Signed-off-by: Tero Kristo --- drivers/clk/ti/adpll.c | 2 +- drivers/clk/ti/clkctrl.c | 2 +- drivers/clk/ti/clockdomain.c | 2 +- drivers/clk/ti/divider.c | 2 +- drivers/clk/ti/dpll3xxx.c | 2 +- drivers/clk/ti/mux.c | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/adpll.c b/drivers/clk/ti/adpll.c index 688e403..0c21098 100644 --- a/drivers/clk/ti/adpll.c +++ b/drivers/clk/ti/adpll.c @@ -614,7 +614,7 @@ static int ti_adpll_init_clkout(struct ti_adpll_data *d, init.name = child_name; init.ops = ops; - init.flags = CLK_IS_BASIC; + init.flags = 0; co->hw.init = &init; parent_names[0] = __clk_get_name(clk0); parent_names[1] = __clk_get_name(clk1); diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c index 40630eb..bf32d99 100644 --- a/drivers/clk/ti/clkctrl.c +++ b/drivers/clk/ti/clkctrl.c @@ -276,7 +276,7 @@ static struct clk_hw *_ti_omap4_clkctrl_xlate(struct of_phandle_args *clkspec, init.parent_names = parents; init.num_parents = num_parents; init.ops = ops; - init.flags = CLK_IS_BASIC; + init.flags = 0; clk = ti_clk_register(NULL, clk_hw, init.name); if (IS_ERR_OR_NULL(clk)) { diff --git a/drivers/clk/ti/clockdomain.c b/drivers/clk/ti/clockdomain.c index 07a8051..423a99b 100644 --- a/drivers/clk/ti/clockdomain.c +++ b/drivers/clk/ti/clockdomain.c @@ -143,7 +143,7 @@ static void __init of_ti_clockdomain_setup(struct device_node *node) continue; } clk_hw = __clk_get_hw(clk); - if (clk_hw_get_flags(clk_hw) & CLK_IS_BASIC) { + if (!omap2_clk_is_hw_omap(clk_hw)) { pr_warn("can't setup clkdm for basic clk %s\n", __clk_get_name(clk)); continue; diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c index 8d77090..cb5a819 100644 --- a/drivers/clk/ti/divider.c +++ b/drivers/clk/ti/divider.c @@ -336,7 +336,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, init.name = name; init.ops = &ti_clk_divider_ops; - init.flags = flags | CLK_IS_BASIC; + init.flags = flags; init.parent_names = (parent_name ? &parent_name : NULL); init.num_parents = (parent_name ? 1 : 0); diff --git a/drivers/clk/ti/dpll3xxx.c b/drivers/clk/ti/dpll3xxx.c index 44b6b64..3dde6c8 100644 --- a/drivers/clk/ti/dpll3xxx.c +++ b/drivers/clk/ti/dpll3xxx.c @@ -731,7 +731,7 @@ static struct clk_hw_omap *omap3_find_clkoutx2_dpll(struct clk_hw *hw) do { do { hw = clk_hw_get_parent(hw); - } while (hw && (clk_hw_get_flags(hw) & CLK_IS_BASIC)); + } while (hw && (!omap2_clk_is_hw_omap(hw))); if (!hw) break; pclk = to_clk_hw_omap(hw); diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c index 883bdde..b7f9a4f 100644 --- a/drivers/clk/ti/mux.c +++ b/drivers/clk/ti/mux.c @@ -143,7 +143,7 @@ static struct clk *_register_mux(struct device *dev, const char *name, init.name = name; init.ops = &ti_clk_mux_ops; - init.flags = flags | CLK_IS_BASIC; + init.flags = flags; init.parent_names = parent_names; init.num_parents = num_parents; From patchwork Tue Jan 15 09:15:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 155647 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4650752jaa; Tue, 15 Jan 2019 01:15:48 -0800 (PST) X-Google-Smtp-Source: ALg8bN5t2dOuwKJMoUdyTTC7lG4irAyQxsA4OG3PP4jr8IOGRtdSumzJqZHCOHHWYJVDoEy0MJYs X-Received: by 2002:a63:4e41:: with SMTP id o1mr2977120pgl.282.1547543748150; Tue, 15 Jan 2019 01:15:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547543748; cv=none; d=google.com; s=arc-20160816; b=a/iiEQOUB+YCKeQS9RW3rGqU+IbRE2UIMR1MmfK/WkLc97SIoI5ZJoOgEq9tupO47w pzA8aBoH9hpDn1XrEQxiG0g+A+yjhYatE8ZwLbwol4OuPd7QoXCvcrywKO8w/kp3SQGX pWstVm7+vTqezBhWITGe1v2JW0+CSihGOQrYEK6mQEf7aLHtN7/AgwTE+s0+HjeSkmcR njPJh+40JY8cTvxKtjQEHW7uNeEkyWqsa6DlfsgkuMXhD4lA3EnFhRmBLxM7zRBTxe+n cjwllyprr9DncHto3Vft1HVquv+njFtLhcv1UchrZWuU7diZDi8gTcSigz1v4TfDi9eM BV5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=YyAevtOju3LVdkVqSdHobKFV916q4x1QJDl5FXNzNo0=; b=IzdzcCQIg9VnItHlQ6s/mDZE9jwMbpJGvKC7G1HCSlsWleu2z5DqsUVdOnjrbuRAjf xumyjk1xpcJ9dC1UwRkzVWaL02eq+Qk3Log5W9Ohp0av2dnX6MaEO5mByrIKUXX0LsN0 9f9urzvl2+ER8c2AR87NAPTAjFxS8pMX5WcB4rMkL5f/cym4Ta5Ggd1+yewBHY8ADfGI 3vlbQXJ+YMhquYqeiWheblVOLL4GCDAFxlaNP0sIv6Lo4IM+fRodXHIuEKyR2SXNZ0Vg mp2DeCBu11h3TL2jH0bgJc/Mkk2yWU2dyO3Fp7XYY9KbeIfOtOjqSqWvMEXOyQfeI29+ TjtA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Wtumu0Ak; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Also, get rid of the now redundant API for adding the clocks to the OMAP HW clocks list; instead this is used directly from the register API. Signed-off-by: Tero Kristo --- drivers/clk/ti/apll.c | 4 ++-- drivers/clk/ti/clk.c | 31 +++++++++++++++++++++---------- drivers/clk/ti/clock.h | 3 ++- drivers/clk/ti/dpll.c | 11 ++++------- drivers/clk/ti/gate.c | 2 +- drivers/clk/ti/interface.c | 4 +--- 6 files changed, 31 insertions(+), 24 deletions(-) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c index 222f68b..015a657 100644 --- a/drivers/clk/ti/apll.c +++ b/drivers/clk/ti/apll.c @@ -165,7 +165,7 @@ static void __init omap_clk_register_apll(void *user, ad->clk_bypass = __clk_get_hw(clk); - clk = ti_clk_register(NULL, &clk_hw->hw, node->name); + clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, node->name); if (!IS_ERR(clk)) { of_clk_add_provider(node, of_clk_src_simple_get, clk); kfree(clk_hw->hw.init->parent_names); @@ -402,7 +402,7 @@ static void __init of_omap2_apll_setup(struct device_node *node) if (ret) goto cleanup; - clk = clk_register(NULL, &clk_hw->hw); + clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, node->name); if (!IS_ERR(clk)) { of_clk_add_provider(node, of_clk_src_simple_get, clk); kfree(init); diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c index 05f9d1a..e26cd1d 100644 --- a/drivers/clk/ti/clk.c +++ b/drivers/clk/ti/clk.c @@ -520,20 +520,31 @@ struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw, } /** - * omap2_init_clk_hw_omap_clocks - initialize an OMAP clock - * @hw: struct clk_hw * to initialize + * ti_clk_register_omap_hw - register a clk_hw_omap to the clock framework + * @dev: device for this clock + * @hw: hardware clock handle + * @con: connection ID for this clock * - * Add an OMAP clock @clk to the internal list of OMAP clocks. Used - * temporarily for autoidle handling, until this support can be - * integrated into the common clock framework code in some way. No - * return value. + * Registers a clk_hw_omap clock to the clock framewor, adds a clock alias + * for it, and adds the list to the available clk_hw_omap type clocks. + * Returns a handle to the registered clock if successful, ERR_PTR value + * in failure. */ -void omap2_init_clk_hw_omap_clocks(struct clk_hw *hw) +struct clk *ti_clk_register_omap_hw(struct device *dev, struct clk_hw *hw, + const char *con) { - struct clk_hw_omap *c; + struct clk *clk; + struct clk_hw_omap *oclk; - c = to_clk_hw_omap(hw); - list_add(&c->node, &clk_hw_omap_clocks); + clk = ti_clk_register(dev, hw, con); + if (IS_ERR(clk)) + return clk; + + oclk = to_clk_hw_omap(hw); + + list_add(&oclk->node, &clk_hw_omap_clocks); + + return clk; } /** diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h index 034ff6a..1c0fac5 100644 --- a/drivers/clk/ti/clock.h +++ b/drivers/clk/ti/clock.h @@ -203,6 +203,8 @@ struct omap_clkctrl_data { struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw, const char *con); +struct clk *ti_clk_register_omap_hw(struct device *dev, struct clk_hw *hw, + const char *con); int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con); void ti_clk_add_aliases(void); @@ -221,7 +223,6 @@ int ti_clk_retry_init(struct device_node *node, void *user, ti_of_clk_init_cb_t func); int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type); -void omap2_init_clk_hw_omap_clocks(struct clk_hw *hw); int of_ti_clk_autoidle_setup(struct device_node *node); void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks); diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c index 6c3329b..659dadb 100644 --- a/drivers/clk/ti/dpll.c +++ b/drivers/clk/ti/dpll.c @@ -192,10 +192,9 @@ static void __init _register_dpll(void *user, dd->clk_bypass = __clk_get_hw(clk); /* register the clock */ - clk = ti_clk_register(NULL, &clk_hw->hw, node->name); + clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, node->name); if (!IS_ERR(clk)) { - omap2_init_clk_hw_omap_clocks(&clk_hw->hw); of_clk_add_provider(node, of_clk_src_simple_get, clk); kfree(clk_hw->hw.init->parent_names); kfree(clk_hw->hw.init); @@ -265,14 +264,12 @@ static void _register_dpll_x2(struct device_node *node, #endif /* register the clock */ - clk = ti_clk_register(NULL, &clk_hw->hw, name); + clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name); - if (IS_ERR(clk)) { + if (IS_ERR(clk)) kfree(clk_hw); - } else { - omap2_init_clk_hw_omap_clocks(&clk_hw->hw); + else of_clk_add_provider(node, of_clk_src_simple_get, clk); - } } #endif diff --git a/drivers/clk/ti/gate.c b/drivers/clk/ti/gate.c index 1c78fff..504c0e9 100644 --- a/drivers/clk/ti/gate.c +++ b/drivers/clk/ti/gate.c @@ -123,7 +123,7 @@ static struct clk *_register_gate(struct device *dev, const char *name, init.flags = flags; - clk = ti_clk_register(NULL, &clk_hw->hw, name); + clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name); if (IS_ERR(clk)) kfree(clk_hw); diff --git a/drivers/clk/ti/interface.c b/drivers/clk/ti/interface.c index 87e00c2..83e3442 100644 --- a/drivers/clk/ti/interface.c +++ b/drivers/clk/ti/interface.c @@ -57,12 +57,10 @@ static struct clk *_register_interface(struct device *dev, const char *name, init.num_parents = 1; init.parent_names = &parent_name; - clk = ti_clk_register(NULL, &clk_hw->hw, name); + clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name); if (IS_ERR(clk)) kfree(clk_hw); - else - omap2_init_clk_hw_omap_clocks(&clk_hw->hw); return clk; }