From patchwork Fri Jun 10 10:55:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 581040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01D16C43334 for ; Fri, 10 Jun 2022 10:58:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349151AbiFJK6A (ORCPT ); Fri, 10 Jun 2022 06:58:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349248AbiFJK5n (ORCPT ); Fri, 10 Jun 2022 06:57:43 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 430C72178B9; Fri, 10 Jun 2022 03:55:30 -0700 (PDT) X-UUID: 55f0601a910640398ce8a765dfde1784-20220610 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5, REQID:958443af-c5cf-411b-8bbc-fc564b166e46, OB:0, LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:2a19b09, CLOUDID:12d767e5-2ba2-4dc1-b6c5-11feb6c769e0, C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:0,BEC:nil X-UUID: 55f0601a910640398ce8a765dfde1784-20220610 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 214986410; Fri, 10 Jun 2022 18:55:25 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 10 Jun 2022 18:55:23 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Fri, 10 Jun 2022 18:55:23 +0800 From: Bo-Chen Chen To: , , , , , , , , , CC: , , , , , , , , , , , , , Bo-Chen Chen Subject: [PATCH v11 02/10] drm/edid: Convert cea_sad helper struct to kernelDoc Date: Fri, 10 Jun 2022 18:55:14 +0800 Message-ID: <20220610105522.13449-3-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220610105522.13449-1-rex-bc.chen@mediatek.com> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org From: Guillaume Ranquet To illustrate the cea_sad helper struct more clear, we convert the driver comments to kernelDoc. Signed-off-by: Guillaume Ranquet [Bo-Chen: Add commit message and modify reviewers' comments.] Signed-off-by: Bo-Chen Chen Reviewed-by: AngeloGioacchino Del Regno --- include/drm/drm_edid.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index b2756753370b..c2c43a4af681 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -359,12 +359,18 @@ struct edid { #define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8)) -/* Short Audio Descriptor */ +/** + * struct cea_sad - CEA Short Audio Descriptor. + * @format: See HDMI_AUDIO_CODING_TYPE_*. + * @channels: max number of channels - 1. + * @freq: See CEA_SAD_FREQ_*. + * @byte2: meaning depends on format. + */ struct cea_sad { u8 format; - u8 channels; /* max number of channels - 1 */ + u8 channels; u8 freq; - u8 byte2; /* meaning depends on format */ + u8 byte2; }; struct drm_encoder; From patchwork Fri Jun 10 10:55:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 581039 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8CBA1C433EF for ; Fri, 10 Jun 2022 10:58:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349139AbiFJK6B (ORCPT ); Fri, 10 Jun 2022 06:58:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42524 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349275AbiFJK5n (ORCPT ); Fri, 10 Jun 2022 06:57:43 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43DC221CBC8; Fri, 10 Jun 2022 03:55:30 -0700 (PDT) X-UUID: 112acddfabf84c379a2bd87e7ae1c680-20220610 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5, REQID:51dc1a5c-bb99-4e30-966e-e563bf21c800, OB:0, LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:2a19b09, CLOUDID:652ff27e-c8dc-403a-96e8-6237210dceee, C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:0,BEC:nil X-UUID: 112acddfabf84c379a2bd87e7ae1c680-20220610 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1055446036; Fri, 10 Jun 2022 18:55:25 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 10 Jun 2022 18:55:23 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Fri, 10 Jun 2022 18:55:23 +0800 From: Bo-Chen Chen To: , , , , , , , , , CC: , , , , , , , , , , , , , Bo-Chen Chen Subject: [PATCH v11 04/10] video/hdmi: Add audio_infoframe packing for DP Date: Fri, 10 Jun 2022 18:55:16 +0800 Message-ID: <20220610105522.13449-5-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220610105522.13449-1-rex-bc.chen@mediatek.com> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org From: Markus Schneider-Pargmann Similar to HDMI, DP uses audio infoframes as well which are structured very similar to the HDMI ones. This patch adds a helper function to pack the HDMI audio infoframe for DP, called hdmi_audio_infoframe_pack_for_dp(). hdmi_audio_infoframe_pack_only() is split into two parts. One of them packs the payload only and can be used for HDMI and DP. Also constify the frame parameter in hdmi_audio_infoframe_check() as it is passed to hdmi_audio_infoframe_check_only() which expects a const. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Guillaume Ranquet [Bo-Chen: Modify reviewers' comment] Signed-off-by: Bo-Chen Chen --- drivers/video/hdmi.c | 82 +++++++++++++++++++++++++++--------- include/drm/display/drm_dp.h | 2 + include/linux/hdmi.h | 7 ++- 3 files changed, 71 insertions(+), 20 deletions(-) diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c index 947be761dfa4..86805d77cc86 100644 --- a/drivers/video/hdmi.c +++ b/drivers/video/hdmi.c @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ +#include #include #include #include @@ -381,12 +382,34 @@ static int hdmi_audio_infoframe_check_only(const struct hdmi_audio_infoframe *fr * * Returns 0 on success or a negative error code on failure. */ -int hdmi_audio_infoframe_check(struct hdmi_audio_infoframe *frame) +int hdmi_audio_infoframe_check(const struct hdmi_audio_infoframe *frame) { return hdmi_audio_infoframe_check_only(frame); } EXPORT_SYMBOL(hdmi_audio_infoframe_check); +static void +hdmi_audio_infoframe_pack_payload(const struct hdmi_audio_infoframe *frame, + u8 *buffer) +{ + u8 channels; + + if (frame->channels >= 2) + channels = frame->channels - 1; + else + channels = 0; + + buffer[0] = ((frame->coding_type & 0xf) << 4) | (channels & 0x7); + buffer[1] = ((frame->sample_frequency & 0x7) << 2) | + (frame->sample_size & 0x3); + buffer[2] = frame->coding_type_ext & 0x1f; + buffer[3] = frame->channel_allocation; + buffer[4] = (frame->level_shift_value & 0xf) << 3; + + if (frame->downmix_inhibit) + buffer[4] |= BIT(7); +} + /** * hdmi_audio_infoframe_pack_only() - write HDMI audio infoframe to binary buffer * @frame: HDMI audio infoframe @@ -404,7 +427,6 @@ EXPORT_SYMBOL(hdmi_audio_infoframe_check); ssize_t hdmi_audio_infoframe_pack_only(const struct hdmi_audio_infoframe *frame, void *buffer, size_t size) { - unsigned char channels; u8 *ptr = buffer; size_t length; int ret; @@ -420,28 +442,13 @@ ssize_t hdmi_audio_infoframe_pack_only(const struct hdmi_audio_infoframe *frame, memset(buffer, 0, size); - if (frame->channels >= 2) - channels = frame->channels - 1; - else - channels = 0; - ptr[0] = frame->type; ptr[1] = frame->version; ptr[2] = frame->length; ptr[3] = 0; /* checksum */ - /* start infoframe payload */ - ptr += HDMI_INFOFRAME_HEADER_SIZE; - - ptr[0] = ((frame->coding_type & 0xf) << 4) | (channels & 0x7); - ptr[1] = ((frame->sample_frequency & 0x7) << 2) | - (frame->sample_size & 0x3); - ptr[2] = frame->coding_type_ext & 0x1f; - ptr[3] = frame->channel_allocation; - ptr[4] = (frame->level_shift_value & 0xf) << 3; - - if (frame->downmix_inhibit) - ptr[4] |= BIT(7); + hdmi_audio_infoframe_pack_payload(frame, + ptr + HDMI_INFOFRAME_HEADER_SIZE); hdmi_infoframe_set_checksum(buffer, length); @@ -479,6 +486,43 @@ ssize_t hdmi_audio_infoframe_pack(struct hdmi_audio_infoframe *frame, } EXPORT_SYMBOL(hdmi_audio_infoframe_pack); +/** + * hdmi_audio_infoframe_pack_for_dp - Pack a HDMI Audio infoframe for DisplayPort + * + * @frame: HDMI Audio infoframe + * @sdp: secondary data packet for display port. This is filled with the + * appropriate: data + * @dp_version: Display Port version to be encoded in the header + * + * Packs a HDMI Audio Infoframe to be sent over Display Port. This function + * fills the secondary data packet to be used for Display Port. + * + * Return: Number of total written bytes or a negative errno on failure. + */ +ssize_t +hdmi_audio_infoframe_pack_for_dp(const struct hdmi_audio_infoframe *frame, + struct dp_sdp *sdp, u8 dp_version) +{ + int ret; + + ret = hdmi_audio_infoframe_check(frame); + if (ret) + return ret; + + memset(sdp->db, 0, sizeof(sdp->db)); + + /* Secondary-data packet header */ + sdp->sdp_header.HB0 = 0; + sdp->sdp_header.HB1 = frame->type; + sdp->sdp_header.HB2 = DP_SDP_AUDIO_INFOFRAME_HB2; + sdp->sdp_header.HB3 = (dp_version & 0x3f) << 2; + + hdmi_audio_infoframe_pack_payload(frame, sdp->db); + + return frame->length + 4; +} +EXPORT_SYMBOL(hdmi_audio_infoframe_pack_for_dp); + /** * hdmi_vendor_infoframe_init() - initialize an HDMI vendor infoframe * @frame: HDMI vendor infoframe diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index 9e3aff7e68bb..6c0871164771 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -1536,6 +1536,8 @@ enum drm_dp_phy { #define DP_SDP_VSC_EXT_CEA 0x21 /* DP 1.4 */ /* 0x80+ CEA-861 infoframe types */ +#define DP_SDP_AUDIO_INFOFRAME_HB2 0x1b + /** * struct dp_sdp_header - DP secondary data packet header * @HB0: Secondary Data Packet ID diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h index c8ec982ff498..2f4dcc8d060e 100644 --- a/include/linux/hdmi.h +++ b/include/linux/hdmi.h @@ -336,7 +336,12 @@ ssize_t hdmi_audio_infoframe_pack(struct hdmi_audio_infoframe *frame, void *buffer, size_t size); ssize_t hdmi_audio_infoframe_pack_only(const struct hdmi_audio_infoframe *frame, void *buffer, size_t size); -int hdmi_audio_infoframe_check(struct hdmi_audio_infoframe *frame); +int hdmi_audio_infoframe_check(const struct hdmi_audio_infoframe *frame); + +struct dp_sdp; +ssize_t +hdmi_audio_infoframe_pack_for_dp(const struct hdmi_audio_infoframe *frame, + struct dp_sdp *sdp, u8 dp_version); enum hdmi_3d_structure { HDMI_3D_STRUCTURE_INVALID = -1, From patchwork Fri Jun 10 10:55:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 581038 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15460CCA482 for ; Fri, 10 Jun 2022 10:58:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349294AbiFJK6G (ORCPT ); Fri, 10 Jun 2022 06:58:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349279AbiFJK5p (ORCPT ); Fri, 10 Jun 2022 06:57:45 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 439FC218A8C; Fri, 10 Jun 2022 03:55:30 -0700 (PDT) X-UUID: 10722f3f002848cdb07303dfdbd2942c-20220610 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5, REQID:f563f45c-d43f-4586-86ef-30a230c45275, OB:0, LO B:0,IP:0,URL:5,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACT ION:release,TS:0 X-CID-META: VersionHash:2a19b09, CLOUDID:18d767e5-2ba2-4dc1-b6c5-11feb6c769e0, C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:1,File:nil ,QS:0,BEC:nil X-UUID: 10722f3f002848cdb07303dfdbd2942c-20220610 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1814500627; Fri, 10 Jun 2022 18:55:25 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 10 Jun 2022 18:55:24 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Fri, 10 Jun 2022 18:55:24 +0800 From: Bo-Chen Chen To: , , , , , , , , , CC: , , , , , , , , , , , , , Bo-Chen Chen Subject: [PATCH v11 06/10] drm/mediatek: Add MT8195 External DisplayPort support Date: Fri, 10 Jun 2022 18:55:18 +0800 Message-ID: <20220610105522.13449-7-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220610105522.13449-1-rex-bc.chen@mediatek.com> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org From: Guillaume Ranquet This patch adds External DisplayPort support to the mt8195 eDP driver. Signed-off-by: Guillaume Ranquet [Bo-Chen: Move some dp features here and modify for reviewers' comments.] Signed-off-by: Bo-Chen Chen --- drivers/gpu/drm/mediatek/mtk_dp.c | 217 ++++++++++++++++++++++++------ 1 file changed, 174 insertions(+), 43 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c index e33b513469e8..7c2bb2a494dd 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp.c +++ b/drivers/gpu/drm/mediatek/mtk_dp.c @@ -124,6 +124,7 @@ struct mtk_dp { bool enabled; + bool has_fec; /* protect the mtk_dp struct */ struct mutex dp_lock; @@ -138,6 +139,11 @@ static struct regmap_config mtk_dp_regmap_config = { .name = "mtk-dp-registers", }; +static bool mtk_dp_is_edp(struct mtk_dp *mtk_dp) +{ + return mtk_dp->next_bridge; +} + static struct mtk_dp *mtk_dp_from_bridge(struct drm_bridge *b) { return container_of(b, struct mtk_dp, bridge); @@ -414,6 +420,20 @@ static bool mtk_dp_plug_state(struct mtk_dp *mtk_dp) HPD_DB_DP_TRANS_P0_MASK); } +static bool mtk_dp_plug_state_avoid_pulse(struct mtk_dp *mtk_dp) +{ + int wait; + + for (wait = 7; !mtk_dp_plug_state(mtk_dp) && wait > 0; --wait) + /* Avoid short pulses on the HPD isr */ + usleep_range(1000, 5000); + + if (wait == 0) + return false; + + return true; +} + static void mtk_dp_aux_irq_clear(struct mtk_dp *mtk_dp) { mtk_dp_write(mtk_dp, MTK_DP_AUX_P0_3640, @@ -638,6 +658,13 @@ static void mtk_dp_reset_swing_pre_emphasis(struct mtk_dp *mtk_dp) DP_TX3_PRE_EMPH_MASK); } +static void mtk_dp_fec_enable(struct mtk_dp *mtk_dp, bool enable) +{ + mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3540, + enable ? BIT(FEC_EN_DP_TRANS_P0_SHIFT) : 0, + FEC_EN_DP_TRANS_P0_MASK); +} + static u32 mtk_dp_swirq_get_clear(struct mtk_dp *mtk_dp) { u32 irq_status = mtk_dp_read(mtk_dp, MTK_DP_TRANS_P0_35D0) & @@ -865,35 +892,67 @@ static void mtk_dp_get_calibration_data(struct mtk_dp *mtk_dp) return; } - cal_data->glb_bias_trim = - check_cal_data_valid(mtk_dp, 1, 0x1e, - (buf[3] >> 27) & 0x1f, 0xf); - cal_data->clktx_impse = - check_cal_data_valid(mtk_dp, 1, 0xe, - (buf[0] >> 9) & 0xf, 0x8); - cal_data->ln_tx_impsel_pmos[0] = - check_cal_data_valid(mtk_dp, 1, 0xe, - (buf[2] >> 28) & 0xf, 0x8); - cal_data->ln_tx_impsel_nmos[0] = - check_cal_data_valid(mtk_dp, 1, 0xe, - (buf[2] >> 24) & 0xf, 0x8); - cal_data->ln_tx_impsel_pmos[1] = - check_cal_data_valid(mtk_dp, 1, 0xe, - (buf[2] >> 20) & 0xf, 0x8); - cal_data->ln_tx_impsel_nmos[1] = - check_cal_data_valid(mtk_dp, 1, 0xe, - (buf[2] >> 16) & 0xf, 0x8); - cal_data->ln_tx_impsel_pmos[2] = - check_cal_data_valid(mtk_dp, 1, 0xe, - (buf[2] >> 12) & 0xf, 0x8); - cal_data->ln_tx_impsel_nmos[2] = - check_cal_data_valid(mtk_dp, 1, 0xe, - (buf[2] >> 8) & 0xf, 0x8); - cal_data->ln_tx_impsel_pmos[3] = - check_cal_data_valid(mtk_dp, 1, 0xe, - (buf[2] >> 4) & 0xf, 0x8); - cal_data->ln_tx_impsel_nmos[3] = - check_cal_data_valid(mtk_dp, 1, 0xe, buf[2] & 0xf, 0x8); + if (mtk_dp_is_edp(mtk_dp)) { + cal_data->glb_bias_trim = + check_cal_data_valid(mtk_dp, 1, 0x1e, + (buf[3] >> 27) & 0x1f, 0xf); + cal_data->clktx_impse = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[0] >> 9) & 0xf, 0x8); + cal_data->ln_tx_impsel_pmos[0] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[2] >> 28) & 0xf, 0x8); + cal_data->ln_tx_impsel_nmos[0] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[2] >> 24) & 0xf, 0x8); + cal_data->ln_tx_impsel_pmos[1] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[2] >> 20) & 0xf, 0x8); + cal_data->ln_tx_impsel_nmos[1] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[2] >> 16) & 0xf, 0x8); + cal_data->ln_tx_impsel_pmos[2] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[2] >> 12) & 0xf, 0x8); + cal_data->ln_tx_impsel_nmos[2] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[2] >> 8) & 0xf, 0x8); + cal_data->ln_tx_impsel_pmos[3] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[2] >> 4) & 0xf, 0x8); + cal_data->ln_tx_impsel_nmos[3] = + check_cal_data_valid(mtk_dp, 1, 0xe, buf[2] & 0xf, 0x8); + } else { + cal_data->glb_bias_trim = + check_cal_data_valid(mtk_dp, 1, 0x1e, + (buf[0] >> 27) & 0x1f, 0xf); + cal_data->clktx_impse = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[0] >> 13) & 0xf, 0x8); + cal_data->ln_tx_impsel_pmos[0] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[1] >> 28) & 0xf, 0x8); + cal_data->ln_tx_impsel_nmos[0] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[1] >> 24) & 0xf, 0x8); + cal_data->ln_tx_impsel_pmos[1] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[1] >> 20) & 0xf, 0x8); + cal_data->ln_tx_impsel_nmos[1] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[1] >> 16) & 0xf, 0x8); + cal_data->ln_tx_impsel_pmos[2] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[1] >> 12) & 0xf, 0x8); + cal_data->ln_tx_impsel_nmos[2] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[1] >> 8) & 0xf, 0x8); + cal_data->ln_tx_impsel_pmos[3] = + check_cal_data_valid(mtk_dp, 1, 0xe, + (buf[1] >> 4) & 0xf, 0x8); + cal_data->ln_tx_impsel_nmos[3] = + check_cal_data_valid(mtk_dp, 1, 0xe, buf[1] & 0xf, 0x8); + } kfree(buf); } @@ -1021,7 +1080,10 @@ static void mtk_dp_video_mute(struct mtk_dp *mtk_dp, bool enable) VIDEO_MUTE_SEL_DP_ENC0_P0_MASK | VIDEO_MUTE_SW_DP_ENC0_P0_MASK); - mtk_dp_sip_atf_call(mtk_dp, MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE, enable); + mtk_dp_sip_atf_call(mtk_dp, + mtk_dp_is_edp(mtk_dp) ? + MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE : + MTK_DP_SIP_ATF_VIDEO_UNMUTE, enable); } static void mtk_dp_power_enable(struct mtk_dp *mtk_dp) @@ -1069,6 +1131,8 @@ static void mtk_dp_initialize_priv_data(struct mtk_dp *mtk_dp) mtk_dp->info.depth = DP_MSA_MISC_8_BPC; memset(&mtk_dp->info.timings, 0, sizeof(struct mtk_dp_timings)); mtk_dp->info.timings.frame_rate = 60; + + mtk_dp->has_fec = false; } static void mtk_dp_setup_tu(struct mtk_dp *mtk_dp) @@ -1416,6 +1480,9 @@ static int mtk_dp_parse_capabilities(struct mtk_dp *mtk_dp) drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D0); usleep_range(2000, 5000); + if (!mtk_dp_plug_state(mtk_dp)) + return -ENODEV; + drm_dp_read_dpcd_caps(&mtk_dp->aux, mtk_dp->rx_cap); mtk_dp->rx_cap[DP_TRAINING_AUX_RD_INTERVAL] &= DP_TRAINING_AUX_RD_MASK; @@ -1461,6 +1528,9 @@ static int mtk_dp_train_start(struct mtk_dp *mtk_dp) u8 train_limit; u8 max_link_rate; + if (!mtk_dp_plug_state_avoid_pulse(mtk_dp)) + return -ENODEV; + link_rate = mtk_dp->rx_cap[1]; lane_count = mtk_dp->rx_cap[2] & 0x1F; @@ -1602,21 +1672,46 @@ static void mtk_dp_init_port(struct mtk_dp *mtk_dp) static irqreturn_t mtk_dp_hpd_event_thread(int hpd, void *dev) { struct mtk_dp *mtk_dp = dev; + int event; u8 buf[DP_RECEIVER_CAP_SIZE] = {}; + event = mtk_dp_plug_state(mtk_dp) ? + connector_status_connected : connector_status_disconnected; + + if (event < 0) + return IRQ_HANDLED; + + dev_info(mtk_dp->dev, "drm_helper_hpd_irq_event\n"); + drm_helper_hpd_irq_event(mtk_dp->bridge.dev); + if (mtk_dp->train_info.cable_state_change) { mtk_dp->train_info.cable_state_change = false; - mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE, - DP_PWR_STATE_BANDGAP_TPLL_LANE, - DP_PWR_STATE_MASK); - drm_dp_read_dpcd_caps(&mtk_dp->aux, buf); - mtk_dp->train_info.link_rate = - min_t(int, mtk_dp->max_linkrate, - buf[mtk_dp->max_linkrate]); - mtk_dp->train_info.lane_count = - min_t(int, mtk_dp->max_lanes, - drm_dp_max_lane_count(buf)); + mtk_dp->train_state = MTK_DP_TRAIN_STATE_TRAINING; + + if (!mtk_dp->train_info.cable_plugged_in) { + mtk_dp_video_mute(mtk_dp, true); + + mtk_dp_initialize_priv_data(mtk_dp); + mtk_dp_set_idle_pattern(mtk_dp, true); + if (mtk_dp->has_fec) + mtk_dp_fec_enable(mtk_dp, false); + + mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE, + DP_PWR_STATE_BANDGAP_TPLL, + DP_PWR_STATE_MASK); + } else { + mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE, + DP_PWR_STATE_BANDGAP_TPLL_LANE, + DP_PWR_STATE_MASK); + drm_dp_read_dpcd_caps(&mtk_dp->aux, buf); + mtk_dp->train_info.link_rate = + min_t(int, mtk_dp->max_linkrate, + buf[mtk_dp->max_linkrate]); + mtk_dp->train_info.lane_count = + min_t(int, mtk_dp->max_lanes, + drm_dp_max_lane_count(buf)); + } } if (mtk_dp->train_info.irq_sta.hpd_inerrupt) { @@ -1735,6 +1830,24 @@ static int mtk_dp_dt_parse(struct mtk_dp *mtk_dp, return ret; } +static enum drm_connector_status mtk_dp_bdg_detect(struct drm_bridge *bridge) +{ + struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge); + enum drm_connector_status ret = connector_status_disconnected; + u8 sink_count = 0; + + if (mtk_dp_is_edp(mtk_dp)) + return connector_status_connected; + + if (mtk_dp_plug_state_avoid_pulse(mtk_dp)) { + drm_dp_dpcd_readb(&mtk_dp->aux, DP_SINK_COUNT, &sink_count); + if (DP_GET_SINK_COUNT(sink_count)) + ret = connector_status_connected; + } + + return ret; +} + static struct edid *mtk_dp_get_edid(struct drm_bridge *bridge, struct drm_connector *connector) { @@ -1748,7 +1861,8 @@ static struct edid *mtk_dp_get_edid(struct drm_bridge *bridge, drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D0); usleep_range(2000, 5000); - new_edid = drm_get_edid(connector, &mtk_dp->aux.ddc); + if (mtk_dp_plug_state(mtk_dp)) + new_edid = drm_get_edid(connector, &mtk_dp->aux.ddc); if (!enabled) drm_bridge_chain_post_disable(bridge); @@ -2099,6 +2213,7 @@ static const struct drm_bridge_funcs mtk_dp_bridge_funcs = { .atomic_disable = mtk_dp_bridge_atomic_disable, .mode_valid = mtk_dp_bridge_mode_valid, .get_edid = mtk_dp_get_edid, + .detect = mtk_dp_bdg_detect, }; static int mtk_dp_probe(struct platform_device *pdev) @@ -2120,9 +2235,15 @@ static int mtk_dp_probe(struct platform_device *pdev) "failed to request dp irq resource\n"); mtk_dp->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 1, 0); - if (IS_ERR(mtk_dp->next_bridge)) + if (IS_ERR(mtk_dp->next_bridge) && + PTR_ERR(mtk_dp->next_bridge) == -ENODEV) { + dev_info(dev, + "No panel connected in devicetree, continue as external DP\n"); + mtk_dp->next_bridge = NULL; + } else if (IS_ERR(mtk_dp->next_bridge)) { return dev_err_probe(dev, PTR_ERR(mtk_dp->next_bridge), "Failed to get bridge\n"); + } ret = mtk_dp_dt_parse(mtk_dp, pdev); if (ret) @@ -2167,7 +2288,10 @@ static int mtk_dp_probe(struct platform_device *pdev) mtk_dp->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_HPD; - mtk_dp->bridge.type = DRM_MODE_CONNECTOR_eDP; + if (mtk_dp_is_edp(mtk_dp)) + mtk_dp->bridge.type = DRM_MODE_CONNECTOR_eDP; + else + mtk_dp->bridge.type = DRM_MODE_CONNECTOR_DisplayPort; drm_bridge_add(&mtk_dp->bridge); @@ -2194,6 +2318,12 @@ static int mtk_dp_suspend(struct device *dev) { struct mtk_dp *mtk_dp = dev_get_drvdata(dev); + if (mtk_dp_plug_state(mtk_dp)) { + drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D3); + /* Ensure the sink is off before shutting down power */ + usleep_range(2000, 3000); + } + mtk_dp_power_disable(mtk_dp); mtk_dp_hwirq_enable(mtk_dp, false); @@ -2221,6 +2351,7 @@ static SIMPLE_DEV_PM_OPS(mtk_dp_pm_ops, mtk_dp_suspend, mtk_dp_resume); static const struct of_device_id mtk_dp_of_match[] = { { .compatible = "mediatek,mt8195-edp-tx" }, + { .compatible = "mediatek,mt8195-dp-tx" }, {}, }; MODULE_DEVICE_TABLE(of, mtk_dp_of_match); From patchwork Fri Jun 10 10:55:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 581036 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ACEACC43334 for ; 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Fri, 10 Jun 2022 18:55:26 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 10 Jun 2022 18:55:24 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Fri, 10 Jun 2022 18:55:24 +0800 From: Bo-Chen Chen To: , , , , , , , , , CC: , , , , , , , , , , , , , Bo-Chen Chen Subject: [PATCH v11 08/10] drm/mediatek: set monitor to DP_SET_POWER_D3 to avoid garbage Date: Fri, 10 Jun 2022 18:55:20 +0800 Message-ID: <20220610105522.13449-9-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220610105522.13449-1-rex-bc.chen@mediatek.com> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org Set the monitor power state to DP_SET_POWER_D3 to avoid garbage. Signed-off-by: Jitao Shi Signed-off-by: Bo-Chen Chen --- drivers/gpu/drm/mediatek/mtk_dp.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c index 2413551bfe9f..a5ed94ca00c6 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp.c +++ b/drivers/gpu/drm/mediatek/mtk_dp.c @@ -2043,6 +2043,11 @@ static void mtk_dp_bridge_atomic_disable(struct drm_bridge *bridge, { struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge); + if (mtk_dp_plug_state(mtk_dp)) { + drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D3); + usleep_range(2000, 3000); + } + mtk_dp_video_mute(mtk_dp, true); mtk_dp->train_state = MTK_DP_TRAIN_STATE_TRAINING; From patchwork Fri Jun 10 10:55:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 581037 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11935C43334 for ; Fri, 10 Jun 2022 10:58:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345297AbiFJK6I (ORCPT ); Fri, 10 Jun 2022 06:58:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345195AbiFJK5s (ORCPT ); Fri, 10 Jun 2022 06:57:48 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D0E1228493; Fri, 10 Jun 2022 03:55:34 -0700 (PDT) X-UUID: 60cc67710e1d4d6bb4060d3b5884e553-20220610 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5, REQID:da89de79-f5c6-400f-b7ce-2efd1424d309, OB:0, LO B:0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,AC TION:release,TS:90 X-CID-INFO: VERSION:1.1.5, REQID:da89de79-f5c6-400f-b7ce-2efd1424d309, OB:0, LOB: 0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,AC TION:quarantine,TS:90 X-CID-META: VersionHash:2a19b09, CLOUDID:56d767e5-2ba2-4dc1-b6c5-11feb6c769e0, C OID:6d508ab9e773,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:0,BEC:nil X-UUID: 60cc67710e1d4d6bb4060d3b5884e553-20220610 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 769038928; Fri, 10 Jun 2022 18:55:26 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Fri, 10 Jun 2022 18:55:24 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Fri, 10 Jun 2022 18:55:24 +0800 From: Bo-Chen Chen To: , , , , , , , , , CC: , , , , , , , , , , , , , Bo-Chen Chen Subject: [PATCH v11 10/10] drm/mediatek: fix no audio when resolution change Date: Fri, 10 Jun 2022 18:55:22 +0800 Message-ID: <20220610105522.13449-11-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220610105522.13449-1-rex-bc.chen@mediatek.com> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org When switching resolutions, config the audio setting with the previous audio parameters. Signed-off-by: Jitao Shi Signed-off-by: Bo-Chen Chen --- drivers/gpu/drm/mediatek/mtk_dp.c | 51 ++++++++++--------------------- 1 file changed, 16 insertions(+), 35 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c index 35712ee6a04e..d4e4ceab7b2f 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp.c +++ b/drivers/gpu/drm/mediatek/mtk_dp.c @@ -119,7 +119,7 @@ struct mtk_dp_audio_cfg { struct mtk_dp_info { u32 depth; enum dp_pixelformat format; - struct mtk_dp_audio_cfg audio_caps; + struct mtk_dp_audio_cfg audio_cur_cfg; struct mtk_dp_timings timings; }; @@ -1966,8 +1966,6 @@ static bool mtk_dp_edid_parse_audio_capabilities(struct mtk_dp *mtk_dp, struct mtk_dp_audio_cfg *cfg) { struct cea_sad *sads; - int sad_count; - int i; bool ret = false; if (mtk_dp_is_edp(mtk_dp)) @@ -1979,33 +1977,13 @@ static bool mtk_dp_edid_parse_audio_capabilities(struct mtk_dp *mtk_dp, dev_err(mtk_dp->dev, "EDID not found!\n"); return false; } - sad_count = drm_edid_to_sad(mtk_dp->edid, &sads); - mutex_unlock(&mtk_dp->edid_lock); - if (sad_count <= 0) { + ret = drm_edid_to_sad(mtk_dp->edid, &sads); + mutex_unlock(&mtk_dp->edid_lock); + if (ret <= 0) { drm_info(mtk_dp->drm_dev, "The SADs is NULL\n"); return false; } - - for (i = 0; i < sad_count; i++) { - int sample_rate, word_length; - - /* Only PCM supported at the moment */ - if (sads[i].format != HDMI_AUDIO_CODING_TYPE_PCM) - continue; - - sample_rate = drm_cea_sad_get_sample_rate(&sads[i]); - word_length = - drm_cea_sad_get_uncompressed_word_length(&sads[i]); - if (sample_rate <= 0 || word_length <= 0) - continue; - - cfg->channels = sads[i].channels; - cfg->word_length_bits = word_length; - cfg->sample_rate = sample_rate; - ret = true; - break; - } kfree(sads); return ret; @@ -2175,14 +2153,15 @@ static int mtk_dp_training(struct mtk_dp *mtk_dp) mtk_dp->audio_enable = mtk_dp_edid_parse_audio_capabilities(mtk_dp, - &mtk_dp->info.audio_caps); + &mtk_dp->info.audio_cur_cfg); if (mtk_dp->audio_enable) { - mtk_dp_audio_setup(mtk_dp, &mtk_dp->info.audio_caps); + mtk_dp_audio_setup(mtk_dp, + &mtk_dp->info.audio_cur_cfg); mtk_dp_audio_mute(mtk_dp, false); } else { - memset(&mtk_dp->info.audio_caps, 0, - sizeof(mtk_dp->info.audio_caps)); + memset(&mtk_dp->info.audio_cur_cfg, 0, + sizeof(mtk_dp->info.audio_cur_cfg)); } training_done = true; @@ -2624,6 +2603,9 @@ static void mtk_dp_bridge_atomic_disable(struct drm_bridge *bridge, if (mtk_dp_plug_state(mtk_dp)) { drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D3); usleep_range(2000, 3000); + } else { + memset(&mtk_dp->info.audio_cur_cfg, 0, + sizeof(mtk_dp->info.audio_cur_cfg)); } mtk_dp_video_mute(mtk_dp, true); @@ -2834,18 +2816,17 @@ static int mtk_dp_audio_hw_params(struct device *dev, void *data, struct hdmi_codec_params *params) { struct mtk_dp *mtk_dp = dev_get_drvdata(dev); - struct mtk_dp_audio_cfg cfg; if (!mtk_dp->enabled) { pr_err("%s, DP is not ready!\n", __func__); return -ENODEV; } - cfg.channels = params->cea.channels; - cfg.sample_rate = params->sample_rate; - cfg.word_length_bits = 24; + mtk_dp->info.audio_cur_cfg.channels = params->cea.channels; + mtk_dp->info.audio_cur_cfg.sample_rate = params->sample_rate; + mtk_dp->info.audio_cur_cfg.word_length_bits = 24; - mtk_dp_audio_setup(mtk_dp, &cfg); + mtk_dp_audio_setup(mtk_dp, &mtk_dp->info.audio_cur_cfg); return 0; }