From patchwork Wed Jun 8 17:56:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 579945 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE62BC43334 for ; Wed, 8 Jun 2022 17:56:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233240AbiFHR47 (ORCPT ); Wed, 8 Jun 2022 13:56:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233237AbiFHR46 (ORCPT ); Wed, 8 Jun 2022 13:56:58 -0400 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F2141124D4 for ; Wed, 8 Jun 2022 10:56:57 -0700 (PDT) Received: by mail-pf1-x42b.google.com with SMTP id 15so18995603pfy.3 for ; Wed, 08 Jun 2022 10:56:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=p4M9xlqss6i0PJgyYT3bAou3kR8dpRSLtbYIlT8j1ow=; b=WrVb2LePVvyiOWJL9UsoqZvbEBNQJsHv+3ZN/egvNULF6xvWITCwtntHrt1eo6kMvx 9DlEZnYVELKJK/uYznjOlwJYGRXxvuxrkQzxSKl4jggRG+xMkJ51tdTB1Jc5ITQUcb5N SX0Isq4riJNox8f8DHMd+Df8aPv3tpaTIFGLw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=p4M9xlqss6i0PJgyYT3bAou3kR8dpRSLtbYIlT8j1ow=; b=0wzCgV0UWSdTjjYDiWuMZfjBNlmvAYhV3sLs8QCq0oOpIRec8+ZHHPtRIcE9MsKUfw bu96fWHG115MJo4EK/zxEpbudB70w1ZbcnCAFD4fMZ+GR0kNYxCC2bSCTeaLxhkOF22f q+97M/MUixvtaHUG+v0HUS0cPQLsysiul3DP+7ntX4An1ySeo6FsekYOKemW3b9OIM1J B7qt2dGm0FOFewKa7ZhnmnxxzZLx4j1MXNDldWU3wRR2g6X5s7tGFg4YWoyDKxLWeAJc xAosS265GwV6N8p+52ggsK42T+aB0WAeZgm1Qm+uft+ZtkIPO7FPH4QbJoDzgKqZnICg n0Wg== X-Gm-Message-State: AOAM5316Pz+CLqOZXPbm6/NtFQkmyTKP7mdowIdM5079Ts6Mgyl/0hED HAsiJ/ppxjZVFVx9ddkhzbVS/g== X-Google-Smtp-Source: ABdhPJxapQZDp2XkgxYPzifkM9jk5fCOQTuHKrCVwzEL8mWGUxEoTXalHiKNQjfBcTvaeGYVjJegLw== X-Received: by 2002:a05:6a00:1811:b0:51b:fec8:be7b with SMTP id y17-20020a056a00181100b0051bfec8be7bmr21806666pfa.22.1654711016894; Wed, 08 Jun 2022 10:56:56 -0700 (PDT) Received: from T3500-3.dhcp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id b19-20020a63d813000000b003f66a518e48sm15344762pgh.86.2022.06.08.10.56.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jun 2022 10:56:56 -0700 (PDT) From: William Zhang To: Linux ARM List Cc: tomer.yacoby@broadcom.com, Broadcom Kernel List , anand.gore@broadcom.com, dan.beygelman@broadcom.com, philippe.reynes@softathome.com, f.fainelli@gmail.com, samyon.furman@broadcom.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, William Zhang , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] dt-bindings: arm: Add BCM6756 SoC Date: Wed, 8 Jun 2022 10:56:27 -0700 Message-Id: <20220608175629.31538-2-william.zhang@broadcom.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220608175629.31538-1-william.zhang@broadcom.com> References: <20220608175629.31538-1-william.zhang@broadcom.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add BCM6756 SoC device tree description to bcmbca binding document. Signed-off-by: William Zhang --- Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml index f0faf6ba65a7..5086cb3ce7e3 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml @@ -49,6 +49,13 @@ properties: - const: brcm,bcm63178 - const: brcm,bcmbca + - description: BCM6756 based boards + items: + - enum: + - brcm,bcm96756 + - const: brcm,bcm6756 + - const: brcm,bcmbca + - description: BCM6846 based boards items: - enum: From patchwork Wed Jun 8 17:56:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 581013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9EB6BC433EF for ; Wed, 8 Jun 2022 17:57:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233383AbiFHR5C (ORCPT ); Wed, 8 Jun 2022 13:57:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233342AbiFHR5A (ORCPT ); Wed, 8 Jun 2022 13:57:00 -0400 Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B36610A638 for ; Wed, 8 Jun 2022 10:56:59 -0700 (PDT) Received: by mail-pf1-x42c.google.com with SMTP id u2so18990273pfc.2 for ; Wed, 08 Jun 2022 10:56:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=8D1UauE4Yt5f6xbretcFq8nc/TMXNlON4z7Xir6yL84=; b=CAPaAYdge4Y871eifLkNewr5rDLFXwGnklgRVRI1dOdYRnpRrswuOVUORRy+Sa/ani xRLHb62RzrNMpGJmuWat3wzN24m8u1Q5CeU2kjUZkDynlqd3yUlcVbOIrsKVmXiNZrRX Pz1cawquVBLb17f1OI3FF6nXpf9RLowHEaypQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=8D1UauE4Yt5f6xbretcFq8nc/TMXNlON4z7Xir6yL84=; b=Kenq2jaHOylbwoGD2yiGJTugDMZD5t7IaP5X1tjMdg9DNV3llJITPpS5G13Mj8b/CF HobeWKMgTugdlx3OL6vKK8m+EfGKswh03TjpPx9/0EaYtllblgNHM7UYO/gdPnvPNOvl VzMAv5xThBiXYpv97SydDJijF3btrtt0eqRivi5VIaWZW/bFckOOmtjwBd6Jinkq3ZN7 ExWcmHY19sR33Zx+83D0/7URdFP0+q/rgU4UptlMqlh7MAKwA6U7aGSF0KdZ7WyFuTE0 4k+ftBId+/62lC1ajFTDX/TaaMDX1jfnZ7RgCZr5pbHTJE8iV8HLwkpA4rXhFT0knW7P oGog== X-Gm-Message-State: AOAM531wDot9zmmQDef6s4Ml4m6/4jpSg0FarumkAmQCwRNkc6qnULCD K05z7bO8WvunAvIgz3o4Yx2oLg== X-Google-Smtp-Source: ABdhPJwhObrBL9QtqoFr2BRuLqARI1fRvLFFIRBJOWo3/OMPmz+uHrCRZfg9Tn/W9BLGVqYTPR0Prg== X-Received: by 2002:a62:c146:0:b0:51b:8c73:acad with SMTP id i67-20020a62c146000000b0051b8c73acadmr35977065pfg.22.1654711018783; Wed, 08 Jun 2022 10:56:58 -0700 (PDT) Received: from T3500-3.dhcp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id b19-20020a63d813000000b003f66a518e48sm15344762pgh.86.2022.06.08.10.56.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jun 2022 10:56:58 -0700 (PDT) From: William Zhang To: Linux ARM List Cc: tomer.yacoby@broadcom.com, Broadcom Kernel List , anand.gore@broadcom.com, dan.beygelman@broadcom.com, philippe.reynes@softathome.com, f.fainelli@gmail.com, samyon.furman@broadcom.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, William Zhang , Arnd Bergmann , Krzysztof Kozlowski , Olof Johansson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH 2/3] ARM: dts: Add DTS files for bcmbca SoC BCM6756 Date: Wed, 8 Jun 2022 10:56:28 -0700 Message-Id: <20220608175629.31538-3-william.zhang@broadcom.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220608175629.31538-1-william.zhang@broadcom.com> References: <20220608175629.31538-1-william.zhang@broadcom.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DTS for ARMv7 based broadband SoC BCM6756. bcm6756.dtsi is the SoC description DTS header and bcm96756.dts is a simple DTS file for Broadcom BCM96756 Reference board that only enable the UART port. Signed-off-by: William Zhang --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm6756.dtsi | 130 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/bcm96756.dts | 30 ++++++++ 3 files changed, 161 insertions(+) create mode 100644 arch/arm/boot/dts/bcm6756.dtsi create mode 100644 arch/arm/boot/dts/bcm96756.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 1d0189b867a1..28af71650567 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -184,6 +184,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \ dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm947622.dtb \ bcm963178.dtb \ + bcm96756.dtb \ bcm96846.dtb \ bcm96855.dtb \ bcm96878.dtb diff --git a/arch/arm/boot/dts/bcm6756.dtsi b/arch/arm/boot/dts/bcm6756.dtsi new file mode 100644 index 000000000000..ce1b59faf800 --- /dev/null +++ b/arch/arm/boot/dts/bcm6756.dtsi @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm6756", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CA7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x3>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + arm,cpu-registers-not-fw-configured; + }; + + pmu: pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&CA7_0>, <&CA7_1>, + <&CA7_2>, <&CA7_3>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = ; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = ; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/bcm96756.dts b/arch/arm/boot/dts/bcm96756.dts new file mode 100644 index 000000000000..9a4a87ba9c8a --- /dev/null +++ b/arch/arm/boot/dts/bcm96756.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6756.dtsi" + +/ { + model = "Broadcom BCM96756 Reference Board"; + compatible = "brcm,bcm96756", "brcm,bcm6756", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +};