From patchwork Mon May 30 08:08:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 577304 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 045F0C433FE for ; Mon, 30 May 2022 08:09:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232539AbiE3IJB (ORCPT ); Mon, 30 May 2022 04:09:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60902 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232527AbiE3IJA (ORCPT ); Mon, 30 May 2022 04:09:00 -0400 Received: from mail-pf1-x431.google.com (mail-pf1-x431.google.com [IPv6:2607:f8b0:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F86375205 for ; Mon, 30 May 2022 01:08:57 -0700 (PDT) Received: by mail-pf1-x431.google.com with SMTP id j6so9919637pfe.13 for ; Mon, 30 May 2022 01:08:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Vz2goCu8HSSqj1z/SCgL7p1ZSvFJFBtaYvPt923/tkk=; b=HjUaNLgpj+1HCHz8WV11s5EFrLkt8jZwObVlRBh41LOTSV5vYht3tzqCBeDYQvSzY1 DtzRSz3npLFzeZ7N+1LdcQT90juikktl1Zej+IsJFJdlsU2LVfc/UHCw2QXeTF36cjv6 W2UUNwvXlDuFihHZBfHmKAzyVw96nTwQlOsJbS7TNkzP27sZkzup2gF7jg0bXXaHYhhE S1Fjmkn05XwCez20Mb8gSCi0HL3RN4MCpF4BNmZPCSxOlUvqzHTzjrJmHTo3CFgcnftw 6gY0NoFBEpweEQ6aDWPGGArq+iYIHdy56VvXzuoV034IsADCamYFgRWLaQktq6KERWjS SQxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Vz2goCu8HSSqj1z/SCgL7p1ZSvFJFBtaYvPt923/tkk=; b=XwTrvA6I8ts1Ww250XmEMvGOXupDPDzXl5dVbcEVoMmfeLZ/6Q8joj87NzYytYXmj1 UkICwA9Y008+Og3bJIiLw8sjEWx+1K6F1XAmkvgvllWug7o03gEhmH8xc0faDnMj6OmR 43D83LoiMug16bO6BsW5h2XJaxvWh6haH4RX9bN0Y7wogTVNsnzQZrcaQ1WtO0mPXnMe zYK/pI+Bwg7kHwJi3ZhNGv454ULxu5FjSMAoPoONzznqeWLbXh4chu+RR2N0f+VtyDGP benx9ek61Op91Vk+G7jL0IZU/GxLUIArrG1EPrefTjSQupoRhOVC3PJHja8cAHEW8rOO /NMQ== X-Gm-Message-State: AOAM532sMDomjqjvydKa/iN4Qa3J/GmZK8mGp5TIoC42ZUOCjeYt7mSy noto9gd7Y5+39CuaRRjQavDd X-Google-Smtp-Source: ABdhPJyTSnLbwM3Yh43BnEZETXGDd6hYwOc4zYHkTWy+pn7V/vLULqcqYsLgxrBMtuxPwHrXNchj1A== X-Received: by 2002:a63:f156:0:b0:3ab:ada6:b463 with SMTP id o22-20020a63f156000000b003abada6b463mr46583877pgk.462.1653898136828; Mon, 30 May 2022 01:08:56 -0700 (PDT) Received: from localhost.localdomain ([220.158.159.114]) by smtp.gmail.com with ESMTPSA id io17-20020a17090312d100b0015e8d4eb285sm8450345plb.207.2022.05.30.01.08.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 May 2022 01:08:56 -0700 (PDT) From: Manivannan Sadhasivam To: tglx@linutronix.de, maz@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH 1/3] ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART Date: Mon, 30 May 2022 13:38:40 +0530 Message-Id: <20220530080842.37024-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220530080842.37024-1-manivannan.sadhasivam@linaro.org> References: <20220530080842.37024-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The trigger type should be LEVEL_HIGH. So fix it! Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/qcom-sdx55.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index d455795da44c..b75e672c239d 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -206,7 +206,7 @@ gcc: clock-controller@100000 { blsp1_uart3: serial@831000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x00831000 0x200>; - interrupts = ; + interrupts = ; clocks = <&gcc 30>, <&gcc 9>; clock-names = "core", "iface"; From patchwork Mon May 30 08:08:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 577477 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D53C1C433EF for ; Mon, 30 May 2022 08:09:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232759AbiE3IJC (ORCPT ); Mon, 30 May 2022 04:09:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232621AbiE3IJB (ORCPT ); Mon, 30 May 2022 04:09:01 -0400 Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 052DF75223 for ; Mon, 30 May 2022 01:08:59 -0700 (PDT) Received: by mail-pg1-x535.google.com with SMTP id r71so9557914pgr.0 for ; Mon, 30 May 2022 01:08:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LQMU+Azb2CyYnqiOkLdOJDhSu2qq9ydEFPtWmStOAJU=; b=SlvC9E3B+AvqQXTMHJ0kieTj61nPGO22GeH9i1A1SCxW2FY2zkeyWFRd2YJ98qDO+E Qo7SmR5I0Jt240JSU7C0Nd3oZA3Ty2CYQFBDJaXkKX3a+wfTqyC8uZqUS3SiOV+BeoZr tYxTjqGshIxdp7DwMxZYdUwpTCgerftKNLobxZr/DsKZ9wC+kv11OZ3UvfbaGS+JE095 cZCg01epBYWi2rrsmdK9X+h6k5DZCre5jqlsYoqB2d4k5+vW9lGt1pYk7XW458aukJee YVEtZaxFdl1V6cowCbbYo9Z2NPdvMkzenMawcSjI7hedb1XijNaCtEU/in9Q53z+5w7K EDgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LQMU+Azb2CyYnqiOkLdOJDhSu2qq9ydEFPtWmStOAJU=; b=fQznrX+/om6PiUFA5iqSjFcwwvJYFe/R6VFh0/fciB/7fkeNQfZKnh+JdLEaiNE1ap nHFe7m4Eca+eZfzjOmn0rH79O6XkONFPXe1c7pH7hUmZoIRM+z3r16VDinUQBppi9p81 2g0//U/Jn1/7g9hBZ0I21YgJv1ThMf9Zu0mYV1o6G0eaFwmb/kj4x9Ji8+q5BPhT5m5M g3VTzet+NgTObL0YuT8IWfDuv9N92RPMu55xsgDTuYcWJEfNKfV7qhHS0nrh7KuzutE/ 3k5GJNhoCQhNHFhGQ/gs463C5KUkTiuF9geymCHNB/ASJL12yZRLN3xgwV85rKi/G9cH 2CNg== X-Gm-Message-State: AOAM533TKoYTcsgNHlzpj19fdgXUKs1Qm4WsBYMK3jCqYQBK9YSfhuEc aHa5ff2oSUAvweCEH8QXVLlI X-Google-Smtp-Source: ABdhPJzHqkdC2S2wPLL9VZ3aRN3aCQgHi+x0s3Sal6yisEAAh4WGC/R6dRPSXyxbgctC0yNLYK8IrQ== X-Received: by 2002:a65:62d0:0:b0:3fa:c6aa:6901 with SMTP id m16-20020a6562d0000000b003fac6aa6901mr23157011pgv.314.1653898139145; Mon, 30 May 2022 01:08:59 -0700 (PDT) Received: from localhost.localdomain ([220.158.159.114]) by smtp.gmail.com with ESMTPSA id io17-20020a17090312d100b0015e8d4eb285sm8450345plb.207.2022.05.30.01.08.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 May 2022 01:08:58 -0700 (PDT) From: Manivannan Sadhasivam To: tglx@linutronix.de, maz@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH 2/3] arm64: dts: qcom: sm8450: Fix the IRQ trigger type for remoteproc nodes Date: Mon, 30 May 2022 13:38:41 +0530 Message-Id: <20220530080842.37024-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220530080842.37024-1-manivannan.sadhasivam@linaro.org> References: <20220530080842.37024-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The watchdog IRQ trigger type should be EDGE_RISING. So fix all remoteproc nodes. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 934e29b9e153..7c511901e52f 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -854,7 +854,7 @@ remoteproc_slpi: remoteproc@2400000 { compatible = "qcom,sm8450-slpi-pas"; reg = <0 0x02400000 0 0x4000>; - interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&pdc 9 IRQ_TYPE_EDGE_RISING>, <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, @@ -894,7 +894,7 @@ remoteproc_adsp: remoteproc@30000000 { compatible = "qcom,sm8450-adsp-pas"; reg = <0 0x030000000 0 0x100>; - interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, @@ -934,7 +934,7 @@ remoteproc_cdsp: remoteproc@32300000 { compatible = "qcom,sm8450-cdsp-pas"; reg = <0 0x032300000 0 0x1400000>; - interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, @@ -974,7 +974,7 @@ remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sm8450-mpss-pas"; reg = <0x0 0x04080000 0x0 0x4040>; - interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, From patchwork Mon May 30 08:08:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 577303 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14C77C433F5 for ; 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Mon, 30 May 2022 01:09:01 -0700 (PDT) From: Manivannan Sadhasivam To: tglx@linutronix.de, maz@kernel.org, bjorn.andersson@linaro.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH 3/3] genirq: Check for trigger type mismatch in __setup_irq() Date: Mon, 30 May 2022 13:38:42 +0530 Message-Id: <20220530080842.37024-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220530080842.37024-1-manivannan.sadhasivam@linaro.org> References: <20220530080842.37024-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently, if the trigger type defined by the platform like DT does not match the driver requested trigger type, the below warning is shown during platform_get_irq() but only during the second time of the drive probe (due to probe deferral or module unload/load). irq: type mismatch, failed to map hwirq-9 for interrupt-controller@b220000! Consider a typical usecase of requesting an IRQ in a driver: ``` /* Assume DT has set the trigger type to IRQF_TYPE_LEVEL_HIGH */ q6v5->wdog_irq = platform_get_irq_byname(pdev, "wdog"); if (q6v5->wdog_irq <= 0) return q6v5->wdog_irq; ret = devm_request_threaded_irq(&pdev->dev, q6v5->wdog_irq, NULL, q6v5_wdog_interrupt, IRQF_TRIGGER_RISING | IRQF_ONESHOT, "q6v5 wdog", q6v5); if (ret) { dev_err(&pdev->dev, "failed to acquire wdog IRQ\n"); return ret; } ``` For the first time probe of a driver, platform_get_irq_byname() does not return an error and it sets the platform requested trigger type. Then, request_irq() also does not check for the trigger type mismatch and sets the driver requested trigger type. Later if the driver gets probed again, platform_get_irq() throws the "type mismatch" warning and fails. Ideally, request_irq() should throw the error during the first time itself, when it detects the trigger type mismatch. So let's add a check in __setup_irq() for checking the trigger type mismatch. It should be noted that the platform trigger type could be IRQ_TYPE_NONE in some cases like IRQ controller inside the GPIOCHIP. For those cases, the check should be skipped. Signed-off-by: Manivannan Sadhasivam --- kernel/irq/manage.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index c03f71d5ec10..dd28c4944172 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -1480,8 +1480,18 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) * If the trigger type is not specified by the caller, * then use the default for this interrupt. */ - if (!(new->flags & IRQF_TRIGGER_MASK)) - new->flags |= irqd_get_trigger_type(&desc->irq_data); + flags = irqd_get_trigger_type(&desc->irq_data); + if (!(new->flags & IRQF_TRIGGER_MASK)) { + new->flags |= flags; + } else if (flags && ((new->flags & IRQF_TRIGGER_MASK) != flags)) { + /* + * Bail out if the default trigger is not IRQ_TYPE_NONE and the + * caller specified trigger does not match the default trigger type. + */ + pr_err("Trigger type %u does not match default type %lu for %s (irq %d)\n", + new->flags & IRQF_TRIGGER_MASK, flags, new->name, irq); + return -EINVAL; + } /* * Check whether the interrupt nests into another interrupt