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[174.21.71.225]) by smtp.gmail.com with ESMTPSA id h6-20020a170902f54600b0016170bb6528sm3995634plf.113.2022.05.27.10.11.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 May 2022 10:11:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: alex.bennee@linaro.org Subject: [PATCH] tests/tcg/i386: Use explicit suffix on fist insns Date: Fri, 27 May 2022 10:11:43 -0700 Message-Id: <20220527171143.168276-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Fixes a number of assembler warnings of the form: test-i386.c: Assembler messages: test-i386.c:869: Warning: no instruction mnemonic suffix given and no register operands; using default for `fist' Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tests/tcg/i386/test-i386-fp-exceptions.c | 24 ++++++++++++------------ tests/tcg/i386/test-i386.c | 2 +- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/tests/tcg/i386/test-i386-fp-exceptions.c b/tests/tcg/i386/test-i386-fp-exceptions.c index dfb7117c17..d445f13c33 100644 --- a/tests/tcg/i386/test-i386-fp-exceptions.c +++ b/tests/tcg/i386/test-i386-fp-exceptions.c @@ -423,35 +423,35 @@ int main(void) } __asm__ volatile ("fnclex"); - __asm__ volatile ("fistp %0" : "=m" (res_16) : "t" (1.5L) : "st"); + __asm__ volatile ("fistps %0" : "=m" (res_16) : "t" (1.5L) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != PE) { printf("FAIL: fistp inexact\n"); ret = 1; } __asm__ volatile ("fnclex"); - __asm__ volatile ("fistp %0" : "=m" (res_16) : "t" (32767.5L) : "st"); + __asm__ volatile ("fistps %0" : "=m" (res_16) : "t" (32767.5L) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != IE) { printf("FAIL: fistp 32767.5\n"); ret = 1; } __asm__ volatile ("fnclex"); - __asm__ volatile ("fistp %0" : "=m" (res_16) : "t" (-32768.51L) : "st"); + __asm__ volatile ("fistps %0" : "=m" (res_16) : "t" (-32768.51L) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != IE) { printf("FAIL: fistp -32768.51\n"); ret = 1; } __asm__ volatile ("fnclex"); - __asm__ volatile ("fistp %0" : "=m" (res_16) : "t" (ld_nan) : "st"); + __asm__ volatile ("fistps %0" : "=m" (res_16) : "t" (ld_nan) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != IE) { printf("FAIL: fistp nan\n"); ret = 1; } __asm__ volatile ("fnclex"); - __asm__ volatile ("fistp %0" : "=m" (res_16) : "t" (ld_invalid_1.ld) : + __asm__ volatile ("fistps %0" : "=m" (res_16) : "t" (ld_invalid_1.ld) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != IE) { @@ -538,49 +538,49 @@ int main(void) } __asm__ volatile ("fnclex"); - __asm__ volatile ("fisttp %0" : "=m" (res_16) : "t" (1.5L) : "st"); + __asm__ volatile ("fisttps %0" : "=m" (res_16) : "t" (1.5L) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != PE) { printf("FAIL: fisttp inexact\n"); ret = 1; } __asm__ volatile ("fnclex"); - __asm__ volatile ("fisttp %0" : "=m" (res_16) : "t" (32768.0L) : "st"); + __asm__ volatile ("fisttps %0" : "=m" (res_16) : "t" (32768.0L) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != IE) { printf("FAIL: fisttp 32768\n"); ret = 1; } __asm__ volatile ("fnclex"); - __asm__ volatile ("fisttp %0" : "=m" (res_16) : "t" (32768.5L) : "st"); + __asm__ volatile ("fisttps %0" : "=m" (res_16) : "t" (32768.5L) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != IE) { printf("FAIL: fisttp 32768.5\n"); ret = 1; } __asm__ volatile ("fnclex"); - __asm__ volatile ("fisttp %0" : "=m" (res_16) : "t" (-32769.0L) : "st"); + __asm__ volatile ("fisttps %0" : "=m" (res_16) : "t" (-32769.0L) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != IE) { printf("FAIL: fisttp -32769\n"); ret = 1; } __asm__ volatile ("fnclex"); - __asm__ volatile ("fisttp %0" : "=m" (res_16) : "t" (-32769.5L) : "st"); + __asm__ volatile ("fisttps %0" : "=m" (res_16) : "t" (-32769.5L) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != IE) { printf("FAIL: fisttp -32769.5\n"); ret = 1; } __asm__ volatile ("fnclex"); - __asm__ volatile ("fisttp %0" : "=m" (res_16) : "t" (ld_nan) : "st"); + __asm__ volatile ("fisttps %0" : "=m" (res_16) : "t" (ld_nan) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != IE) { printf("FAIL: fisttp nan\n"); ret = 1; } __asm__ volatile ("fnclex"); - __asm__ volatile ("fisttp %0" : "=m" (res_16) : "t" (ld_invalid_1.ld) : + __asm__ volatile ("fisttps %0" : "=m" (res_16) : "t" (ld_invalid_1.ld) : "st"); __asm__ volatile ("fnstsw" : "=a" (sw)); if ((sw & EXC) != IE) { diff --git a/tests/tcg/i386/test-i386.c b/tests/tcg/i386/test-i386.c index 18d5609665..ac8d5a3c1f 100644 --- a/tests/tcg/i386/test-i386.c +++ b/tests/tcg/i386/test-i386.c @@ -866,7 +866,7 @@ void test_fcvt(double a) uint16_t val16; val16 = (fpuc & ~0x0c00) | (i << 10); asm volatile ("fldcw %0" : : "m" (val16)); - asm volatile ("fist %0" : "=m" (wa) : "t" (a)); + asm volatile ("fists %0" : "=m" (wa) : "t" (a)); asm volatile ("fistl %0" : "=m" (ia) : "t" (a)); asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st"); asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a));