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Tue, 24 May 2022 05:08:30 -0700 Envelope-to: git@xilinx.com, peter.chen@kernel.org, gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Received: from [10.140.6.18] (port=35222 helo=xhdlakshmis40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1ntTKv-0009lk-FZ; Tue, 24 May 2022 05:08:29 -0700 From: Piyush Mehta To: , , CC: , , , , , Piyush Mehta Subject: [RFC PATCH] usb: chipidea: Add support for VBUS control with PHY Date: Tue, 24 May 2022 17:38:02 +0530 Message-ID: <20220524120802.9394-1-piyush.mehta@xilinx.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d3dafab1-5daf-4d1b-cd7f-08da3d7e1f27 X-MS-TrafficTypeDiagnostic: DM6PR02MB4204:EE_ X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 58F0kxuCx7lU6UaR0l6jXILJ1r+Ine87CtWeLeYpcRXHdRW/oiXdLJR01aQeHdw4KM1+gGsaUUUjiKspkAacxh9zCKF4+Rf5TqDLU5nftgTrSZd6EIkA7Wl4Ma57CXPCWTLuwoER7VfWH/bej4WyCrMs1OIOR+HxaA1tiUlOW0CJ2GWr6chWrJH4xXIJ+/7EGSOY6rWFLGoR93rvZmRpk2g1NtOtaNbVXY9mEqRwdtEWsDEKOJaJmTpjRWCnPZXK2uAz03mvOTR2CCY2UGs70xWKnnODrHZQu1fBIhvF/dmnBWMr6OXT/Z/28mm/4Kg5RvQIKqFEa9znlEQnNbYtAOLCK1F30bqbrWh2pDjwuBEs30tn9EYpljvr8m3fomJrAn5p+NZlL877aN0phFV+sz3RWzn4hZbCYg0Mf73waxYFhOVTTzmyhUlUNdb7XNA3GBM8wdpZFiXyDOZIABytme106M9W4irps3QW4iH4dSQwFjAc6G1CLzK4Stetms0zVxMuVI/4A1DRu+mqT7Mj6CTiUqRyFu/SR2vT6gKMQToQnHifwOn+7nobc8vIsGSqqzcxF6I6R5joH28UUqXnfENLlKsInUKDtK9fA5WCGT7tiueoXSoXB5zhio0+zPr8rULOwSdc6BYp4tKJg2JCflq6BPbs4ORVzc1HPCPzf6eLjhVtt8xNKQPVlQIz9RpBBzXORxGzs1gr157RzNaRQA== X-Forefront-Antispam-Report: CIP:149.199.62.198; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapexch01.xlnx.xilinx.com; PTR:unknown-62-198.xilinx.com; CAT:NONE; SFS:(13230001)(4636009)(40470700004)(36840700001)(46966006)(40460700003)(54906003)(426003)(8936002)(508600001)(356005)(36860700001)(110136005)(107886003)(9786002)(70206006)(7636003)(4326008)(8676002)(70586007)(83380400001)(6636002)(26005)(6666004)(336012)(186003)(44832011)(5660300002)(82310400005)(2616005)(2906002)(7696005)(47076005)(1076003)(316002)(36756003)(102446001); DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2022 12:08:32.2816 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d3dafab1-5daf-4d1b-cd7f-08da3d7e1f27 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.62.198]; Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: BN1NAM02FT032.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB4204 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Some platforms make use of VBUS control over PHY which means controller driver has to access PHY registers to turn on/off VBUS line.This patch adds support for such platforms in chipidea. Flag 'CI_HDRC_PHY_VBUS_CONTROL' added to support VBus control feature. Signed-off-by: Piyush Mehta Acked-by: Peter Chen --- We have created this patch as RFC, as I introduced a new flag (CI_HDRC_PHY_VBUS_CONTROL) and would like to get comment if it's the proper way to check for VBus support for zynq. --- drivers/usb/chipidea/ci_hdrc_usb2.c | 1 + drivers/usb/chipidea/host.c | 7 +++++++ drivers/usb/chipidea/otg_fsm.c | 7 +++++++ include/linux/usb/chipidea.h | 1 + 4 files changed, 16 insertions(+) diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c index 89e1d82..dc86b12 100644 --- a/drivers/usb/chipidea/ci_hdrc_usb2.c +++ b/drivers/usb/chipidea/ci_hdrc_usb2.c @@ -30,6 +30,7 @@ static const struct ci_hdrc_platform_data ci_default_pdata = { static const struct ci_hdrc_platform_data ci_zynq_pdata = { .capoffset = DEF_CAPOFFSET, + .flags = CI_HDRC_PHY_VBUS_CONTROL, }; static const struct ci_hdrc_platform_data ci_zevio_pdata = { diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c index bdc3885..bc3634a 100644 --- a/drivers/usb/chipidea/host.c +++ b/drivers/usb/chipidea/host.c @@ -63,6 +63,13 @@ static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable) priv->enabled = enable; } + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) { + if (enable) + usb_phy_vbus_on(ci->usb_phy); + else + usb_phy_vbus_off(ci->usb_phy); + } + if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) { /* * Marvell 28nm HSIC PHY requires forcing the port to HS mode. diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c index 6ed4b00..5ed9164 100644 --- a/drivers/usb/chipidea/otg_fsm.c +++ b/drivers/usb/chipidea/otg_fsm.c @@ -471,6 +471,10 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on) return; } } + + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) + usb_phy_vbus_on(ci->usb_phy); + /* Disable data pulse irq */ hw_write_otgsc(ci, OTGSC_DPIE, 0); @@ -480,6 +484,9 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on) if (ci->platdata->reg_vbus) regulator_disable(ci->platdata->reg_vbus); + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) + usb_phy_vbus_off(ci->usb_phy); + fsm->a_bus_drop = 1; fsm->a_bus_req = 0; } diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h index edf3342..ee38835 100644 --- a/include/linux/usb/chipidea.h +++ b/include/linux/usb/chipidea.h @@ -62,6 +62,7 @@ struct ci_hdrc_platform_data { #define CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13) #define CI_HDRC_IMX_IS_HSIC BIT(14) #define CI_HDRC_PMQOS BIT(15) +#define CI_HDRC_PHY_VBUS_CONTROL BIT(16) enum usb_dr_mode dr_mode; #define CI_HDRC_CONTROLLER_RESET_EVENT 0 #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1