From patchwork Sat May 21 15:20:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65BD8C433FE for ; Sat, 21 May 2022 15:21:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239211AbiEUPVJ (ORCPT ); Sat, 21 May 2022 11:21:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45404 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344148AbiEUPU6 (ORCPT ); Sat, 21 May 2022 11:20:58 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56905B1DF for ; Sat, 21 May 2022 08:20:55 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id u23so18829282lfc.1 for ; Sat, 21 May 2022 08:20:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VRcBfW2FxHKYJoVpxfrI8zGrGf9W6wst3qWpXKD9jig=; b=hdxnN4Cr3+qe/oZfCc6yplYDz1cgz8Nue9fMQ6/9X7NlTn2BA2eb2F73e2Ye9jksUK oFkask0k/FULyTIgR79lfl9fNivZt9x7rj9o7GMQ3DTAchuRgbxMDwljFRvWsq5oddxl zPiJV+OU8WhAqLqHXWI9XSqd3xOgBF/u5CLn3Xx6Fho/53DUf2lg3yvVr3/ub+RjiOcP zt470E3WXuvsXPgJ07BRamcNzMWMtlmP2+csddG0YKahEPCmtuMfVQK+sju28HM3FySh rtNeMlcRp+ecliqQ8zm2FZ2zOWcLT37CMBoPOjkWXQ04CaIT1obuT5H6xK0GS8xAZv2o ixvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VRcBfW2FxHKYJoVpxfrI8zGrGf9W6wst3qWpXKD9jig=; b=MxW13c3V8DjZLEkVcY4CR82wH+u7x1X7zRSTL3CLh8ycYiCaxsUvYq6PLVJ+x1CtD6 9ftPhwOde2CB+tBQRyvvQwqouY/M5RtiDcdPH1giRi9QNdXze87ccquVcyIHYOEPUGVN lKXu2z3E+OWieljTHlsuBUrV0bxmjuIOzMZiV/Nxftv2RnvFA9z6kMC9OnnTrZ52U/nA z0Zk4Qqw+ztA/vQxlYEWJrcnlPUj9yJ9VUXLDG3onzWXpyjbo3jpcrs5vJQwKnyLlRVS Z7NEHH6Qcmfu7UDSJ+UTHqRsVRnrDT7tdGrjwhgAdbVzHs1kNqLFhY0ScvdLl5auAPMy hTzg== X-Gm-Message-State: AOAM532SsnYutIv83KfOU94VrqyAD0P98UzooJF2XXOt7O1OLLebS7Et mjszDzExHF2Uf0cu/QlgmFhaq1jVDIoHRg== X-Google-Smtp-Source: ABdhPJwHRu3YEfAl5NR2cBRHc9udMgAZp05k2dmwQrbzb9jGfi6/hgIYeDMGghZX30HGV2CUycwJgg== X-Received: by 2002:a05:6512:3f92:b0:447:769c:1b2c with SMTP id x18-20020a0565123f9200b00447769c1b2cmr10525896lfa.387.1653146453235; Sat, 21 May 2022 08:20:53 -0700 (PDT) Received: from eriador.lumag.spb.ru ([94.25.229.156]) by smtp.gmail.com with ESMTPSA id k8-20020a2e92c8000000b0024f3d1daeccsm739933ljh.84.2022.05.21.08.20.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 May 2022 08:20:52 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten , Konrad Dybcio Subject: [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Date: Sat, 21 May 2022 18:20:39 +0300 Message-Id: <20220521152049.1490220-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Follow the typical practice and keep DSI0/DSI0 PHY disabled by default. They should be enabled in the board DT files. No existing boards use them at this moment. Suggested-by: Marijn Suijten Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 240293592ef9..8697d40e9b74 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1559,6 +1559,8 @@ dsi0: dsi@c994000 { phys = <&dsi0_phy>; phy-names = "dsi"; + status = "disabled"; + ports { #address-cells = <1>; #size-cells = <0>; @@ -1592,6 +1594,7 @@ dsi0_phy: dsi-phy@c994400 { clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>; clock-names = "iface", "ref"; + status = "disabled"; }; }; From patchwork Sat May 21 15:20:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01F7CC433F5 for ; Sat, 21 May 2022 15:21:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349843AbiEUPVJ (ORCPT ); Sat, 21 May 2022 11:21:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350776AbiEUPU6 (ORCPT ); Sat, 21 May 2022 11:20:58 -0400 Received: from mail-lj1-x233.google.com (mail-lj1-x233.google.com [IPv6:2a00:1450:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AEA86B49B for ; Sat, 21 May 2022 08:20:57 -0700 (PDT) Received: by mail-lj1-x233.google.com with SMTP id e4so11960884ljb.13 for ; Sat, 21 May 2022 08:20:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ypxafSXytWa1pPBeHJ41K2y3Cfr7QvnghKr6SvtMtAA=; b=sVsrPGNl4w2uM81jjBcYdQWuayrXckKNcmFuPozmWDjyR1Fr/gclJnqTXGjwv4X+V8 RIO5brmBADLHDtD2Sv42lztYE6yDr3XIuXEERzf79palc/9uCf9xyKQAE8oLlI7GjebC B8ZNG9MRjNPwEMY57cuhbYmgzRYeSLP4/2t3H0Fi4WSyfItMM8Et4NrxH8/MF3g4HzQO u7/Efrqfn0bteeC0GeX/urzw2m+g9Be+eFyguzvjQQeJUtRNcTk5m233e4QgXt+X619v fCe12CBt588MrgYSDFgDUpWZP4LrlBcCyPGz1rpZaO4ppugEMvEeqse/LV6+6VoJPeKA Cm8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ypxafSXytWa1pPBeHJ41K2y3Cfr7QvnghKr6SvtMtAA=; b=E23Nn8wMAvjN3EIIZbjCou6Y6z4ea2YJXFs8taH1c40YDy40FxvKYpDBzqR3ySBlp7 mGm6+8NfKVvjrJQM8luHeHndiupkfOvP0PLfY/Yt4uCt7Ki+wExfXMcYLMtZ5hCmYrGl iHwAA+eU8MCNSOZ9otVpB1tW1CbNuf170/3Rp7QuyoU/l7dXaym08tLU1+CI+AmfnSFF ygYCePUscHkG2oEyizf3CUeyf+zUMZqb/gdkfEC30SZ6O59GRa5L6d6ZDGRAdDX5DnG5 /IF5dDRA5fyqlJ5ABezni8HLscM1pCJ2HquuZWjsl37DWLDGN7uIahBwRDTYkn1kwWj0 FyBw== X-Gm-Message-State: AOAM530nzehEavBXBjK5BqBcuYRSwuA3z5QKio11rfX+L5P8ZSiFJ7a6 QazUYHodxOzn+7ZObcRGHeSVcQ== X-Google-Smtp-Source: ABdhPJzPKkNLgObUuVY2ib/KxfYASVtn+LlCqft0cS9/wYeLPNO8+2KpiQEhJi0Xu54U92os4NOANA== X-Received: by 2002:a2e:bf27:0:b0:246:7ed6:33b0 with SMTP id c39-20020a2ebf27000000b002467ed633b0mr8271812ljr.167.1653146454828; Sat, 21 May 2022 08:20:54 -0700 (PDT) Received: from eriador.lumag.spb.ru ([94.25.229.156]) by smtp.gmail.com with ESMTPSA id k8-20020a2e92c8000000b0024f3d1daeccsm739933ljh.84.2022.05.21.08.20.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 May 2022 08:20:54 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten , Konrad Dybcio Subject: [PATCH v6 02/11] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default Date: Sat, 21 May 2022 18:20:40 +0300 Message-Id: <20220521152049.1490220-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Follow the typical practice and keep DSI1/DSI1 PHY disabled by default. They should be enabled in the board DT files. No existing boards use them at this moment. Reviewed-by: Marijn Suijten Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi index eccf6fde16b4..023b0ac4118c 100644 --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi @@ -192,6 +192,8 @@ dsi1: dsi@c996000 { phys = <&dsi1_phy>; phy-names = "dsi"; + status = "disabled"; + ports { #address-cells = <1>; #size-cells = <0>; @@ -225,6 +227,7 @@ dsi1_phy: dsi-phy@c996400 { clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "ref"; + status = "disabled"; }; }; From patchwork Sat May 21 15:20:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575118 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24F8CC43219 for ; Sat, 21 May 2022 15:21:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244629AbiEUPVL (ORCPT ); Sat, 21 May 2022 11:21:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355352AbiEUPVB (ORCPT ); Sat, 21 May 2022 11:21:01 -0400 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7D7FB4B2 for ; Sat, 21 May 2022 08:20:57 -0700 (PDT) Received: by mail-lf1-x131.google.com with SMTP id br17so6497520lfb.2 for ; Sat, 21 May 2022 08:20:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Tuq5sCaVtmkjPi9RkbWXYl4iAUGc0Sy3jGc43YOB5ng=; b=XSSUpkcW9971TKaNxpF6fFOpwgiEom2zBmy2y8AKhh8QjjCVxUpSiyBQ35HRtTTLUG PML7YtP1qCZhPjG7gE4i0ZRchCx1FNms9jn718vP+a5Laa7NM0RXwBYqxUuf5w5c2aur 3heJ8SePuPGvrsXZYLlJRHwL7qSGPX3OdbLuaQN5Z4AX5haMYkAJ7SjTgzCSBQzbqkbc aBnz1HCoj5O0byRISNOa9wZMRW4qaQM9Ju/04NObSnA9l56QKN0F9flK3x5FgCNKi57i PsKfElY/lortPfg3ciZst3LNQI/HJsXXtuVuEJjFXvfk+M183DShw6nHnPllTsx43GZo dQTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Tuq5sCaVtmkjPi9RkbWXYl4iAUGc0Sy3jGc43YOB5ng=; b=m8terwcuI7bkJqwOg50av30dKJ2wX4xA8WJQDKrzdKPgAFTo335diuwR0eH5lhB3hu IiIYlgOxKhbb8RxB3UGGfSUFAmqpF7PYUFV6Czfea1Pbu9kFsScvIEL7+AaNspypjFGD hEbxFZMzauk7QGxbKN8kt1+F7nbYbzVHyGAKOdo23ilw5yVVJ7fmCRvUTsNTSdWGn4tS F1ddt1cSFYauA4SpYwyzmtkawOJjmP1Y/J7J0QQWtt/zupXXsGfOVIyLQxV0oML7BYW7 xmv11IOHVMQHYPo+riwAPSpTJ4xS42qKmYd1yAIh6QSpPGx9ecLREj1UyUo9sHknMjo/ DHQg== X-Gm-Message-State: AOAM532toQax7rDZqw+AMJJfBbpKGRATT5YCKQ92RIV53xH3C57FeVuH lejxBbOMNHyOfdo6H8SaSZB2ww== X-Google-Smtp-Source: ABdhPJyIMAexTQEk1MKaX2t94SdwWyx/q24fHvDshpynvSQOYQwjbia8S1JFqQ2bCCHoa/sMDRi2Gw== X-Received: by 2002:a05:6512:3b14:b0:477:cc51:b2c3 with SMTP id f20-20020a0565123b1400b00477cc51b2c3mr8600131lfv.263.1653146456117; Sat, 21 May 2022 08:20:56 -0700 (PDT) Received: from eriador.lumag.spb.ru ([94.25.229.156]) by smtp.gmail.com with ESMTPSA id k8-20020a2e92c8000000b0024f3d1daeccsm739933ljh.84.2022.05.21.08.20.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 May 2022 08:20:55 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Marijn Suijten Subject: [PATCH v6 03/11] arm64: dts: qcom: sdm630: disable GPU by default Date: Sat, 21 May 2022 18:20:41 +0300 Message-Id: <20220521152049.1490220-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The SoC's device tree file disables gpucc and adreno's SMMU by default. So let's disable the GPU too. Moreover it looks like SMMU might be not usable without additional patches (which means that GPU is unusable too). No board uses GPU at this moment. Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration") Reviewed-by: Konrad Dybcio Reviewed-by: Marijn Suijten Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 8697d40e9b74..e8bb170e8b2f 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1050,6 +1050,8 @@ adreno_gpu: gpu@5000000 { operating-points-v2 = <&gpu_sdm630_opp_table>; + status = "disabled"; + gpu_sdm630_opp_table: opp-table { compatible = "operating-points-v2"; opp-775000000 { From patchwork Sat May 21 15:20:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5466BC433FE for ; Sat, 21 May 2022 15:21:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350776AbiEUPVM (ORCPT ); Sat, 21 May 2022 11:21:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355360AbiEUPVB (ORCPT ); Sat, 21 May 2022 11:21:01 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3325B64DB for ; Sat, 21 May 2022 08:20:59 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id br17so6497585lfb.2 for ; Sat, 21 May 2022 08:20:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=M0l8uf13lS8T2BMe8oGUirk3JiCk+Q/7ugdeXN9BOAM=; b=sjpoWre+GNEhw2ACw8DVo4epexEnyVuC1sBX4TC4o7tLosOWDWKG2mlNsj9KwOvxtm AXX9srIrfvTZzTSEOIque0bGorQrde5hEqrBFc6KLRCFnz6Z+otOI0VDdWQELE/p/s+R j9x4aHAN+yuqWbJM+9+wReD5tnRgbTWUszyO67WDkMK9K/WnHDiL1+KvlRS0fmdJ6A7R Tdjm4kWZAYqcDw3weI7d9NpjZBLosgaIC5CZg7CCvyFFthgE0nNnZEPN4Vfb9qaM2GQJ 9vL8YnlRMe5TMNucEtisO0JcNpb6GLOdux9t1F3xo9SCUxus8HKQqkFuWWlzrdsMl5yA wETg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=M0l8uf13lS8T2BMe8oGUirk3JiCk+Q/7ugdeXN9BOAM=; b=zrXveeGgDbwhB7NwSZ9PQiSo/7kE4Pr5/87xVdMnc9zYLM8AK3JjBUnYtHqynj2Ud3 svQiOIjsgb0T06HzIAm67Y1ATSrM4NsHi99XHMIX0TXJ1aS6ZF7A3Ep4nq1MPNf1JAAX F7t8nHCHnuE8jEHu2ejwadDY5Oq+akp3rsTp4GnWr7yoQs1sdDBKVMhn4CYiaFhV45c/ VxJysOs/PqYfauBhUGim4V6Z6xQNK6Z1/d8u8DRzqyznyiJi+Pu/20aKNqxrFbRb2/F9 VzMKjMpV1bCX/7cyWwywiDgBy0+nw5JF7G+KlwmME/M6ew/jwgXe+5OnWUeVl/qYarSF Z6wg== X-Gm-Message-State: AOAM533EBcwGcvz42GYDy8chncSID7/i6KXNEM0dnFom2kYRJbCmcoQ+ 9DAjpGC8UI5zDI1NEsgwwS70ag== X-Google-Smtp-Source: ABdhPJzIJF9DCpDv+brBnMK+X2iUur/5PPcF+hQSdWcWSgLAxQmCCw+1HNUQmF/qc7Y6ZdShvA58HA== X-Received: by 2002:a05:6512:695:b0:478:591f:b391 with SMTP id t21-20020a056512069500b00478591fb391mr4522263lfe.643.1653146457538; Sat, 21 May 2022 08:20:57 -0700 (PDT) Received: from eriador.lumag.spb.ru ([94.25.229.156]) by smtp.gmail.com with ESMTPSA id k8-20020a2e92c8000000b0024f3d1daeccsm739933ljh.84.2022.05.21.08.20.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 May 2022 08:20:57 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Marijn Suijten Subject: [PATCH v6 04/11] arm64: dts: qcom: sdm630: fix the qusb2phy ref clock Date: Sat, 21 May 2022 18:20:42 +0300 Message-Id: <20220521152049.1490220-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org According to the downstram DT file, the qusb2phy ref clock should be GCC_RX0_USB2_CLKREF_CLK, not GCC_RX1_USB2_CLKREF_CLK. Fixes: c65a4ed2ea8b ("arm64: dts: qcom: sdm630: Add USB configuration") Cc: Konrad Dybcio Reviewed-by: Konrad Dybcio Reviewed-by: Marijn Suijten Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index e8bb170e8b2f..5be0ec06ed86 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1262,7 +1262,7 @@ qusb2phy: phy@c012000 { #phy-cells = <0>; clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&gcc GCC_RX1_USB2_CLKREF_CLK>; + <&gcc GCC_RX0_USB2_CLKREF_CLK>; clock-names = "cfg_ahb", "ref"; resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; From patchwork Sat May 21 15:20:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575116 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECA95C4332F for ; Sat, 21 May 2022 15:21:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355367AbiEUPVQ (ORCPT ); Sat, 21 May 2022 11:21:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45620 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355374AbiEUPVC (ORCPT ); Sat, 21 May 2022 11:21:02 -0400 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6AABABC93 for ; Sat, 21 May 2022 08:20:59 -0700 (PDT) Received: by mail-lf1-x131.google.com with SMTP id l13so12135489lfp.11 for ; Sat, 21 May 2022 08:20:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tlRHmgPz4LKIxlJZY56dKqZYBftzR9zIcahl7t/spec=; b=FghNZdxGwghuxdTekvFwLm22ky0yXa05KEsrGVIdW1cuCDFtCfYShFQRfdpkkcIAbw 6WdzuNgjXwIC+VooOLOWA7Hl11hS35V2PDQzutStB1LF2qSKbWzY1eshptWE4kOSoFRx iDIdemEGLAMEntHw+5ZjmUjKdE10ZqYcFllhUVjnNK/VbclFJWlsOgj63yzclAk38I8L g8/9OZI9C/mgfoYIyRBr6kN0vjevwKQy2j+AxtOzIJNe2Nar9AqmWUxegtzPUTgeb7fe PqeFloKoz25L+E6g6UhTuggsmkSw18RIChheI9RO1bwG0+XwYcPNae0jfpalwooFbhQH WfBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tlRHmgPz4LKIxlJZY56dKqZYBftzR9zIcahl7t/spec=; b=GJTTigokYfAUl3cF9dVxORy5nKPMqdIez4KzXUxQK0pqo2UDkBvSQ7GV6fauiP1SG5 3jtdnxGPjxTNI9q7E139DLccWlL7n+e3WYq43DueSXrv90UusEyvwqHao2YuqOUXdwPi LiKFkJP/zz/gO92EjzO04Z5JQCWWiq+U52wFZSxHLMAxnz4OocYySBB8gFP3e7UEwVFR +ix7PLHJFmrGK8PquKp1TE/V380zXyKiluG0vTSzNR9DDfdiaBTObdmLfSBnRgyCKgvU iG2nCmdhQFhmjNeJpuDVhtU7fDv8vNqS8VNiMTFAUXoXf95vgBlaKZwOGWyqTOfG3PUU gIzg== X-Gm-Message-State: AOAM532nWl8RP0ilgB8+XlMggIUfTyH9Wuk+tEe0lF1mOiqNg44GXzm+ aGTTC5uglPKJnOp5dXoAbBc6Bg== X-Google-Smtp-Source: ABdhPJxgIL+Cc5c4uyhBq2/VSx9y557I8YpUCEoNJG7CRaAE++rInxZ8TNIZO+/0IIyErULLv8MVEA== X-Received: by 2002:a05:6512:10cf:b0:473:b735:4fae with SMTP id k15-20020a05651210cf00b00473b7354faemr10518377lfg.93.1653146458991; Sat, 21 May 2022 08:20:58 -0700 (PDT) Received: from eriador.lumag.spb.ru ([94.25.229.156]) by smtp.gmail.com with ESMTPSA id k8-20020a2e92c8000000b0024f3d1daeccsm739933ljh.84.2022.05.21.08.20.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 May 2022 08:20:58 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten , Konrad Dybcio Subject: [PATCH v6 05/11] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 Date: Sat, 21 May 2022 18:20:43 +0300 Message-Id: <20220521152049.1490220-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In preparation to adding second USB host/PHY pair, change first USB PHY's label to qusb2phy0. Suggested-by: Marijn Suijten Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index 42af1fade461..00baacf28c63 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -224,7 +224,7 @@ &pon_resin { linux,code = ; }; -&qusb2phy { +&qusb2phy0 { status = "okay"; vdd-supply = <&vreg_l1b_0p925>; diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 5be0ec06ed86..eb8504e5735c 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1250,13 +1250,13 @@ usb3_dwc3: usb@a800000 { * haven't seen any devices making use of it. */ maximum-speed = "high-speed"; - phys = <&qusb2phy>; + phys = <&qusb2phy0>; phy-names = "usb2-phy"; snps,hird-threshold = /bits/ 8 <0>; }; }; - qusb2phy: phy@c012000 { + qusb2phy0: phy@c012000 { compatible = "qcom,sdm660-qusb2-phy"; reg = <0x0c012000 0x180>; #phy-cells = <0>; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index dcbaacf18f66..9280c1f0c334 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -103,7 +103,7 @@ &pon_resin { linux,code = ; }; -&qusb2phy { +&qusb2phy0 { status = "okay"; vdd-supply = <&vreg_l1b_0p925>; From patchwork Sat May 21 15:20:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40D04C433EF for ; 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Sat, 21 May 2022 08:20:59 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten Subject: [PATCH v6 06/11] arm64: dts: qcom: sdm630: add second (HS) USB host support Date: Sat, 21 May 2022 18:20:44 +0300 Message-Id: <20220521152049.1490220-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT entries for the second DWC3 USB host, which is limited to the USB2.0 (HighSpeed), and the corresponding QUSB PHY. Reviewed-by: Marijn Suijten Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 55 ++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index eb8504e5735c..2b5dbc12bdf8 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1270,6 +1270,20 @@ qusb2phy0: phy@c012000 { status = "disabled"; }; + qusb2phy1: phy@c014000 { + compatible = "qcom,sdm660-qusb2-phy"; + reg = <0x0c014000 0x180>; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_RX1_USB2_CLKREF_CLK>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; + nvmem-cells = <&qusb2_hstx_trim>; + status = "disabled"; + }; + sdhc_2: sdhci@c084000 { compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5"; reg = <0x0c084000 0x1000>; @@ -1375,6 +1389,47 @@ opp-384000000 { }; }; + usb2: usb@c2f8800 { + compatible = "qcom,sdm660-dwc3", "qcom,dwc3"; + reg = <0x0c2f8800 0x400>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_CFG_NOC_USB2_AXI_CLK>, + <&gcc GCC_USB20_MASTER_CLK>, + <&gcc GCC_USB20_MOCK_UTMI_CLK>, + <&gcc GCC_USB20_SLEEP_CLK>; + clock-names = "cfg_noc", "core", + "mock_utmi", "sleep"; + + assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, + <&gcc GCC_USB20_MASTER_CLK>; + assigned-clock-rates = <19200000>, <60000000>; + + interrupts = ; + interrupt-names = "hs_phy_irq"; + + qcom,select-utmi-as-pipe-clk; + + resets = <&gcc GCC_USB_20_BCR>; + + usb2_dwc3: usb@c200000 { + compatible = "snps,dwc3"; + reg = <0x0c200000 0xc8d0>; + interrupts = ; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + + /* This is the HS-only host */ + maximum-speed = "high-speed"; + phys = <&qusb2phy1>; + phy-names = "usb2-phy"; + snps,hird-threshold = /bits/ 8 <0>; + }; + }; + mmcc: clock-controller@c8c0000 { compatible = "qcom,mmcc-sdm630"; reg = <0x0c8c0000 0x40000>; From patchwork Sat May 21 15:20:45 2022 Content-Type: text/plain; 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Sat, 21 May 2022 08:21:01 -0700 (PDT) Received: from eriador.lumag.spb.ru ([94.25.229.156]) by smtp.gmail.com with ESMTPSA id k8-20020a2e92c8000000b0024f3d1daeccsm739933ljh.84.2022.05.21.08.21.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 May 2022 08:21:01 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten Subject: [PATCH v6 07/11] arm64: dts: qcom: sdm630: fix gpu's interconnect path Date: Sat, 21 May 2022 18:20:45 +0300 Message-Id: <20220521152049.1490220-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org ICC path for the GPU incorrectly states <&gnoc 1 &bimc 5>, which is a path from SLAVE_GNOC_BIMC to SLAVE_EBI. According to the downstream GPU uses MASTER_OXILI here, <&bimc 1 ...>. While we are at it, use defined names instead of the numbers for this interconnect path. Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration") Reported-by: Marijn Suijten Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 2b5dbc12bdf8..bcda3a1dd249 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -1045,7 +1046,7 @@ adreno_gpu: gpu@5000000 { nvmem-cells = <&gpu_speed_bin>; nvmem-cell-names = "speed_bin"; - interconnects = <&gnoc 1 &bimc 5>; + interconnects = <&bimc MASTER_OXILI &bimc SLAVE_EBI>; interconnect-names = "gfx-mem"; operating-points-v2 = <&gpu_sdm630_opp_table>; From patchwork Sat May 21 15:20:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B71FC433EF for ; Sat, 21 May 2022 15:21:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353468AbiEUPVS (ORCPT ); Sat, 21 May 2022 11:21:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355391AbiEUPVG (ORCPT ); Sat, 21 May 2022 11:21:06 -0400 Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E52ABC93 for ; Sat, 21 May 2022 08:21:04 -0700 (PDT) Received: by mail-lf1-x12a.google.com with SMTP id p22so18773868lfo.10 for ; Sat, 21 May 2022 08:21:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+RgTCF6Ae4/KvPMsQo/XxnFRH2qjyDoAGXi+2vATcqM=; b=iyLk0Ag4/LMggyRt/kuRFIZRUt/fR3rQYh+BpbV1sjgmt8p8sSSPBv4Gkt59Nqsi3t RVD9sey1zXRY1+mbKCm3UP4zheqdosW8H6wLtRRl5xwzp1K2ur8IEmUQZxcAmMetJhkE jL/tG8/o3YB3KMv43XNylLdSCEuheIHbGLJBOYb5mp8vzG2H/WUCiQtVyEe8OzPobvhL Chq8B5BtIgeZuu7w8HNKHsvkX5pWSsV321j7MHdhyM+GStSov6+Tw6eTZUB9YBrV+VQj vTTFF5SqtNw7hzwEU/eEedBunnbFsAdMTYmBnPRih7EQYMbC/TgRhOkp+qHp1fAeEoqp W/Ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+RgTCF6Ae4/KvPMsQo/XxnFRH2qjyDoAGXi+2vATcqM=; b=XRKfzorwnseOeoWC5SuSEtQuAfU0jidbOoIrfHZsF8QNW6z1UioFsQUnCMREEIkrA6 NRgKCj74kZFmLnA0Wo00NYX0sg1rphzXiSP/vQl9KdptBhY4q8u0KUSbspWEWqtAr7eT JAHNOykSh1806pdmcQ5KQ9bvOMSd8U0u0VY9Ouak/eacraD5UbKdP0aP9WVJRrsSHcms RU3z2ltr/ro/+7Bgec1XPLxfffLerLOEiLdWqCs8ovmUC5roj2dqBfyGER4GIvkSAVkc +43ABuUBYOz6igF4lcKTrMYGXt8WGjzC/Mk7cxi6QZ40r6k2EqWlwjzwjP8NIk9hmVDy JRZQ== X-Gm-Message-State: AOAM530LuTpbkjjqSy7P85HheZyaoDfnZ13UtH4/htTkepus7mQ9noqt pkR0YjJ3tPkydxhU4uXdNqvD1g== X-Google-Smtp-Source: ABdhPJyx3I6pv7/U+QzLxZfStBXWex2MDyVDdB42AjylgqcKcj0gGDkOTK9GjP+c37YI6HtIoDORhA== X-Received: by 2002:ac2:51d0:0:b0:478:5ae7:e78d with SMTP id u16-20020ac251d0000000b004785ae7e78dmr3665441lfm.684.1653146462727; Sat, 21 May 2022 08:21:02 -0700 (PDT) Received: from eriador.lumag.spb.ru ([94.25.229.156]) by smtp.gmail.com with ESMTPSA id k8-20020a2e92c8000000b0024f3d1daeccsm739933ljh.84.2022.05.21.08.21.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 May 2022 08:21:02 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio Subject: [PATCH v6 08/11] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf Date: Sat, 21 May 2022 18:20:46 +0300 Message-Id: <20220521152049.1490220-9-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fix the device tree node in the &sdc2_state_on override. The sdm630 uses 'clk' rather than 'pinconf-clk'. Fixes: 4c1d849ec047 ("arm64: dts: qcom: sdm630-xperia: Retire sdm630-sony-xperia-ganges.dtsi") Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts index b96da53f2f1e..58f687fc49e0 100644 --- a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts +++ b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts @@ -19,7 +19,7 @@ / { }; &sdc2_state_on { - pinconf-clk { + clk { drive-strength = <14>; }; }; From patchwork Sat May 21 15:20:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575328 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D413EC43217 for ; Sat, 21 May 2022 15:21:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355187AbiEUPVR (ORCPT ); Sat, 21 May 2022 11:21:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355393AbiEUPVH (ORCPT ); Sat, 21 May 2022 11:21:07 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 94C5BEE02 for ; Sat, 21 May 2022 08:21:05 -0700 (PDT) Received: by mail-lj1-x235.google.com with SMTP id e4so11961088ljb.13 for ; Sat, 21 May 2022 08:21:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=o0db24Z75xgiNaK8stR7e/3GBiXrKYoix4PN4HjCWow=; b=qw1/hiTL0nYvxep71cj+EHA5GcGh1/X0mTM/ZQs/S9K0rjfZjDGHXefX87UTw6HYNe TP/IGXd0svQZ40rPtHJ02RDmWrCKWpjJGHgromAxwXjtbwWVAwy3aPZ+CWiwnCnorLah YPGLCO2jpk8UeWP19HxKo4l+f39pzC/K2t3/lGC459N+BxVl66caT9O29U6+SWIYbXjj 6idk5IcmAU2q0LT3kO6zEzMZfXfe28SRBK2fWqJXo8Krz4qsPCftOfIS8/Ob9+aEKmnl wqO3+5tEFTFGQhUtAR60yf6XEVQ3n2HWWP401BREE350G03FSWEvtlWOKNnwEypA2xEs xrBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=o0db24Z75xgiNaK8stR7e/3GBiXrKYoix4PN4HjCWow=; b=KfY+jS/Hd+iZNCNq8VjgvaDEg0QIn18ju365IHbVkfWiQ4ijYnNRohx44YR2HaqCc7 JI2dEIv/kGjyalAQbBERvfpL1NUAUX4ZRzA9eKqKgOCc1+cu//9jbtybwfhlE+cKnUan XS/PEfpPreoDGtgYMTbED6mJV1JUgk5HAfp4hYlk/ukvFuzP8EU9Ua6cOxV4UzMAYhBY m22Xci51w7O79zUZ5K3U4/PUpx2tSzryzLdfpqpmSIubm4l4q9p9xi6hov7vkeAH5KXQ w29xZaixtoEz8TFl5+ycSJ0Ku6WD6QUZB/HSb0LgeJAftDSY0YTXPRtFSWPYiHSKPREI T+vw== X-Gm-Message-State: AOAM532x7R8bQ1WXtkxi7EUkxJxsrp4m7CTveaqyEvleehfXdLNtmqqd u+sSEZ49OSfRenVcQvFHlOWpcA== X-Google-Smtp-Source: ABdhPJwjsR1wpmWIjZgbo03vb4WRedzC8BBCJ5bZeizDuaiMJz4c9FFnlBgJBNXTvnDBblRjZJdlbA== X-Received: by 2002:a2e:9a86:0:b0:253:cbc9:a977 with SMTP id p6-20020a2e9a86000000b00253cbc9a977mr8145046lji.143.1653146463860; Sat, 21 May 2022 08:21:03 -0700 (PDT) Received: from eriador.lumag.spb.ru ([94.25.229.156]) by smtp.gmail.com with ESMTPSA id k8-20020a2e92c8000000b0024f3d1daeccsm739933ljh.84.2022.05.21.08.21.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 May 2022 08:21:03 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten Subject: [PATCH v6 09/11] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files Date: Sat, 21 May 2022 18:20:47 +0300 Message-Id: <20220521152049.1490220-10-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This results in dts duplication, but per mutual agreement card detect pin configuration belongs to the board files. Move it from the SoC dtsi to the board DT files. Suggested-by: Marijn Suijten Signed-off-by: Dmitry Baryshkov --- .../boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 16 ++++++++++++++++ arch/arm64/boot/dts/qcom/sdm630.dtsi | 12 ------------ .../boot/dts/qcom/sdm660-xiaomi-lavender.dts | 16 ++++++++++++++++ 3 files changed, 32 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index 00baacf28c63..ccde9951e4fb 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -549,6 +549,22 @@ vreg_l19a_3p3: l19 { }; }; +&sdc2_state_on { + sd-cd { + pins = "gpio54"; + bias-pull-up; + drive-strength = <2>; + }; +}; + +&sdc2_state_off { + sd-cd { + pins = "gpio54"; + bias-disable; + drive-strength = <2>; + }; +}; + &sdhc_1 { status = "okay"; supports-cqe; diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index bcda3a1dd249..e6de49e14840 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -983,12 +983,6 @@ data { bias-pull-up; drive-strength = <10>; }; - - sd-cd { - pins = "gpio54"; - bias-pull-up; - drive-strength = <2>; - }; }; sdc2_state_off: sdc2-off { @@ -1009,12 +1003,6 @@ data { bias-pull-up; drive-strength = <2>; }; - - sd-cd { - pins = "gpio54"; - bias-disable; - drive-strength = <2>; - }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index 9280c1f0c334..2b1216502eb0 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -363,6 +363,22 @@ vreg_l19a_3p3: l19 { }; }; +&sdc2_state_on { + sd-cd { + pins = "gpio54"; + bias-pull-up; + drive-strength = <2>; + }; +}; + +&sdc2_state_off { + sd-cd { + pins = "gpio54"; + bias-disable; + drive-strength = <2>; + }; +}; + &sdhc_1 { status = "okay"; supports-cqe; From patchwork Sat May 21 15:20:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575114 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88602C433F5 for ; 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Sat, 21 May 2022 08:21:04 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten Subject: [PATCH v6 10/11] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support Date: Sat, 21 May 2022 18:20:48 +0300 Message-Id: <20220521152049.1490220-11-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IFC6560 is a board from Inforce Computing, built around the SDA660 SoC. This patch describes core clocks, some regulators from the two PMICs, debug uart, storage, bluetooth and audio DSP remoteproc. The regulator settings are inherited from prior work by Konrad Dybcio and AngeloGioacchino Del Regno. Co-developed-by: Bjorn Andersson Reviewed-by: Marijn Suijten Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sda660-inforce-ifc6560.dts | 461 ++++++++++++++++++ 2 files changed, 462 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index f9e6343acd03..5f717fe0e8d0 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -88,6 +88,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-herobrine-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd.dtb +dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts new file mode 100644 index 000000000000..5360b56df045 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts @@ -0,0 +1,461 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Ltd. + * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, AngeloGioacchino Del Regno + * + */ + +/dts-v1/; + +#include "sdm660.dtsi" +#include "pm660.dtsi" +#include "pm660l.dtsi" + +/ { + model = "Inforce 6560 Single Board Computer"; + compatible = "inforce,ifc6560", "qcom,sda660"; + chassis-type = "embedded"; /* SBC */ + + aliases { + serial0 = &blsp1_uart2; + serial1 = &blsp2_uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + volup { + label = "Volume Up"; + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + }; + + /* + * Until we hook up type-c detection, we + * have to stick with this. But it works. + */ + extcon_usb: extcon-usb { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7533_out>; + }; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + + regulator-always-on; + regulator-boot-on; + }; + + v3p3_bck_bst: v3p3-bck-bst-regulator { + compatible = "regulator-fixed"; + regulator-name = "v3p3_bck_bst"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + vin-supply = <&vph_pwr>; + }; + + v1p2_ldo: v1p2-ldo-regulator { + compatible = "regulator-fixed"; + regulator-name = "v1p2_ldo"; + + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + + vin-supply = <&vph_pwr>; + }; + + v5p0_boost: v5p0-boost-regulator { + compatible = "regulator-fixed"; + regulator-name = "v5p0_boost"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + vin-supply = <&vph_pwr>; + }; +}; + +&adsp_pil { + firmware-name = "qcom/ifc6560/adsp.mbn"; +}; + +&blsp1_dma { + /* + * The board will lock up if we toggle the BLSP clock, unless the + * BAM DMA interconnects support is in place. + */ + /delete-property/ clocks; +}; + +&blsp_i2c6 { + status = "okay"; + + adv7533: hdmi@39 { + compatible = "adi,adv7535"; + reg = <0x39>, <0x66>; + reg-names = "main", "edid"; + + interrupt-parent = <&pm660l_gpios>; + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; + + clocks = <&rpmcc RPM_SMD_BB_CLK2>; + clock-names = "cec"; + /* + * Limit to 3 lanes to prevent the bridge from changing amount + * of lanes in the fly. MSM DSI host doesn't like that. + */ + adi,dsi-lanes = <3>; + avdd-supply = <&vreg_l13a_1p8>; + dvdd-supply = <&vreg_l13a_1p8>; + pvdd-supply = <&vreg_l13a_1p8>; + a2vdd-supply = <&vreg_l13a_1p8>; + v3p3-supply = <&v3p3_bck_bst>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + adv7533_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + + adv7533_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&blsp2_dma { + /* + * The board will lock up if we toggle the BLSP clock, unless the + * BAM DMA interconnects support is in place. + */ + /delete-property/ clocks; +}; + +&blsp2_uart1 { + status = "okay"; + + bluetooth { + compatible = "qcom,wcn3990-bt"; + + vddio-supply = <&vreg_l13a_1p8>; + vddxo-supply = <&vreg_l9a_1p8>; + vddrf-supply = <&vreg_l6a_1p3>; + vddch0-supply = <&vreg_l19a_3p3>; + max-speed = <3200000>; + }; +}; + +&dsi0 { + status = "okay"; + vdda-supply = <&vreg_l1a_1p225>; +}; + +&dsi0_out { + remote-endpoint = <&adv7533_in>; + data-lanes = <0 1 2 3>; +}; + +&dsi0_phy { + status = "okay"; + vcca-supply = <&vreg_l1b_0p925>; +}; + +&mdss { + status = "okay"; +}; + +&mmss_smmu { + status = "okay"; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + status = "okay"; + + linux,code = ; +}; + +&qusb2phy0 { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&qusb2phy1 { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&rpm_requests { + pm660-regulators { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <1805000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1368000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1804000>; + regulator-max-microvolt = <1896000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l13a_1p8: l13 { + /* This gives power to the LPDDR4: never turn it off! */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-always-on; + regulator-boot-on; + }; + + vreg_l19a_3p3: l19 { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + }; + + pm660l-regulators { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <925000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l2b_2p95: l2 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l4b_2p95: l4 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_2p95: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-system-load = <800000>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3125000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3624000>; + regulator-enable-ramp-delay = <500>; + regulator-ramp-delay = <0>; + }; + }; +}; + +&sdc2_state_on { + sd-cd { + pins = "gpio54"; + bias-pull-up; + drive-strength = <2>; + }; +}; + +&sdc2_state_off { + sd-cd { + pins = "gpio54"; + bias-disable; + drive-strength = <2>; + }; +}; + +&sdhc_1 { + status = "okay"; + supports-cqe; + + vmmc-supply = <&vreg_l4b_2p95>; + vqmmc-supply = <&vreg_l8a_1p8>; + + mmc-ddr-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; +}; + +&sdhc_2 { + status = "okay"; + + vmmc-supply = <&vreg_l5b_2p95>; + vqmmc-supply = <&vreg_l2b_2p95>; + + cd-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>; + no-sdio; + no-emmc; +}; + +&tlmm { + gpio-reserved-ranges = <0 4>, <8 4>; +}; + +&usb2 { + status = "okay"; +}; + +&usb2_dwc3 { + dr_mode = "host"; +}; + +&usb3 { + status = "okay"; +}; + +&usb3_dwc3 { + dr_mode = "peripheral"; + extcon = <&extcon_usb>; +}; From patchwork Sat May 21 15:20:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72A32C4332F for ; Sat, 21 May 2022 15:21:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347279AbiEUPVT (ORCPT ); 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Sat, 21 May 2022 08:21:06 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten , Krzysztof Kozlowski Subject: [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board Date: Sat, 21 May 2022 18:20:49 +0300 Message-Id: <20220521152049.1490220-12-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add binding documentation for the Inforce IFC6560 board which uses Snapdragon SDA660. Reviewed-by: Marijn Suijten Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 129cdd246223..ac4ee0f874ea 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -41,6 +41,7 @@ description: | sa8155p sc7180 sc7280 + sda660 sdm630 sdm632 sdm660 @@ -225,6 +226,11 @@ properties: - google,senor - const: qcom,sc7280 + - items: + - enum: + - inforce,ifc6560 + - const: qcom,sda660 + - items: - enum: - fairphone,fp3