From patchwork Fri May 20 12:51:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 575171 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F179C433EF for ; Fri, 20 May 2022 12:51:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349593AbiETMvr (ORCPT ); Fri, 20 May 2022 08:51:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349575AbiETMvp (ORCPT ); Fri, 20 May 2022 08:51:45 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CB9337039; Fri, 20 May 2022 05:51:43 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id F1D721F423B8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653051102; bh=aGNhalei7MTlis1YULrl5Fs8KJfg4KuWW/LGY2qYzzQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YzxX2VQ5Lmit5fkHF5MGtIeY6eXozJ2LH+ZiqMZsQvCbmZ7tNDR1f7sPEKwFp3RKc mckQrai2C+dyB3GdIj+hB41WEqMDYPvKNmutzoSyPWnvPZf3FIZ+gysI21tFw4p22f Z2XbTbJEOEpgwldgd7YgXAVy5/jkrb9Yj7+ZpBDDJVAW9huA+jaQ6VKqUldqNPWsqj eLsh2NUKMDYR9AcijhJUxq6ayfEQiX/SGed7RgSVRabQ72TYWcsnfRYaWvl/5AF5QS qg7LoKlXrtpVJ3DeGTEFY4V98ffQyJR1yr0RFCSrqXJ0DNN1Ko+yMq5GwyghW2SrzH L3MsoZ0lLstZQ== From: AngeloGioacchino Del Regno To: dmitry.torokhov@gmail.com Cc: matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, mkorpershoek@baylibre.com, linux-input@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/5] Input: mtk-pmic-keys - Add kerneldoc to driver structures Date: Fri, 20 May 2022 14:51:28 +0200 Message-Id: <20220520125132.229191-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220520125132.229191-1-angelogioacchino.delregno@collabora.com> References: <20220520125132.229191-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org To enhance human readability, add kerneldoc to all driver structs. Signed-off-by: AngeloGioacchino Del Regno --- drivers/input/keyboard/mtk-pmic-keys.c | 30 +++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index c31ab4368388..8e4fa7cd16e6 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -34,6 +34,13 @@ #define MTK_PMIC_HOMEKEY_INDEX 1 #define MTK_PMIC_MAX_KEY_COUNT 2 +/** + * struct mtk_pmic_keys_regs - PMIC keys per-key registers + * @deb_reg: Debounced key status register + * @deb_mask: Bitmask of this key in status register + * @intsel_reg: Interrupt selector register + * @intsel_mask: Bitmask of this key in interrupt selector + */ struct mtk_pmic_keys_regs { u32 deb_reg; u32 deb_mask; @@ -50,6 +57,11 @@ struct mtk_pmic_keys_regs { .intsel_mask = _intsel_mask, \ } +/** + * struct mtk_pmic_regs - PMIC Keys registers + * @keys_regs: Specific key registers + * @pmic_rst_reg: PMIC Keys reset register + */ struct mtk_pmic_regs { const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT]; u32 pmic_rst_reg; @@ -85,15 +97,31 @@ static const struct mtk_pmic_regs mt6358_regs = { .pmic_rst_reg = MT6358_TOP_RST_MISC, }; +/** + * struct mtk_pmic_keys_info - PMIC Keys per-key params + * @keys: Pointer to main driver structure + * @regs: Register offsets/masks for this key + * @keycode: Key code for this key + * @irq: Keypress or press/release interrupt + * @irq_r: Key release interrupt (optional) + * @wakeup: Indicates whether to use this key as a wakeup source + */ struct mtk_pmic_keys_info { struct mtk_pmic_keys *keys; const struct mtk_pmic_keys_regs *regs; unsigned int keycode; int irq; - int irq_r; /* optional: release irq if different */ + int irq_r; bool wakeup:1; }; +/** + * struct mtk_pmic_keys - Main driver structure + * @input_dev: Input device pointer + * @dev: Device pointer + * @regmap: Regmap handle + * @keys: Per-key parameters + */ struct mtk_pmic_keys { struct input_dev *input_dev; struct device *dev; From patchwork Fri May 20 12:51:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 574710 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1D4AC433FE for ; Fri, 20 May 2022 12:51:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349577AbiETMvt (ORCPT ); Fri, 20 May 2022 08:51:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35104 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349572AbiETMvp (ORCPT ); Fri, 20 May 2022 08:51:45 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 317A92EA1E; Fri, 20 May 2022 05:51:44 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id 8FBD81F462B7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653051103; bh=QOwsebbE+upK+gVJVhJOnLLBda4LVPYp2RLtMhPVfBM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kvyz47qav2Xdemr7tAjD4VetXMYQoqNOwqLFnVEnrn6pbZ3gWfOKdt4ivXsFod/mL Src1tfD33PCWy4b/3iPGp/p7T+PgnzxyRCoUXFcgg0pjVpwSfyVOWIRehudhAjJ0xS 2UaBjW373IJJ48wH5VdcIEiuhkb6MI3E5eLJxBS4qldLh+hPBPDDT7DMDv7QXzGblg cEV4o0RTJRbsYyhOU47RP3xGex1eHSeRsrSMBRxs4LT5SY+k8hdQuDsMp4aM0mEOj7 7kSGzdI7bIg3JDsg8OBQxCfq8weuRp/r8fB88fXO7+94UdnCZF6yQ8jbYHj2vuYgnS p6XB6Bn5RxhCg== From: AngeloGioacchino Del Regno To: dmitry.torokhov@gmail.com Cc: matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, mkorpershoek@baylibre.com, linux-input@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] Input: mtk-pmic-keys - Use regmap_{set, clear}_bits where possible Date: Fri, 20 May 2022 14:51:29 +0200 Message-Id: <20220520125132.229191-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220520125132.229191-1-angelogioacchino.delregno@collabora.com> References: <20220520125132.229191-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org Instead of always using regmap_update_bits(), let's go for the shorter regmap_set_bits() and regmap_clear_bits() where possible. No functional change. Signed-off-by: AngeloGioacchino Del Regno --- drivers/input/keyboard/mtk-pmic-keys.c | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index 8e4fa7cd16e6..83d0b90cc8cb 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -157,28 +157,16 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, switch (long_press_mode) { case LP_ONEKEY: - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_PWRKEY_RST, - MTK_PMIC_PWRKEY_RST); - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_HOMEKEY_RST, - 0); + regmap_set_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_PWRKEY_RST); + regmap_clear_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_HOMEKEY_RST); break; case LP_TWOKEY: - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_PWRKEY_RST, - MTK_PMIC_PWRKEY_RST); - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_HOMEKEY_RST, - MTK_PMIC_HOMEKEY_RST); + regmap_set_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_PWRKEY_RST); + regmap_set_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_HOMEKEY_RST); break; case LP_DISABLE: - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_PWRKEY_RST, - 0); - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_HOMEKEY_RST, - 0); + regmap_clear_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_PWRKEY_RST); + regmap_clear_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_HOMEKEY_RST); break; default: break; From patchwork Fri May 20 12:51:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 574709 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 985ACC433EF for ; Fri, 20 May 2022 12:51:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349126AbiETMvy (ORCPT ); Fri, 20 May 2022 08:51:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35226 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349583AbiETMvq (ORCPT ); Fri, 20 May 2022 08:51:46 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C54F233EB7; Fri, 20 May 2022 05:51:44 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id 2FCEC1F462BB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653051103; bh=+QRSBoHse5q7vPQRO55UEJJKcrFXryf2svvX8jsupyQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jyuFBTkF79eteyDMwSvah/A/pUA/vOcE7Odgz8r6BhXRK6hrW4k+16RLhosbjd9iw sYXMKW2rJ06URdIX95Ij2XiLt46P0mgFIGFcv8nCW/DtOD/8SJZ8kPDJUlZyIozsGn q9ELUgVAztunisXSOuwaAh3XMxPP6qBAXLDAxhfVtI8z5YOUqAj0s5vRcqYbr/X32k VKsS4ZKjzi7KhNdb3+Ox0J5Uk8PqdDbzjCpc9srFjG6coI9jArqLKqWcTgSYkPbc5a he2RXHy0IsF8j2c0M62lBmRfyDxbvXJMtMUHVR1WrXjEenJvrYwFPeTX7SQqFbBQ5Y i3o6DFns8xLTA== From: AngeloGioacchino Del Regno To: dmitry.torokhov@gmail.com Cc: matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, mkorpershoek@baylibre.com, linux-input@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] Input: mtk-pmic-keys - Transfer per-key bit in mtk_pmic_keys_regs Date: Fri, 20 May 2022 14:51:30 +0200 Message-Id: <20220520125132.229191-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220520125132.229191-1-angelogioacchino.delregno@collabora.com> References: <20220520125132.229191-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org Place the key bit in struct mtk_pmic_keys_regs to enhance this driver's flexibility, in preparation for adding support for more PMICs. While at it, also remove the *_MASK and *_SHIFT definitions, as these can be simply expressed as BIT(x), and "slightly rename" the MTK_PMIC_{HOME,PWR}KEY_RST macro to better reflect the real name for these bits. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno --- drivers/input/keyboard/mtk-pmic-keys.c | 46 ++++++++++++++------------ 1 file changed, 25 insertions(+), 21 deletions(-) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index 83d0b90cc8cb..d8285612265f 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -18,17 +18,11 @@ #include #include -#define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1 -#define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6 -#define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1 -#define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5 #define MTK_PMIC_RST_DU_MASK 0x3 #define MTK_PMIC_RST_DU_SHIFT 8 -#define MTK_PMIC_PWRKEY_RST \ - (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT) -#define MTK_PMIC_HOMEKEY_RST \ - (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT) +#define MTK_PMIC_MT6397_HOMEKEY_RST_EN BIT(5) +#define MTK_PMIC_MT6397_PWRKEY_RST_EN BIT(6) #define MTK_PMIC_PWRKEY_INDEX 0 #define MTK_PMIC_HOMEKEY_INDEX 1 @@ -40,21 +34,24 @@ * @deb_mask: Bitmask of this key in status register * @intsel_reg: Interrupt selector register * @intsel_mask: Bitmask of this key in interrupt selector + * @rst_en_mask: Bitmask of this key in PMIC keys reset register */ struct mtk_pmic_keys_regs { u32 deb_reg; u32 deb_mask; u32 intsel_reg; u32 intsel_mask; + u32 rst_en_mask; }; #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \ - _intsel_reg, _intsel_mask) \ + _intsel_reg, _intsel_mask, _rst_mask) \ { \ .deb_reg = _deb_reg, \ .deb_mask = _deb_mask, \ .intsel_reg = _intsel_reg, \ .intsel_mask = _intsel_mask, \ + .rst_en_mask = _rst_mask, \ } /** @@ -70,30 +67,32 @@ struct mtk_pmic_regs { static const struct mtk_pmic_regs mt6397_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS, - 0x8, MT6397_INT_RSV, 0x10), + 0x8, MT6397_INT_RSV, 0x10, MTK_PMIC_MT6397_PWRKEY_RST_EN), .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2, - 0x10, MT6397_INT_RSV, 0x8), + 0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_MT6397_HOMEKEY_RST_EN), .pmic_rst_reg = MT6397_TOP_RST_MISC, }; static const struct mtk_pmic_regs mt6323_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, - 0x2, MT6323_INT_MISC_CON, 0x10), + 0x2, MT6323_INT_MISC_CON, 0x10, MTK_PMIC_MT6397_PWRKEY_RST_EN), .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, - 0x4, MT6323_INT_MISC_CON, 0x8), + 0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_MT6397_HOMEKEY_RST_EN), .pmic_rst_reg = MT6323_TOP_RST_MISC, }; static const struct mtk_pmic_regs mt6358_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, - 0x2, MT6358_PSC_TOP_INT_CON0, 0x5), + 0x2, MT6358_PSC_TOP_INT_CON0, 0x5, + MTK_PMIC_MT6397_PWRKEY_RST_EN), .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, - 0x8, MT6358_PSC_TOP_INT_CON0, 0xa), + 0x8, MT6358_PSC_TOP_INT_CON0, 0xa, + MTK_PMIC_MT6397_HOMEKEY_RST_EN), .pmic_rst_reg = MT6358_TOP_RST_MISC, }; @@ -140,6 +139,11 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, { int ret; u32 long_press_mode, long_press_debounce; + const struct mtk_pmic_keys_regs *kregs_pwr; + const struct mtk_pmic_keys_regs *kregs_home; + + kregs_pwr = keys->keys[MTK_PMIC_PWRKEY_INDEX].regs; + kregs_home = keys->keys[MTK_PMIC_HOMEKEY_INDEX].regs; ret = of_property_read_u32(keys->dev->of_node, "power-off-time-sec", &long_press_debounce); @@ -157,16 +161,16 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, switch (long_press_mode) { case LP_ONEKEY: - regmap_set_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_PWRKEY_RST); - regmap_clear_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_HOMEKEY_RST); + regmap_set_bits(keys->regmap, pmic_rst_reg, kregs_pwr->rst_en_mask); + regmap_clear_bits(keys->regmap, pmic_rst_reg, kregs_home->rst_en_mask); break; case LP_TWOKEY: - regmap_set_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_PWRKEY_RST); - regmap_set_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_HOMEKEY_RST); + regmap_set_bits(keys->regmap, pmic_rst_reg, kregs_pwr->rst_en_mask); + regmap_set_bits(keys->regmap, pmic_rst_reg, kregs_home->rst_en_mask); break; case LP_DISABLE: - regmap_clear_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_PWRKEY_RST); - regmap_clear_bits(keys->regmap, pmic_rst_reg, MTK_PMIC_HOMEKEY_RST); + regmap_clear_bits(keys->regmap, pmic_rst_reg, kregs_pwr->rst_en_mask); + regmap_clear_bits(keys->regmap, pmic_rst_reg, kregs_home->rst_en_mask); break; default: break; From patchwork Fri May 20 12:51:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 575170 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01842C433F5 for ; Fri, 20 May 2022 12:51:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349608AbiETMvx (ORCPT ); Fri, 20 May 2022 08:51:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349591AbiETMvq (ORCPT ); Fri, 20 May 2022 08:51:46 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 571143B283; Fri, 20 May 2022 05:51:45 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id BFF531F462BC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653051104; bh=82AzsQEjRUi2HwF6h/SdIW38pOVcKxedGJa6T0RPfFo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cNowLvhoAMnRbvtEzS6N8rshccKOmDp/1c46XxhXb+GF6xzaC/Xa68snSNt6zIVok IwURp1T3eMi4Ytuq304dXgSTClvDfH5VVrVRNANxX8bkea8RZ1UfmqIEH7DjLmcuJv ajjcJsQLBS0hx9FIcNzYb3zVby+5Wr97ilxs4wIX4WiMNRTk70bjpzK/sKQwBXT9wH BTexZLr3mOUR5A3QOTM9ldzdeZJ1c59mBQxj0DIrcVImvm1/9mrPLw/CVnF9Tm8sU3 AT7eP96cXjSLW/+U+0kwbX/zOrugY743STRUe1v6mWyAEFJ6gU24sQjibGDVb/KECt Hn+uxc5F/tDZg== From: AngeloGioacchino Del Regno To: dmitry.torokhov@gmail.com Cc: matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, mkorpershoek@baylibre.com, linux-input@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] Input: mtk-pmic-keys - Move long press debounce mask to mtk_pmic_regs Date: Fri, 20 May 2022 14:51:31 +0200 Message-Id: <20220520125132.229191-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220520125132.229191-1-angelogioacchino.delregno@collabora.com> References: <20220520125132.229191-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org As the second and last step of preparation to add support for more PMICs in this driver, move the long press debounce mask to struct mtk_pmic_regs and use that in mtk_pmic_keys_lp_reset_setup() instead of directly using the definition. While at it, remove the MTK_PMIC_RST_DU_{MASK,SHIFT} definitions, as these can be expressed with the GENMASK macro and a new name was chosen for that, as to uniform the definition names with the others found in this driver. Lastly, it was necessary to change the function signature of mtk_pmic_keys_lp_reset_setup() to now pass a pointer to the main mtk_pmic_regs structure, since that's what contains the reset debounce mask now and, for readability purposes, for this function, all of the references to keys->regmap were changed to use a local 'rmap' pointer, or the calls to regmap_{set,clear}_bits would be ~94 columns long. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno --- drivers/input/keyboard/mtk-pmic-keys.c | 33 +++++++++++++++----------- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index d8285612265f..acd5aefac5f9 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -18,11 +18,9 @@ #include #include -#define MTK_PMIC_RST_DU_MASK 0x3 -#define MTK_PMIC_RST_DU_SHIFT 8 - #define MTK_PMIC_MT6397_HOMEKEY_RST_EN BIT(5) #define MTK_PMIC_MT6397_PWRKEY_RST_EN BIT(6) +#define MTK_PMIC_MT6397_RST_DU_MASK GENMASK(9, 8) #define MTK_PMIC_PWRKEY_INDEX 0 #define MTK_PMIC_HOMEKEY_INDEX 1 @@ -58,10 +56,12 @@ struct mtk_pmic_keys_regs { * struct mtk_pmic_regs - PMIC Keys registers * @keys_regs: Specific key registers * @pmic_rst_reg: PMIC Keys reset register + * @rst_lprst_mask: Long-press reset timeout bitmask */ struct mtk_pmic_regs { const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT]; u32 pmic_rst_reg; + u32 rst_lprst_mask; }; static const struct mtk_pmic_regs mt6397_regs = { @@ -72,6 +72,7 @@ static const struct mtk_pmic_regs mt6397_regs = { MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2, 0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_MT6397_HOMEKEY_RST_EN), .pmic_rst_reg = MT6397_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_MT6397_RST_DU_MASK, }; static const struct mtk_pmic_regs mt6323_regs = { @@ -82,6 +83,7 @@ static const struct mtk_pmic_regs mt6323_regs = { MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, 0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_MT6397_HOMEKEY_RST_EN), .pmic_rst_reg = MT6323_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_MT6397_RST_DU_MASK, }; static const struct mtk_pmic_regs mt6358_regs = { @@ -94,6 +96,7 @@ static const struct mtk_pmic_regs mt6358_regs = { 0x8, MT6358_PSC_TOP_INT_CON0, 0xa, MTK_PMIC_MT6397_HOMEKEY_RST_EN), .pmic_rst_reg = MT6358_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_MT6397_RST_DU_MASK, }; /** @@ -135,24 +138,26 @@ enum mtk_pmic_keys_lp_mode { }; static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, - u32 pmic_rst_reg) + const struct mtk_pmic_regs *regs) { int ret; + struct regmap *rmap; u32 long_press_mode, long_press_debounce; const struct mtk_pmic_keys_regs *kregs_pwr; const struct mtk_pmic_keys_regs *kregs_home; kregs_pwr = keys->keys[MTK_PMIC_PWRKEY_INDEX].regs; kregs_home = keys->keys[MTK_PMIC_HOMEKEY_INDEX].regs; + rmap = keys->regmap; ret = of_property_read_u32(keys->dev->of_node, "power-off-time-sec", &long_press_debounce); if (ret) long_press_debounce = 0; - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_RST_DU_MASK << MTK_PMIC_RST_DU_SHIFT, - long_press_debounce << MTK_PMIC_RST_DU_SHIFT); + regmap_update_bits(rmap, regs->pmic_rst_reg, + regs->rst_lprst_mask, + long_press_debounce << ffs(regs->rst_lprst_mask)); ret = of_property_read_u32(keys->dev->of_node, "mediatek,long-press-mode", &long_press_mode); @@ -161,16 +166,16 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, switch (long_press_mode) { case LP_ONEKEY: - regmap_set_bits(keys->regmap, pmic_rst_reg, kregs_pwr->rst_en_mask); - regmap_clear_bits(keys->regmap, pmic_rst_reg, kregs_home->rst_en_mask); + regmap_set_bits(rmap, regs->pmic_rst_reg, kregs_pwr->rst_en_mask); + regmap_clear_bits(rmap, regs->pmic_rst_reg, kregs_home->rst_en_mask); break; case LP_TWOKEY: - regmap_set_bits(keys->regmap, pmic_rst_reg, kregs_pwr->rst_en_mask); - regmap_set_bits(keys->regmap, pmic_rst_reg, kregs_home->rst_en_mask); + regmap_set_bits(rmap, regs->pmic_rst_reg, kregs_pwr->rst_en_mask); + regmap_set_bits(rmap, regs->pmic_rst_reg, kregs_home->rst_en_mask); break; case LP_DISABLE: - regmap_clear_bits(keys->regmap, pmic_rst_reg, kregs_pwr->rst_en_mask); - regmap_clear_bits(keys->regmap, pmic_rst_reg, kregs_home->rst_en_mask); + regmap_clear_bits(rmap, regs->pmic_rst_reg, kregs_pwr->rst_en_mask); + regmap_clear_bits(rmap, regs->pmic_rst_reg, kregs_home->rst_en_mask); break; default: break; @@ -378,7 +383,7 @@ static int mtk_pmic_keys_probe(struct platform_device *pdev) return error; } - mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs->pmic_rst_reg); + mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs); platform_set_drvdata(pdev, keys); From patchwork Fri May 20 12:51:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 575169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2DE2C433FE for ; Fri, 20 May 2022 12:51:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349598AbiETMvw (ORCPT ); Fri, 20 May 2022 08:51:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349566AbiETMvr (ORCPT ); Fri, 20 May 2022 08:51:47 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 61F37527DC; Fri, 20 May 2022 05:51:46 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id 5A8E61F462C1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653051104; bh=Fo+/ZjhNQoJvd6sqh6rdL7fraQLbd7Rg63FwzQi2DIQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YB7ITXrEVoRW5GVcgydo4v1h+1GmiSWeKWfP1BVqjc5eIGbWZodCSo2wIOHHIPyWc lv4enyKopzi41y3XDRKn9hqUB31qEGNyYXWaVq0CEfx36dtUhTyJPUJJ/hULINQNJP H3xx2lePFETeyOXjFEkCp1YjTuB6ySC3CSzBds7SQLufnzAh2biDibBI3ohn1u+2m+ Nyb2xFdin1VUV+bkiFZJ53MLKSJnet2aVrsfrikEhxLxrxaJh3Wjn9yD3cMt31tAZD RRrsv1SeUP5PuNpnDh5kMu6IE+F0bbhKUaYCWa3+P369ZlyR6/kjW+1bA450O0e/OC pkLXGJaeluFrQ== From: AngeloGioacchino Del Regno To: dmitry.torokhov@gmail.com Cc: matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, mkorpershoek@baylibre.com, linux-input@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] Input: mtk-pmic-keys - Add support for MT6331 PMIC keys Date: Fri, 20 May 2022 14:51:32 +0200 Message-Id: <20220520125132.229191-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220520125132.229191-1-angelogioacchino.delregno@collabora.com> References: <20220520125132.229191-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org Add support for PMIC Keys of the MT6331 PMIC. Signed-off-by: AngeloGioacchino Del Regno --- drivers/input/keyboard/mtk-pmic-keys.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index acd5aefac5f9..4a03fdfe8282 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -22,6 +23,10 @@ #define MTK_PMIC_MT6397_PWRKEY_RST_EN BIT(6) #define MTK_PMIC_MT6397_RST_DU_MASK GENMASK(9, 8) +#define MTK_PMIC_MT6331_HOMEKEY_RST_EN BIT(8) +#define MTK_PMIC_MT6331_PWRKEY_RST_EN BIT(9) +#define MTK_PMIC_MT6331_RST_DU_MASK GENMASK(13, 12) + #define MTK_PMIC_PWRKEY_INDEX 0 #define MTK_PMIC_HOMEKEY_INDEX 1 #define MTK_PMIC_MAX_KEY_COUNT 2 @@ -86,6 +91,19 @@ static const struct mtk_pmic_regs mt6323_regs = { .rst_lprst_mask = MTK_PMIC_MT6397_RST_DU_MASK, }; +static const struct mtk_pmic_regs mt6331_regs = { + .keys_regs[MTK_PMIC_PWRKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x2, + MT6331_INT_MISC_CON, 0x4, + MTK_PMIC_MT6331_PWRKEY_RST_EN), + .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x4, + MT6331_INT_MISC_CON, 0x2, + MTK_PMIC_MT6331_HOMEKEY_RST_EN), + .pmic_rst_reg = MT6331_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_MT6331_RST_DU_MASK, +}; + static const struct mtk_pmic_regs mt6358_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, @@ -284,6 +302,9 @@ static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { }, { .compatible = "mediatek,mt6323-keys", .data = &mt6323_regs, + }, { + .compatible = "mediatek,mt6331-keys", + .data = &mt6331_regs, }, { .compatible = "mediatek,mt6358-keys", .data = &mt6358_regs,