From patchwork Tue May 17 18:04:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamal Dasu X-Patchwork-Id: 573604 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83D36C433FE for ; Tue, 17 May 2022 18:22:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352050AbiEQSV5 (ORCPT ); Tue, 17 May 2022 14:21:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352065AbiEQSVg (ORCPT ); Tue, 17 May 2022 14:21:36 -0400 Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1E09192BB; Tue, 17 May 2022 11:21:35 -0700 (PDT) Received: by mail-pl1-x62c.google.com with SMTP id s14so18088504plk.8; Tue, 17 May 2022 11:21:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rVtCL90Qae4d8alJpsZ6NZkN+XgFY1ihCUWrdlNKxKc=; b=Ns3zTGCV5bxHw40xDp3VvAthF1xfTEFgaFvFAcXm8fAcnll3uJEabiAtrDv85TYJFB qdBuU0cPg28gvFb7iDiWaPMk67BwvVAHxkxM8baxgpCUe2+rtG8d5F7YTS2a7ZaAj/jg Um4lyLoBefdjgWB4TCahnJi2S5OK+YhrzXRw+Rbq+MGZfaHYQMOIbHKTJ9X8eTi+gW0d jZdyiK0CRg06gWbqbWe2ObqodmBGC2SSSduF98VrWMqHol9liDaJwCwZnKpS3pOiUndy UTQ5T/8bz5REucg3cIrOJiuvBnXDFGmgeA4n9mUrcp8giCWbCfOFT91g/brocYybGIo3 9LQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rVtCL90Qae4d8alJpsZ6NZkN+XgFY1ihCUWrdlNKxKc=; b=FXGDdUufLs3p88NrOPQnFJ9gFIoqmQbx+w0UIxUCJb9B2bkIlwuyRmsoZflTrh2uux kj1i1li42F9ay2feaaMS1VVitS/6TJoGULupHHkV0VRZn73uUucrugMTB4WhVyjNeDqK TOKhkQja4i3GZmDplR4Hr7XZhl/SPUfSORxpt3ldyPQ5Rio+PRlzp772KFdct8WU4ZxH OnK2OSBWgjGiIXfuUMK1m8VTSjlUyp4/MsQfxAnbX0JSq4zDU9pYvjpM+M9rGphScpAV ipEIDn+j2KpKLeyKPxKQc3iTxJDZ8OJXkpXuPIHFCXotp3II68twH2o7ZLST04ZpDYJ2 uV5g== X-Gm-Message-State: AOAM532NkG4cnDdZpkilQRPUQQIpFGYz2Z3E0srfxiQyMUIB7XqjdC79 h291Bpdlyi5DPrLTj8BGQmE= X-Google-Smtp-Source: ABdhPJxlluvBJbnqIYOpmCUiFPEvBJtmJAd/7DRkLs5+AKWgfCAKFaqwI49KsBFtxQ4gqmkYHb26dQ== X-Received: by 2002:a17:90b:3903:b0:1dc:8fe0:df4d with SMTP id ob3-20020a17090b390300b001dc8fe0df4dmr26374159pjb.191.1652811695225; Tue, 17 May 2022 11:21:35 -0700 (PDT) Received: from mail.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id 125-20020a630383000000b003f5e0c264bcsm837641pgd.66.2022.05.17.11.21.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 11:21:34 -0700 (PDT) From: Kamal Dasu To: ulf.hansson@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, alcooperx@gmail.com Cc: f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com, adrian.hunter@intel.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kamal Dasu Subject: [PATCH v2 1/2] dt-bindings: mmc: Add Broadcom optional sdio_freq clock Date: Tue, 17 May 2022 14:04:34 -0400 Message-Id: <20220517180435.29940-2-kdasu.kdev@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220517180435.29940-1-kdasu.kdev@gmail.com> References: <20220517180435.29940-1-kdasu.kdev@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The 72116B0 has improved SDIO controllers that allow the max clock rate to be increased from a max of 100MHz to a max of 150MHz. Optional "sdio_freq" clock is used to drive the bus clock if present optional property "max-frequency" specifies a base clock frequency in Hz that overrides the base clock frequency in the CAPS registers. Signed-off-by: Kamal Dasu Reviewed-by: Krzysztof Kozlowski Acked-by: Florian Fainelli --- .../bindings/mmc/brcm,sdhci-brcmstb.yaml | 25 ++++++++++++++----- 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml index b672202fff4e..3a4f6e75bf5e 100644 --- a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml +++ b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml @@ -10,9 +10,6 @@ maintainers: - Al Cooper - Florian Fainelli -allOf: - - $ref: mmc-controller.yaml# - properties: compatible: oneOf: @@ -42,23 +39,39 @@ properties: maxItems: 1 clocks: - maxItems: 1 - description: - handle to core clock for the sdhci controller. + minItems: 1 + items: + - description: handle to core clock for the sdhci controller + - description: handle to improved 150Mhz clock for sdhci controller (Optional clock) clock-names: + minItems: 1 items: - const: sw_sdio + - const: sdio_freq # Optional clock sdhci,auto-cmd12: type: boolean description: Specifies that controller should use auto CMD12 +allOf: + - $ref: mmc-controller.yaml# + - if: + properties: + clock-names: + contains: + const: sdio_freq + + then: + required: + - max-frequency + required: - compatible - reg - interrupts - clocks + - clock-names unevaluatedProperties: false From patchwork Tue May 17 18:04:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamal Dasu X-Patchwork-Id: 574774 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4D7DC4332F for ; Tue, 17 May 2022 18:22:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351449AbiEQSWD (ORCPT ); Tue, 17 May 2022 14:22:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233638AbiEQSVz (ORCPT ); Tue, 17 May 2022 14:21:55 -0400 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4477619F8B; Tue, 17 May 2022 11:21:40 -0700 (PDT) Received: by mail-pj1-x1029.google.com with SMTP id ev18so7512459pjb.4; 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Tue, 17 May 2022 11:21:39 -0700 (PDT) Received: from mail.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id 125-20020a630383000000b003f5e0c264bcsm837641pgd.66.2022.05.17.11.21.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 11:21:39 -0700 (PDT) From: Kamal Dasu To: ulf.hansson@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, alcooperx@gmail.com Cc: f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com, adrian.hunter@intel.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kamal Dasu Subject: [PATCH v2 2/2] mmc: sdhci-brcmstb: Add ability to increase max clock rate for 72116b0 Date: Tue, 17 May 2022 14:04:35 -0400 Message-Id: <20220517180435.29940-3-kdasu.kdev@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220517180435.29940-1-kdasu.kdev@gmail.com> References: <20220517180435.29940-1-kdasu.kdev@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Al Cooper The 72116B0 has improved SDIO controllers that allow the max clock rate to be increased from a max of 100MHz to a max of 150MHz. The driver will need to get the clock and increase it's default rate and override the caps register, that still indicates a max of 100MHz. The new clock will be named "sdio_freq" in the DT node's "clock-names" list. The driver will use a DT property, "max-frequency", to enable this functionality and will get the actual rate in MHz from the property to allow various speeds to be requested. Signed-off-by: Al Cooper Signed-off-by: Kamal Dasu --- drivers/mmc/host/sdhci-brcmstb.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index 8eb57de48e0c..bb614a5e1ea4 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -250,6 +250,8 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) struct sdhci_pltfm_host *pltfm_host; const struct of_device_id *match; struct sdhci_brcmstb_priv *priv; + struct clk *master_clk; + u32 actual_clock_mhz; struct sdhci_host *host; struct resource *iomem; struct clk *clk; @@ -330,6 +332,32 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT) host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; + /* Change the base clock frequency if the DT property exists */ + if (!(host->mmc->f_max)) + goto add_host; + + master_clk = devm_clk_get(&pdev->dev, "sdio_freq"); + if (IS_ERR(master_clk)) { + dev_warn(&pdev->dev, "Clock for \"sdio_freq\" not found\n"); + goto add_host; + } else { + res = clk_prepare_enable(master_clk); + if (res) + goto err; + } + + /* set improved clock rate */ + clk_set_rate(master_clk, host->mmc->f_max); + actual_clock_mhz = clk_get_rate(master_clk) / 1000000; + + host->caps &= ~SDHCI_CLOCK_V3_BASE_MASK; + host->caps |= (actual_clock_mhz << SDHCI_CLOCK_BASE_SHIFT); + /* Disable presets because they are now incorrect */ + host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN; + dev_dbg(&pdev->dev, "Base Clock Frequency changed to %dMHz\n", + actual_clock_mhz); + +add_host: res = sdhci_brcmstb_add_host(host, priv); if (res) goto err;