From patchwork Sun Jan 6 08:09:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 154826 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2339590ljp; Sun, 6 Jan 2019 00:10:22 -0800 (PST) X-Google-Smtp-Source: ALg8bN7tvNDupBuddCU2MsAzAD6/PJYHwJBolZ6VbC1PZUjs06MXGHayKgJMf0DOZ5GcM+qPkIhH X-Received: by 2002:a17:902:b18b:: with SMTP id s11mr56844961plr.56.1546762222851; Sun, 06 Jan 2019 00:10:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1546762222; cv=none; d=google.com; s=arc-20160816; b=cE269DKx+4jBmsSZ5ch7tRPv2LKRe7aT51ZoddwsWdWUmRO9/dPRdUuD3z3gMIN/26 NlC2jrvh0c/dW4XuetkcbiyBrbx5mIw8fq7Y830Jc3QWUmE+c/XI7D47VmBXyUn0YzMl COEu5l+k2p6HN7UgXWrj+kjp1zk46wGqpInWR5bNWhnwg8uveeujIYLjnZYNdf5BZLLA LhIYcWx1I4fkGXxtEfv5v4BPv11McAa2jxIirWzkitodbS7H/7FTG+27NTkaVQwU8KXQ nPANH55U7skywaiDpmNi3jiT9hF9/MbDJjSBuMrSp7R77BS9+ogbpufWJcOMS/lYshH8 dxUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=rh2Ck7LIQpEkBwHFh55ynypbWnh0z21Uufq2+c/DSpk=; b=d/WzGL99sspfAbhloP/VLa//mpw9ARx6pSPB+sn3VZn1wvTK6wdywozv0M+NZYFurx loccEuK3PSlFzEtCyNN63uQYRbkxjF2Sv69dmJd0N38t8BcNI8Y3wJy8B/9DHN2oT+ez 6XFRwMawOho28rM4dxjg38ZUlY6f13Ol2GRmEVFv0IjgjHT5F3jZvi5efsdKUyEe7hTN CTxtoWS5UFNfUoT+J8GP8sooFwX8qMniqNr/yZagjDxOAF+Qp4Lj3ACInXCtIYKPTBbe 9C2RyKnWIkUdersS8M43pZdWGrQqxc4soZCW6CQB2XWNryklVLlxmLe0lgPNlLcEQYzq gNNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cMMKRR86; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u131si8928751pgb.594.2019.01.06.00.10.22; Sun, 06 Jan 2019 00:10:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cMMKRR86; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726406AbfAFIKT (ORCPT + 7 others); Sun, 6 Jan 2019 03:10:19 -0500 Received: from mail-pg1-f193.google.com ([209.85.215.193]:36594 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726441AbfAFIKT (ORCPT ); Sun, 6 Jan 2019 03:10:19 -0500 Received: by mail-pg1-f193.google.com with SMTP id n2so19347444pgm.3 for ; Sun, 06 Jan 2019 00:10:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rh2Ck7LIQpEkBwHFh55ynypbWnh0z21Uufq2+c/DSpk=; b=cMMKRR86xvlO/bimhaW4sFTbsUyo1Dvu5bGm1I1yAXrqhKPXT5lb5yW69OagxYWoay usXvR9vn8Yxn2UPZB1s42euFIrprWvAGySzeA2bS+/nh7vqCkRgqlqVjUf4c6VVp+Fir r5Qf4Ey2wQMgUvigBhC7vbFSS3k2UovfIVdrA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rh2Ck7LIQpEkBwHFh55ynypbWnh0z21Uufq2+c/DSpk=; b=I1wopjqEf2bJM4vqoCCCAimMg6OBGegI66cxs8JU+E/jE9bufAq7iYth2TUlsyqm8d j5Io3l0ZzwPtIYgJyCAxytUvstGua7WG7DifIGZXq8pMuTcLnEZOK9n7btrH4xgqUTvi EXACun2K7gQdJqT/5BW/iiNZm8M7gw1EdlFsWHNm4Gi0l0mHdgtEgR3b9QVe4+n/r4c3 0IZorEsYoxtprqwFSy32addvHsVW0qytIOU59MWtyiMGpgszep+UxMvSF01YRMm6YqWv vmPU56nnRWZZanEWsV9gJd87MAZfGo0OqfdmVIQBtuaY0i0U51ZtnFFXo9cErstLegib XAuw== X-Gm-Message-State: AA+aEWbCa4AqIgkKn3zx4hq0NS8bCUMm16rbOD6cTfyoIWk9yPQt+wCJ Zmbw9ADFKLVZpCsJmCDJ7M42ww== X-Received: by 2002:a62:ea09:: with SMTP id t9mr61431520pfh.228.1546762218054; Sun, 06 Jan 2019 00:10:18 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id v190sm90763364pfv.26.2019.01.06.00.10.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 06 Jan 2019 00:10:17 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Rob Herring , Mark Rutland Cc: Russell King , Ulf Hansson , Arun Kumar Neelakantam , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/7] dt-bindings: soc: qcom: Add AOSS QMP binding Date: Sun, 6 Jan 2019 00:09:09 -0800 Message-Id: <20190106080915.4493-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190106080915.4493-1-bjorn.andersson@linaro.org> References: <20190106080915.4493-1-bjorn.andersson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add binding for the QMP based side-channel communication mechanism to the AOSS, which is used to control resources not exposed through the RPMh interface. Signed-off-by: Bjorn Andersson --- Changes since v1: - Don't describe power-domain as a separate child node .../bindings/soc/qcom/qcom,aoss-qmp.txt | 57 +++++++++++++++++++ include/dt-bindings/power/qcom-aoss-qmp.h | 15 +++++ 2 files changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt create mode 100644 include/dt-bindings/power/qcom-aoss-qmp.h -- 2.18.0 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt new file mode 100644 index 000000000000..9b0d9785efe0 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt @@ -0,0 +1,57 @@ +Qualcomm Always-On Subsystem side channel binding + +This binding describes the hardware component responsible for side channel +requests to the always-on subsystem (AOSS), used for certain power management +requests that is not handled by the standard RPMh interface. Each client in the +SoC has it's own block of message RAM and IRQ for communication with the AOSS. +The protocol used to communicate in the message RAM is known as QMP. + +The AOSS side channel exposes control over a set of resources, used to control +a set of debug related clocks and to affect the low power state of resources +related to the secondary subsystems. These resources are exposed as a set of +power-domains. + +- compatible: + Usage: required + Value type: + Definition: must be "qcom,sdm845-aoss-qmp" + +- reg: + Usage: required + Value type: + Definition: the base address and size of the message RAM for this + client's communication with the AOSS + +- interrupts: + Usage: required + Value type: + Definition: should specify the AOSS message IRQ for this client + +- mboxes: + Usage: required + Value type: + Definition: reference to the mailbox representing the outgoing doorbell + in APCS for this client, as described in mailbox/mailbox.txt + +- #power-domain-cells: + Usage: optional + Value type: + Definition: must be 1 + The provided power-domains are: + QDSS clock-domain (0), CDSP state (1), LPASS state (2), + modem state (3), SLPI state (4), SPSS state (5) and Venus + state (6). + += EXAMPLE + +The following example represents the AOSS side-channel message RAM and the +mechanism exposing the power-domains, as found in SDM845. + + aoss_qmp: qmp@c300000 { + compatible = "qcom,sdm845-aoss-qmp"; + reg = <0x0c300000 0x100000>; + interrupts = ; + mboxes = <&apss_shared 0>; + + #power-domain-cells = <1>; + }; diff --git a/include/dt-bindings/power/qcom-aoss-qmp.h b/include/dt-bindings/power/qcom-aoss-qmp.h new file mode 100644 index 000000000000..7d8ac1a4f90c --- /dev/null +++ b/include/dt-bindings/power/qcom-aoss-qmp.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2018, Linaro Ltd. */ + +#ifndef __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H +#define __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H + +#define AOSS_QMP_QDSS_CLK 0 +#define AOSS_QMP_LS_CDSP 1 +#define AOSS_QMP_LS_LPASS 2 +#define AOSS_QMP_LS_MODEM 3 +#define AOSS_QMP_LS_SLPI 4 +#define AOSS_QMP_LS_SPSS 5 +#define AOSS_QMP_LS_VENUS 6 + +#endif From patchwork Sun Jan 6 08:09:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 154830 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2339742ljp; Sun, 6 Jan 2019 00:10:36 -0800 (PST) X-Google-Smtp-Source: AFSGD/XYtb4Bz3fWgXxx3vRl2zVlDynbIAGu++yMYslhQDxntCRnU50Q5z5mAb0sR6fRYCl7l4qF X-Received: by 2002:a62:f5da:: with SMTP id b87mr59646063pfm.253.1546762236325; Sun, 06 Jan 2019 00:10:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1546762236; cv=none; d=google.com; s=arc-20160816; b=Omb7QTxhXuAN4+QQSCfJAZkfZbAJBX3xA0IufPFcsVEdHB95Y/8vgASLT2dXJ/m0CE aHJJil9UVxNt6BUj7taCniEAFxvfT/naMgxnPRmFT4xwk9GN9DUoghmWlJpGZxa8kcGd 4iQtoaCw/CSTWyUKuWjuuhKbKYnTA2qjcp4ofzlP21/KeNkq1CMfgX79T9aDK5pCccz4 MBm6mpji6dMWd7CDFqm32UHA7qiJ4mJLoP+bZrpSjO7/ML9hp8S/44XxXOnAHjAReQGp OOOB+NOWIwG7y9vxndO8QjBJF3ZrcxosBxEjxQbJ1Vaerod6NcUXwyDg10ZzZdixFd8Z U9pQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=hsxzuIWHrUK2k0II5ccVYx3OoYr1DLVIOe8aiHXCb3w=; b=aIv45ZxSr6AhSxWFMxFPh1ibGzyOH+2P3b25YfG+fVtaxvmlubIwBYm/WlTszGfiVI AU5LJfvLBRGqe8rgq45D1OTNxIFkhgcUtpOtpUpgBaZ6M4rCwgb4dtp64CsO/gE8wbgX HlrAt/ADhwsuCfbEQP2am3UPOVjHjHifVt3HG8lmA+RzureUqnzZcA6Hpz8BtxEgWowD 8Cmlm8nsr2zdyCiBuY7m4psvr2cI8b+fm5Q01+Z6CakZ2X66iFwUwfAgo7HsacnbjGeC Xj6Pvh0xo1jJyUOsKJw9+TXoWykPcMsu0gxSEb6IpWzePo4kJ8nxg/+OzM0Z/RT9YDzv 4fQQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ejOuZlKW; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y20si56986712plr.106.2019.01.06.00.10.36; Sun, 06 Jan 2019 00:10:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ejOuZlKW; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726507AbfAFIKd (ORCPT + 7 others); Sun, 6 Jan 2019 03:10:33 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:33577 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726513AbfAFIK0 (ORCPT ); Sun, 6 Jan 2019 03:10:26 -0500 Received: by mail-pl1-f195.google.com with SMTP id z23so19394631plo.0 for ; Sun, 06 Jan 2019 00:10:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hsxzuIWHrUK2k0II5ccVYx3OoYr1DLVIOe8aiHXCb3w=; b=ejOuZlKWrkEn5N9R5qdhP0m5aI6EuFK6smZPfsOuZBpojX4gPq1bkBiICRzAw8wKdg +26VQF7m9/5HPSdKihwTzsBef3kjC48/DbkiOMNThABaT8nuZFROI3Uw20lEe5z6bekv MiXLEky3T8iQkKxHVoVpD6wT/vB4qDZKGdzWU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hsxzuIWHrUK2k0II5ccVYx3OoYr1DLVIOe8aiHXCb3w=; b=BDRZ3kopeRlZmoQczXFmzRYutjcftpI/ufIiF/t9geH1zk6mJV54jTKWiegoHJ+j44 yx4UiotCE2HFiQSdDHxY2fn00yFlypqOelNBouIeOnG8vhZGmI4aKJwmXwc38HrbbcnP FY0yEYajR1ycXrfHfTKA1ScTljgRW3xkp1sodA0OsKtnL254aftRhRHr1k+RooecoBU5 bcvgdnepORLkCfiWsh4x5H4DAIMbk9a+RS9D3W9vPi5lGM7uI5NZ6AGhtxIyorpH4kXm loj3TNBCayhhCFJ9YbQ1vaIc3Hz6qPGU2fa6yg6lqVOOUy84hLaFLVaJSEnpR2juKdRd 5C2A== X-Gm-Message-State: AJcUukf1FrOlKkFCFZpc1mYqeV7LUHNfUEv38F/dn2fLEvD3tWduKu0z XKM5G7i8ujhdLAQmb0GZxDsb5w== X-Received: by 2002:a17:902:27e6:: with SMTP id i35mr55926240plg.222.1546762225117; Sun, 06 Jan 2019 00:10:25 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id v190sm90763364pfv.26.2019.01.06.00.10.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 06 Jan 2019 00:10:24 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Rob Herring , Mark Rutland Cc: Russell King , Ulf Hansson , Arun Kumar Neelakantam , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [(RFC) PATCH v2 7/7] soc: qcom: aoss-qmp: Add cooling device support Date: Sun, 6 Jan 2019 00:09:15 -0800 Message-Id: <20190106080915.4493-8-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190106080915.4493-1-bjorn.andersson@linaro.org> References: <20190106080915.4493-1-bjorn.andersson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The AOSS provides three cooling devices "cx", "mx" and "ebi" that must be enabled when temperature goes below a certain level to counter low temperature issues. Probe these devices, when described in DeviceTree. Signed-off-by: Bjorn Andersson --- We do not yet have the necessary support in the thermal framework to implement the cooling device associated with the QMP, so I've just included this patch as an RFC in this series. .../bindings/soc/qcom/qcom,aoss-qmp.txt | 18 ++++++++++ drivers/soc/qcom/aoss-qmp.c | 36 +++++++++++++++++++ 2 files changed, 54 insertions(+) -- 2.18.0 diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt index 9b0d9785efe0..aae300f32421 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt @@ -42,6 +42,16 @@ power-domains. modem state (3), SLPI state (4), SPSS state (5) and Venus state (6). += SUBNODES +The AOSS side channel also provides the controls for three cooling devices, +these are expressed as subnodes of the QMP node. The name of the node is used +to identify the resource and must therefor be "cx", "mx" or "ebi". + +- #cooling-cells: + Usage: optional + Value type: + Definition: must be 2 + = EXAMPLE The following example represents the AOSS side-channel message RAM and the @@ -54,4 +64,12 @@ mechanism exposing the power-domains, as found in SDM845. mboxes = <&apss_shared 0>; #power-domain-cells = <1>; + + cx_cdev: cx { + #cooling-cells = <2>; + }; + + mx_cdev: mx { + #cooling-cells = <2>; + }; }; diff --git a/drivers/soc/qcom/aoss-qmp.c b/drivers/soc/qcom/aoss-qmp.c index de52703b96b6..6e9299e3b2bd 100644 --- a/drivers/soc/qcom/aoss-qmp.c +++ b/drivers/soc/qcom/aoss-qmp.c @@ -33,6 +33,8 @@ #define QMP_MAGIC 0x4d41494c #define QMP_VERSION 1 +#define QMP_MAX_COOLING_DEVICES 3 + /** * struct qmp - driver state for QMP implementation * @msgram: iomem referencing the message RAM used for communication @@ -44,6 +46,8 @@ * @event: wait_queue for synchronization with the IRQ * @tx_lock: provides syncrhonization between multiple callers of qmp_send() * @pd_pdev: platform device for the power-domain child device + * @cdev_pdevs: platform device for the cooling devices + * @cdev_count: number of valid @cdev_pdevs */ struct qmp { void __iomem *msgram; @@ -60,6 +64,9 @@ struct qmp { struct mutex tx_lock; struct platform_device *pd_pdev; + + struct platform_device *cdev_pdevs[QMP_MAX_COOLING_DEVICES]; + size_t cdev_count; }; static void qmp_kick(struct qmp *qmp) @@ -230,6 +237,8 @@ EXPORT_SYMBOL(qmp_send); static int qmp_probe(struct platform_device *pdev) { + struct platform_device *cdev; + struct device_node *cdev_node; struct resource *res; struct qmp *qmp; int irq; @@ -279,13 +288,40 @@ static int qmp_probe(struct platform_device *pdev) dev_err(&pdev->dev, "failed to register AOSS PD\n"); } + for_each_available_child_of_node(pdev->dev.of_node, cdev_node) { + if (!of_property_read_bool(cdev_node, "#cooling-cells")) + continue; + + /* Register cooling device, with its device_node as platform_data */ + cdev = platform_device_register_data(&pdev->dev, + "aoss_qmp_cdev", + PLATFORM_DEVID_AUTO, + of_node_get(cdev_node), + sizeof(cdev_node)); + if (IS_ERR(cdev)) { + dev_err(&pdev->dev, + "failed to register cooling device: %pOFn\n", + cdev_node); + continue; + } + + qmp->cdev_pdevs[qmp->cdev_count++] = cdev; + } + return 0; } static int qmp_remove(struct platform_device *pdev) { struct qmp *qmp = platform_get_drvdata(pdev); + struct device_node *np; + int i; + for (i = 0; i < qmp->cdev_count; i++) { + np = dev_get_platdata(&qmp->cdev_pdevs[i]->dev); + platform_device_unregister(qmp->cdev_pdevs[i]); + of_node_put(np); + } platform_device_unregister(qmp->pd_pdev); qmp_close(qmp);