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[84.72.105.84]) by smtp.gmail.com with ESMTPSA id ci18-20020a170907267200b006f3ef214e49sm1736739ejc.175.2022.05.14.06.36.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 May 2022 06:36:46 -0700 (PDT) From: Nicolas Frattaroli To: Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Nicolas Frattaroli Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 1/3] media: dt-binding: media: Add rockchip-vepu binding Date: Sat, 14 May 2022 15:36:02 +0200 Message-Id: <20220514133604.174905-2-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220514133604.174905-1-frattaroli.nicolas@gmail.com> References: <20220514133604.174905-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The RK3568 and RK3566 have a Hantro VPU node solely dedicated to encoding. This patch adds a new binding to describe it, as it does not really fit the rockchip-vpu binding, since there is no decoder. Signed-off-by: Nicolas Frattaroli --- .../bindings/media/rockchip-vepu.yaml | 64 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/rockchip-vepu.yaml diff --git a/Documentation/devicetree/bindings/media/rockchip-vepu.yaml b/Documentation/devicetree/bindings/media/rockchip-vepu.yaml new file mode 100644 index 000000000000..b7ba5bf3517a --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip-vepu.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/media/rockchip-vepu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Hantro G1 VPU encoders implemented on Rockchip SoCs + +maintainers: + - Nicolas Frattaroli + +description: + Hantro G1 video encode-only accelerators present on Rockchip SoCs. + +properties: + compatible: + enum: + - rockchip,rk3568-vepu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: aclk + - const: hclk + + power-domains: + maxItems: 1 + + iommus: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + + vepu: video-codec@fdee0000 { + compatible = "rockchip,rk3568-vepu"; + reg = <0x0 0xfdee0000 0x0 0x800>; + interrupts = ; + clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>; + clock-names = "aclk", "hclk"; + iommus = <&vepu_mmu>; + power-domains = <&power RK3568_PD_RGA>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 9ce78f2275dc..f901a42e5d0f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8637,6 +8637,7 @@ L: linux-media@vger.kernel.org L: linux-rockchip@lists.infradead.org S: Maintained F: Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml +F: Documentation/devicetree/bindings/media/rockchip-vepu.yaml F: Documentation/devicetree/bindings/media/rockchip-vpu.yaml F: drivers/staging/media/hantro/ From patchwork Sat May 14 13:36:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Frattaroli X-Patchwork-Id: 572874 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41032C433F5 for ; Sat, 14 May 2022 13:37:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232744AbiENNhM (ORCPT ); Sat, 14 May 2022 09:37:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232712AbiENNhJ (ORCPT ); Sat, 14 May 2022 09:37:09 -0400 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E006F22BDD; Sat, 14 May 2022 06:37:03 -0700 (PDT) Received: by mail-ed1-x52b.google.com with SMTP id fd25so444066edb.3; Sat, 14 May 2022 06:37:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=toXlyjRqxPOMu7FU0IW8LcSR73wz0FAFwkKHEk9OfQg=; b=mF0fvJmaxcPEJXwm3QYVF49GBdsbPWOj4de02PwDIcByndRXk4h4m06jv73pa0pSme 2N2z/KsA3+HjyKj/TcHeWYFR54jRG+Hi7JuCuU5QLpIZlXTFIMttfIl9PQ9uZUhKYmaV tVIA5a3GN0/FUA1Vj+m+mcARIuiNLdN+633pa1cT7gXQ+XYCnGwbVy1IB5yO7eaC3cvI 8pn4LKgtnupFAwjzNlYsh2u9B9A4rcjy8FuDyhfE7YjGW7xxhv0eBGyNx/oa7ACQ+HBE yDB3dTIOmazon6wB7+se0uhHtLlSzBumYL8BMnYndo89GFwO/jsmGx+Jq/Wh8fOTIpAc gdVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=toXlyjRqxPOMu7FU0IW8LcSR73wz0FAFwkKHEk9OfQg=; b=O/eb0Gp1atkITlV9zxq6209jGBJJGHh6GO0zUcitmjphM2JQcdLdZmYMkOeBj0UUB0 skGbNAKUgZ1pyITzfeQ4RdMIHelLhi57BD99QJM/GadIj3NxdvblOm6Xhs2LtmRlk7BF 7+mnZMmk+89lPpk+SGiqKtcDq2vgYClpcB+LuhKDqFgg4ihLzM+VdJXFT323xvTaeYqA fBKqJ1PHDncSjkMqpc3QH+lzgMizN3lfzosFCBTWNbnl0BL6srIfE185paXOP31XtapL a412U0/SFth3kR8oIds0UrX+sPBcIPm9+RM5M6tOoqL8gNXhVvS+16c6wZttdjFA3rZY cHaQ== X-Gm-Message-State: AOAM533+oQX7VTJmBPqMWn6vZG97ihUdbi8yuXxjWqRx93pvVKY+8RZx b+KJt6vELjQImmNT/iLkDOw= X-Google-Smtp-Source: ABdhPJwWj2/+V8JJuLG/en/GhFUmBSvLuOfOdP0FDOK6FKh3Z6r87dGQpB9uw240uYeEwToco2nhzA== X-Received: by 2002:a50:fe1a:0:b0:425:e276:5adf with SMTP id f26-20020a50fe1a000000b00425e2765adfmr3840879edt.284.1652535422140; Sat, 14 May 2022 06:37:02 -0700 (PDT) Received: from localhost.localdomain (84-72-105-84.dclient.hispeed.ch. [84.72.105.84]) by smtp.gmail.com with ESMTPSA id ci18-20020a170907267200b006f3ef214e49sm1736739ejc.175.2022.05.14.06.37.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 May 2022 06:37:01 -0700 (PDT) From: Nicolas Frattaroli To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: Nicolas Frattaroli , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 3/3] arm64: dts: rockchip: Add Hantro encoder node to rk356x Date: Sat, 14 May 2022 15:36:04 +0200 Message-Id: <20220514133604.174905-4-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220514133604.174905-1-frattaroli.nicolas@gmail.com> References: <20220514133604.174905-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The RK3566 and RK3568 come with a dedicated Hantro instance solely for encoding. This patch adds a node for this to the device tree, along with a node for its MMU. Signed-off-by: Nicolas Frattaroli --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 1042e68602de..9b4bed7a8a44 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -569,6 +569,26 @@ gpu: gpu@fde60000 { status = "disabled"; }; + vepu: video-codec@fdee0000 { + compatible = "rockchip,rk3568-vepu"; + reg = <0x0 0xfdee0000 0x0 0x800>; + interrupts = ; + clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>; + clock-names = "aclk", "hclk"; + iommus = <&vepu_mmu>; + power-domains = <&power RK3568_PD_RGA>; + }; + + vepu_mmu: iommu@fdee0800 { + compatible = "rockchip,rk3568-iommu"; + reg = <0x0 0xfdee0800 0x0 0x40>; + interrupts = ; + clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3568_PD_RGA>; + #iommu-cells = <0>; + }; + sdmmc2: mmc@fe000000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe000000 0x0 0x4000>;