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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:28 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 01/13] dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp Date: Wed, 4 May 2022 15:19:11 +0200 Message-Id: <20220504131923.214367-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add compatible for qcom,sm8450-aoss-qmp with qcom,aoss-qmp as a fallback. This fixes dtbs_check warnings like: sm8450-hdk.dtb: power-controller@c300000: compatible:0: 'qcom,sm8450-aoss-qmp' is not one of ['qcom,sc7180-aoss-qmp', 'qcom,sc7280-aoss-qmp', 'qcom,sc8180x-aoss-qmp', 'qcom,sdm845-aoss-qmp', 'qcom,sm6350-aoss-qmp', 'qcom,sm8150-aoss-qmp', 'qcom,sm8250-aoss-qmp', 'qcom,sm8350-aoss-qmp'] Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml index e2e173dfada7..d01e98768153 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml @@ -33,6 +33,7 @@ properties: - qcom,sm8150-aoss-qmp - qcom,sm8250-aoss-qmp - qcom,sm8350-aoss-qmp + - qcom,sm8450-aoss-qmp - const: qcom,aoss-qmp reg: From patchwork Wed May 4 13:19:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 569320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49E37C433F5 for ; Wed, 4 May 2022 13:20:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350476AbiEDNXg (ORCPT ); Wed, 4 May 2022 09:23:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350395AbiEDNXJ (ORCPT ); Wed, 4 May 2022 09:23:09 -0400 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [IPv6:2a00:1450:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54E823B549 for ; Wed, 4 May 2022 06:19:32 -0700 (PDT) Received: by mail-ej1-x631.google.com with SMTP id kq17so2851318ejb.4 for ; Wed, 04 May 2022 06:19:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wtiS0vwUpWebphFXLVeTyRDTHsS+dMpyDeFB5sbVoPk=; b=WMcDqMBOQTWHQiHzKnK155CAcLbJFQiywJq2+OHBtLh2wtbdrvfmT+eVf/1qGi+8Gs VUocQGWrCexi0Npuo1PUCo1ievCEkGHVXhL79bjHLJ4Q9hp8ygEBznhKNqJbHdBeSAJ3 boomwuB+OytFwgC3kGjWxyI3QKAJtNGcf9hYk2JqJLRvDj6bUMBBNV0VdNmI0r4WL5yf dL6OmTB/xuss+0C9ohEnqyT9FwMIy1vdU0SDxKK7iCawXoOVTmrP78pzdiutyXdmJDay TZ36Wix0WF1YbdqnBg5mmYnCBlifObmjldYNTL1EqN7lBNlMl1JYnM74RKnwmTpLmuFC 56+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wtiS0vwUpWebphFXLVeTyRDTHsS+dMpyDeFB5sbVoPk=; b=puZylBusTsPkwlzn+gg1GLcZiWG7tK1uOTTVOUdKKLpgGBFp5cVJGwFpu4IlgDfyXl RfZcsstNU4hMEExE0bv90s2ZYAElov19hYGNg87R77FDQbmpjgT/ZT+mYvW3wDgc2FVz SeKJ7bOIdqx9mf891hgB2sOZzNjso3aaxrWH8zI27v/ex97McVZNfEg+/c9QNBChepNW Y8Ugk0c/Y8foZPvy0ouSzqEIt507gThXCJ4ww7+JI1Ee/sVRYe1D3WEmOMp2wEB9/XOz /S0JkW3PFE+Bi6pe6ZF3LK96fbZj8BwdCfIlMxV+ITr6dXg0cx6A3e9B1qXy/ialsmX7 1gsg== X-Gm-Message-State: AOAM532uIuakJsemR4ucdsuYVldzr4CGyxdhX+lJOWDyqE49fSw+/DY+ hmDRJTY9J/mt1KIDfbc7ya/xSw== X-Google-Smtp-Source: ABdhPJxpiNIp7y7Iq7FQeCbjSAWRjH6/GJCoUIDnG3RWGsD6Fl//cWVMX2EAziFaYhRTq1UePB4XLg== X-Received: by 2002:a17:906:9749:b0:6ef:bc52:1f94 with SMTP id o9-20020a170906974900b006efbc521f94mr19947138ejy.666.1651670370844; Wed, 04 May 2022 06:19:30 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:30 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 03/13] dt-bindings: usb: qcom,dwc3: add IPQ8074, MSM8994, QCS404 and SM6125 Date: Wed, 4 May 2022 15:19:13 +0200 Message-Id: <20220504131923.214367-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add compatibles for dedicated USB DWC3 blocks on Qualcomm IPQ8074, MSM8994, QCS404 and SM6125. They differ against other variants in clock and/or interrupts. Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index ce252db2aab3..03f93f25cba4 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -16,9 +16,12 @@ properties: - qcom,ipq4019-dwc3 - qcom,ipq6018-dwc3 - qcom,ipq8064-dwc3 + - qcom,ipq8074-dwc3 - qcom,msm8953-dwc3 + - qcom,msm8994-dwc3 - qcom,msm8996-dwc3 - qcom,msm8998-dwc3 + - qcom,qcs404-dwc3 - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 - qcom,sdm660-dwc3 @@ -26,6 +29,7 @@ properties: - qcom,sdx55-dwc3 - qcom,sm4250-dwc3 - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 - qcom,sm6350-dwc3 - qcom,sm8150-dwc3 - qcom,sm8250-dwc3 From patchwork Wed May 4 13:19:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 569319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58D42C433FE for ; Wed, 4 May 2022 13:20:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350518AbiEDNXh (ORCPT ); Wed, 4 May 2022 09:23:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350399AbiEDNXL (ORCPT ); Wed, 4 May 2022 09:23:11 -0400 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F9603D4BD for ; Wed, 4 May 2022 06:19:33 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id n10so2840748ejk.5 for ; Wed, 04 May 2022 06:19:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=geJ1oCMfHvrwrPUcn2CBZQZQvkPEsJJFNL12XqUDXCM=; b=eXCGt2ajshLobHOIJRX+d5yT3wL9OfZmJInYcSe/ETxQ72pQJIFe62eQYgmFP1pPPJ kw8FYnmaF3rxOURKKA5S6VccS8E75IY1RlhJFP2oNZdXW1wP4RBFEHs6XilEinPW6vrj Isc5hh11tqC1fdg1dc0MFa+ynH1gH0R//ndqg72N390E1LRiLtRwgk/EeW3psHNxc7du SkwoD4sQ6Fgwv2wkNc6Xqd5moC3kSbCRMVEDmZWulqR+nCAAeae8kel9LtInwG32vPDE /TIRLmnOfb7bc9M1ARp0XWGsPNH7DB20OxcANoK8jqJVhvVM/a6UYme2PxNOZRjwWP0+ K3ZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=geJ1oCMfHvrwrPUcn2CBZQZQvkPEsJJFNL12XqUDXCM=; b=tKH3uPiqpW0Nxtg+e58mZ3oN101quQVeE1d6ipGD+W5X8h3K3CD8Om8+UZWnKRos0c PrV7XzfpgctdTFFmq2W935J+ZvdGNSITDhYoVWnxikdnjOZkw8sC11wFUFtD6WQcT1BL TzRufckFRPrxw4Vr8KkHqCSWPKDSZDTaNZIaxbCmojj0wLfoEfpLkomQOADgS356rRTV tUzBF4mzKVaYxKG8jpJGCceDSgPAiB1Ojo1gOjaYQF+3Xu+Zz9Ht6dXnpRLZT6qPGi7W 1y47oJIoy8mI28lc7Gseoz4x0LAZWTKNuYdNHlfWAs+KoCBWCL72rbTBvd2dx90avN/z 7fGQ== X-Gm-Message-State: AOAM531tOVKRvN4GfmtAYkiLU4vbFbs4FXrnUkJM2gVtGbTL2ZEVXTg2 bR3K+y4gFAyC6cZKKIiyx3B2nQ== X-Google-Smtp-Source: ABdhPJyfY9xuMVGc8LsmWl5zLun+0BP87d5iqcnXk5tyahzJRG6mgYGf6XihuoXxleN8KGqlPLo2LA== X-Received: by 2002:a17:907:8a06:b0:6f4:922b:4b91 with SMTP id sc6-20020a1709078a0600b006f4922b4b91mr7152726ejc.670.1651670372039; Wed, 04 May 2022 06:19:32 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:31 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 04/13] dt-bindings: usb: qcom,dwc3: fix clock matching Date: Wed, 4 May 2022 15:19:14 +0200 Message-Id: <20220504131923.214367-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The bindings defined strict clocks but several variants do not use them in such order. Split the clocks and clock-names per variants to match current DTS usage. In few cases this might not be complete match, due to incomplete DTS. Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/usb/qcom,dwc3.yaml | 222 ++++++++++++++++-- 1 file changed, 200 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 03f93f25cba4..5047ca31657c 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -54,26 +54,22 @@ properties: maxItems: 1 clocks: - description: - A list of phandle and clock-specifier pairs for the clocks - listed in clock-names. - items: - - description: System Config NOC clock. - - description: Master/Core clock, has to be >= 125 MHz - for SS operation and >= 60MHz for HS operation. - - description: System bus AXI clock. - - description: Mock utmi clock needed for ITP/SOF generation - in host mode. Its frequency should be 19.2MHz. - - description: Sleep clock, used for wakeup when - USB3 core goes into low power mode (U3). + description: | + Several clocks are used, depending on the variant. Typical ones are:: + - cfg_noc:: System Config NOC clock. + - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >= + 60MHz for HS operation. + - iface:: System bus AXI clock. + - sleep:: Sleep clock, used for wakeup when USB3 core goes into low + power mode (U3). + - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host + mode. Its frequency should be 19.2MHz. + minItems: 1 + maxItems: 6 clock-names: - items: - - const: cfg_noc - - const: core - - const: iface - - const: mock_utmi - - const: sleep + minItems: 1 + maxItems: 6 assigned-clocks: items: @@ -136,6 +132,185 @@ required: - interrupts - interrupt-names +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq4019-dwc3 + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8064-dwc3 + then: + properties: + clocks: + items: + - description: Master/Core clock, has to be >= 125 MHz + for SS operation and >= 60MHz for HS operation. + clock-names: + items: + - const: core + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8953-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sm6350-dwc3 + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-dwc3 + then: + properties: + clocks: + minItems: 3 + maxItems: 4 + clock-names: + oneOf: + - items: + - const: core + - const: sleep + - const: mock_utmi + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8074-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8994-dwc3 + - qcom,qcs404-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm660-dwc3 + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: bus + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm6125-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8450-dwc3 + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8350-dwc3 + then: + properties: + clocks: + minItems: 5 + maxItems: 6 + clock-names: + minItems: 5 + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + additionalProperties: false examples: @@ -157,10 +332,13 @@ examples: clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; From patchwork Wed May 4 13:19:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 569318 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD0E8C4332F for ; Wed, 4 May 2022 13:20:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240603AbiEDNXl (ORCPT ); Wed, 4 May 2022 09:23:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34012 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350391AbiEDNXf (ORCPT ); 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:33 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 06/13] arm64: dts: qcom: correct DWC3 node names and unit addresses Date: Wed, 4 May 2022 15:19:16 +0200 Message-Id: <20220504131923.214367-7-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Align DWC3 USB node names with DT schema ("usb" is expected) and correct the unit addresses to match the "reg" property. This also implies overriding nodes by label, instead of full path. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 18 ++++++++--------- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++-- .../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 20 +++++++++---------- arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 7 ++++--- arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- 11 files changed, 37 insertions(+), 36 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts b/arch/arm64/boot/dts/qcom/apq8096-db820c.dts index 56e54ce4d10e..49afbb1a066a 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dts @@ -1052,22 +1052,22 @@ &ufshc { &usb2 { status = "okay"; extcon = <&usb2_id>; +}; - dwc3@7600000 { - extcon = <&usb2_id>; - dr_mode = "otg"; - maximum-speed = "high-speed"; - }; +&usb2_dwc3 { + extcon = <&usb2_id>; + dr_mode = "otg"; + maximum-speed = "high-speed"; }; &usb3 { status = "okay"; extcon = <&usb3_id>; +}; - dwc3@6a00000 { - extcon = <&usb3_id>; - dr_mode = "otg"; - }; +&usb3_dwc3 { + extcon = <&usb3_id>; + dr_mode = "otg"; }; &usb3phy { diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index a4d363c187fc..835de9834833 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -653,7 +653,7 @@ qusb_phy_1: qusb@59000 { status = "disabled"; }; - usb2: usb2@7000000 { + usb2: usb@70f8800 { compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; reg = <0x0 0x070F8800 0x0 0x400>; #address-cells = <2>; @@ -730,7 +730,7 @@ qusb_phy_0: qusb@79000 { status = "disabled"; }; - usb3: usb3@8A00000 { + usb3: usb@8af8800 { compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; reg = <0x0 0x8AF8800 0x0 0x400>; #address-cells = <2>; @@ -756,7 +756,7 @@ usb3: usb3@8A00000 { resets = <&gcc GCC_USB0_BCR>; status = "disabled"; - dwc_0: usb@8A00000 { + dwc_0: usb@8a00000 { compatible = "snps,dwc3"; reg = <0x0 0x8A00000 0x0 0xcd00>; interrupts = ; diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 943243d5515b..519938530c35 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -578,7 +578,7 @@ usb_0: usb@8af8800 { resets = <&gcc GCC_USB0_BCR>; status = "disabled"; - dwc_0: dwc3@8a00000 { + dwc_0: usb@8a00000 { compatible = "snps,dwc3"; reg = <0x8a00000 0xcd00>; interrupts = ; @@ -618,7 +618,7 @@ usb_1: usb@8cf8800 { resets = <&gcc GCC_USB1_BCR>; status = "disabled"; - dwc_1: dwc3@8c00000 { + dwc_1: usb@8c00000 { compatible = "snps,dwc3"; reg = <0x8c00000 0xcd00>; interrupts = ; diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi index be4f643b1fd1..a7090befc16f 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi @@ -308,19 +308,19 @@ &usb3 { extcon = <&typec>; qcom,select-utmi-as-pipe-clk; +}; - dwc3@6a00000 { - extcon = <&typec>; +&usb3_dwc3 { + extcon = <&typec>; - /* usb3-phy is not used on this device */ - phys = <&hsusb_phy1>; - phy-names = "usb2-phy"; + /* usb3-phy is not used on this device */ + phys = <&hsusb_phy1>; + phy-names = "usb2-phy"; - maximum-speed = "high-speed"; - snps,is-utmi-l1-suspend; - snps,usb2-gadget-lpm-disable; - snps,hird-threshold = /bits/ 8 <0>; - }; + maximum-speed = "high-speed"; + snps,is-utmi-l1-suspend; + snps,usb2-gadget-lpm-disable; + snps,hird-threshold = /bits/ 8 <0>; }; &hsusb_phy1 { diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 205af7b479a8..fc2e026d4c07 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2731,7 +2731,7 @@ usb3: usb@6af8800 { power-domains = <&gcc USB30_GDSC>; status = "disabled"; - usb3_dwc3: dwc3@6a00000 { + usb3_dwc3: usb@6a00000 { compatible = "snps,dwc3"; reg = <0x06a00000 0xcc00>; interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>; @@ -3059,7 +3059,7 @@ usb2: usb@76f8800 { qcom,select-utmi-as-pipe-clk; status = "disabled"; - dwc3@7600000 { + usb2_dwc3: usb@7600000 { compatible = "snps,dwc3"; reg = <0x07600000 0xcc00>; interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 4a84de6cee1e..0200d532b531 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2040,7 +2040,7 @@ usb3: usb@a8f8800 { resets = <&gcc GCC_USB_30_BCR>; - usb3_dwc3: dwc3@a800000 { + usb3_dwc3: usb@a800000 { compatible = "snps,dwc3"; reg = <0x0a800000 0xcd00>; interrupts = ; diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index a80c578484ba..2f3104a84417 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -337,9 +337,10 @@ &usb2_phy_sec { &usb3 { status = "okay"; - dwc3@7580000 { - dr_mode = "host"; - }; +}; + +&usb3_dwc3 { + dr_mode = "host"; }; &usb2_phy_prim { diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index bc446c6002d0..568821259f11 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -544,7 +544,7 @@ usb3: usb@7678800 { assigned-clock-rates = <19200000>, <200000000>; status = "disabled"; - dwc3@7580000 { + usb3_dwc3: usb@7580000 { compatible = "snps,dwc3"; reg = <0x07580000 0xcd00>; interrupts = ; @@ -573,7 +573,7 @@ usb2: usb@79b8800 { assigned-clock-rates = <19200000>, <133333333>; status = "disabled"; - dwc3@78c0000 { + usb@78c0000 { compatible = "snps,dwc3"; reg = <0x078c0000 0xcc00>; interrupts = ; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 925340fbbb59..e9f834361660 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2786,7 +2786,7 @@ usb_1: usb@a6f8800 { <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3 0>; interconnect-names = "usb-ddr", "apps-usb"; - usb_1_dwc3: dwc3@a600000 { + usb_1_dwc3: usb@a600000 { compatible = "snps,dwc3"; reg = <0 0x0a600000 0 0xe000>; interrupts = ; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 692cf4be4eef..6af80a627c3a 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3868,7 +3868,7 @@ usb_1: usb@a6f8800 { <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>; interconnect-names = "usb-ddr", "apps-usb"; - usb_1_dwc3: dwc3@a600000 { + usb_1_dwc3: usb@a600000 { compatible = "snps,dwc3"; reg = <0 0x0a600000 0 0xcd00>; interrupts = ; @@ -3916,7 +3916,7 @@ usb_2: usb@a8f8800 { <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>; interconnect-names = "usb-ddr", "apps-usb"; - usb_2_dwc3: dwc3@a800000 { + usb_2_dwc3: usb@a800000 { compatible = "snps,dwc3"; reg = <0 0x0a800000 0 0xcd00>; interrupts = ; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 90a4c09e67f1..a57a13486c6c 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3635,7 +3635,7 @@ usb_1: usb@a6f8800 { resets = <&gcc GCC_USB30_PRIM_BCR>; - usb_1_dwc3: dwc3@a600000 { + usb_1_dwc3: usb@a600000 { compatible = "snps,dwc3"; reg = <0 0x0a600000 0 0xcd00>; interrupts = ; From patchwork Wed May 4 13:19:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 569315 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8095C43217 for ; Wed, 4 May 2022 13:22:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344472AbiEDNZk (ORCPT ); Wed, 4 May 2022 09:25:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350481AbiEDNXg (ORCPT ); Wed, 4 May 2022 09:23:36 -0400 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0EB0440914 for ; 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Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index e81b2a7794fb..50def880bc87 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -481,7 +481,7 @@ sdhc_2: sdhci@4784000 { }; usb3: usb@4ef8800 { - compatible = "qcom,msm8996-dwc3", "qcom,dwc3"; + compatible = "qcom,sm6125-dwc3", "qcom,dwc3"; reg = <0x04ef8800 0x400>; #address-cells = <1>; #size-cells = <1>; From patchwork Wed May 4 13:19:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 569316 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4C47C4332F for ; Wed, 4 May 2022 13:20:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350503AbiEDNYc (ORCPT ); Wed, 4 May 2022 09:24:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350500AbiEDNXg (ORCPT ); Wed, 4 May 2022 09:23:36 -0400 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2583C40A1E for ; Wed, 4 May 2022 06:19:39 -0700 (PDT) Received: by mail-ej1-x62f.google.com with SMTP id i19so2819283eja.11 for ; Wed, 04 May 2022 06:19:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EHKSy8u2AYcSiYwpKMBhG78dGQ0CWmrQswGZWwNmBSE=; b=AII7DZs1qL3ytQ0tKTDDsyRtxKmN7Vo5x4CZZkN5bfopoIpwxt4ZBX8ZdS8qicRwr5 dl38rxdZ2WrTVq2Fn32nD7DNHY1pz+0yzJ0lADSWpQQJk+T0R/XgIDyASA6pNhx4FtRN 56bMwDlYZf8YkIzocvlX5A14yQX3kYHlMI7zJGpgzx4RU7IJX8UfOnfZjNMwKlolphMz ikLzjP8utgr8hR6rkDXick46xNEXnvNLrkE2p6lCeldmp45ahO7+5VLu1UvMckqQpMeh GmyLPKZ4ST+aaM8t4uBYc6KMkJZrorPI5QTCIsg6P1RhMkv7TR06OTlN++DuKr+b3siK RhoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EHKSy8u2AYcSiYwpKMBhG78dGQ0CWmrQswGZWwNmBSE=; b=n4POpI6DSD3v9SFoNdPk2aBPd4pjZa/pDFsR0vdNO+qBLdwxrT2RNrq2LKsQULH+Xk rokoqLL7mQ02RNgWrn4VPD18DsTFLmugJmLa9BtoYRZMZJitx5nES1JSHschZ+Z3G/17 h/mbrO+sd8jivpONPb66KuplLQMVn62Mu9DAudQDk5eTPVdovkG1QlibCOy4RxmDVXhT K6qNi5Ekei7vFCntCVSPnbrQ+j2mgbw2Z6byGTx1UvzLzpXF7jRtm8dw872loWx6hdzj iu4faPORmTnHV0Prg0IFqcq+5E1EBUpdaenE7DjOBQusz9h3Nu9ZKfIT+L9ed2NGuWh3 mITQ== X-Gm-Message-State: AOAM532dh0gwRe7+70kySrspfbpJq5R+Ii41f0hIrocIl2QmudXe8A+8 Qoh3ubIbUA83oRuxe6u9kjut1A== X-Google-Smtp-Source: ABdhPJwpnIZFtYA5xNncFRACp4CyShNQZR9ctDuVvi8Lr3eLD0PfhzP7p/JpHNg8QjkqPiUTvEwUhQ== X-Received: by 2002:a17:907:7b92:b0:6db:71f1:fc20 with SMTP id ne18-20020a1709077b9200b006db71f1fc20mr19139977ejc.343.1651670378673; Wed, 04 May 2022 06:19:38 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:38 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 10/13] arm64: dts: qcom: qcs404: add dedicated qcom,qcs404-dwc3 compatible Date: Wed, 4 May 2022 15:19:20 +0200 Message-Id: <20220504131923.214367-11-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 568821259f11..d912166b7552 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -529,7 +529,7 @@ glink-edge { }; usb3: usb@7678800 { - compatible = "qcom,dwc3"; + compatible = "qcom,qcs404-dwc3", "qcom,dwc3"; reg = <0x07678800 0x400>; #address-cells = <1>; #size-cells = <1>; @@ -558,7 +558,7 @@ usb3_dwc3: usb@7580000 { }; usb2: usb@79b8800 { - compatible = "qcom,dwc3"; + compatible = "qcom,qcs404-dwc3", "qcom,dwc3"; reg = <0x079b8800 0x400>; #address-cells = <1>; #size-cells = <1>; From patchwork Wed May 4 13:19:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 569317 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB195C433F5 for ; Wed, 4 May 2022 13:20:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350497AbiEDNY2 (ORCPT ); Wed, 4 May 2022 09:24:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34842 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350464AbiEDNXi (ORCPT ); Wed, 4 May 2022 09:23:38 -0400 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C8F040E57 for ; Wed, 4 May 2022 06:19:41 -0700 (PDT) Received: by mail-ej1-x62d.google.com with SMTP id g6so2871887ejw.1 for ; Wed, 04 May 2022 06:19:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PtRXlZ6cLHKAcMNy9RZzniYXCerLrLi7gRFRODKYeuA=; b=h0cUVB+2J6EsRUSAXbsvlZuCkuOVTrnIIjx59jxQC4m5XPywkDcVaRvJ1AwCxc844H mOZVxSPwiq6xFpP6cAezHduw9kPbPiwkmnOQ0Ed7SkctRf9T/Ra4KoC0hg6T2TBUpiGe RtuDtXLg/hELtmUp0G0stcdgv7wokCLVRUqcbDvnABtUblZCiSR3tIaVtrfJxRYrzWDz D6W5KhcmCBc0erBTZ8Kp+QORfVWNkh+aME4X/WGL9JTAdYCj4V79FsLOvOSrm1GUTYZE 475MO7zXv7tLq84eZs6YW+cfVK2LSn9XQR3KX0JG7DdE7MErotJF+K2zM/rwjZG+842S 5s7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PtRXlZ6cLHKAcMNy9RZzniYXCerLrLi7gRFRODKYeuA=; b=MCnYC/RwiNK0LOOaWY0Q7JuDUVKoNtRhl/QBBW/AqF+mI3a9PQzc7J8w7pdUlABqeG sCM/OSKppiPB9IBLrYntWCmRjsYqDIrQn83WcNifIC1BpPg9SOjId4vspXIoDVEwAU1+ oXZjrBFfQf2pkDCrbuaPgg8FNQ5n2rDAiUcUraYLOCTrZz4dToF1UjqJkKmN7Uj/Sgah A0PSUVsjpEimqtaaKUXbNkfrY5hFUHx/ixhqJfvPlORIbm1BEbiXys46v5T1gzY4M630 x9sRcoOLxeLcIdkplpMg77FvCSvgRbBsbyR1o+2GYupEf/30J5jHzlHIwW0CePRWKDSh aZHg== X-Gm-Message-State: AOAM530c488Bi8kezeSGQC82+aMDHy9pwg5+lCf6Y+/E+RiPEiipodm0 vf1ETNK17CnzUbW+lrKldzHkwA== X-Google-Smtp-Source: ABdhPJyQDf58gvAOiIvCu1q0/QJwYa1lbyJA7AR6+c/S6wUKcF13UysUQFWbRgiJQ6paalLOpLihzA== X-Received: by 2002:a17:907:8a0b:b0:6f4:4899:db98 with SMTP id sc11-20020a1709078a0b00b006f44899db98mr14039008ejc.622.1651670380906; Wed, 04 May 2022 06:19:40 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:40 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 12/13] arm64: dts: qcom: align DWC3 USB clocks with DT schema Date: Wed, 4 May 2022 15:19:22 +0200 Message-Id: <20220504131923.214367-13-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Align order of clocks and their names with Qualcomm DWC3 USB DT schema. No functional impact expected. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- arch/arm/boot/dts/qcom-sdx55.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++++---- arch/arm64/boot/dts/qcom/msm8953.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/msm8994.dtsi | 5 ++++- arch/arm64/boot/dts/qcom/msm8996.dtsi | 14 +++++++++----- arch/arm64/boot/dts/qcom/msm8998.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/sc7180.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/sc7280.dtsi | 22 ++++++++++++++-------- arch/arm64/boot/dts/qcom/sdm630.dtsi | 12 ++++++++---- arch/arm64/boot/dts/qcom/sdm845.dtsi | 22 ++++++++++++++-------- arch/arm64/boot/dts/qcom/sm6125.dtsi | 14 ++++++++++---- arch/arm64/boot/dts/qcom/sm6350.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/sm8150.dtsi | 20 ++++++++++++++------ arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++++++++++------ arch/arm64/boot/dts/qcom/sm8350.dtsi | 21 ++++++++++++++------- arch/arm64/boot/dts/qcom/sm8450.dtsi | 10 +++++++--- 18 files changed, 151 insertions(+), 80 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index 9d5e934f2272..c5da723f7674 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -646,7 +646,7 @@ usb3: usb3@8af8800 { clocks = <&gcc GCC_USB3_MASTER_CLK>, <&gcc GCC_USB3_SLEEP_CLK>, <&gcc GCC_USB3_MOCK_UTMI_CLK>; - clock-names = "master", "sleep", "mock_utmi"; + clock-names = "core", "sleep", "mock_utmi"; ranges; status = "disabled"; diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 4d45be049613..089033299fa2 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -490,10 +490,13 @@ usb: usb@a6f8800 { clocks = <&gcc GCC_USB30_SLV_AHB_CLK>, <&gcc GCC_USB30_MASTER_CLK>, <&gcc GCC_USB30_MSTR_AXI_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 835de9834833..c89499e366d3 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -662,7 +662,7 @@ usb2: usb@70f8800 { clocks = <&gcc GCC_USB1_MASTER_CLK>, <&gcc GCC_USB1_SLEEP_CLK>, <&gcc GCC_USB1_MOCK_UTMI_CLK>; - clock-names = "master", + clock-names = "core", "sleep", "mock_utmi"; @@ -741,8 +741,8 @@ usb3: usb@8af8800 { <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_USB0_SLEEP_CLK>, <&gcc GCC_USB0_MOCK_UTMI_CLK>; - clock-names = "sys_noc_axi", - "master", + clock-names = "cfg_noc", + "core", "sleep", "mock_utmi"; diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 253fde08db44..4c38b15c6fd4 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -563,8 +563,8 @@ usb_0: usb@8af8800 { <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_USB0_SLEEP_CLK>, <&gcc GCC_USB0_MOCK_UTMI_CLK>; - clock-names = "sys_noc_axi", - "master", + clock-names = "cfg_noc", + "core", "sleep", "mock_utmi"; @@ -603,8 +603,8 @@ usb_1: usb@8cf8800 { <&gcc GCC_USB1_MASTER_CLK>, <&gcc GCC_USB1_SLEEP_CLK>, <&gcc GCC_USB1_MOCK_UTMI_CLK>; - clock-names = "sys_noc_axi", - "master", + clock-names = "cfg_noc", + "core", "sleep", "mock_utmi"; diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 49903a6e9dfd..ffc3ec2cd3bc 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -759,10 +759,13 @@ usb3: usb@70f8800 { clocks = <&gcc GCC_USB_PHY_CFG_AHB_CLK>, <&gcc GCC_USB30_MASTER_CLK>, <&gcc GCC_PCNOC_USB3_AXI_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", - "mock_utmi", "sleep"; + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 10c1cce74dad..0318d42c5736 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -438,7 +438,10 @@ usb3: usb@f92f8800 { <&gcc GCC_SYS_NOC_USB3_AXI_CLK>, <&gcc GCC_USB30_SLEEP_CLK>, <&gcc GCC_USB30_MOCK_UTMI_CLK>; - clock-names = "core", "iface", "sleep", "mock_utmi", "ref", "xo"; + clock-names = "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index b717c01d87e8..9932186f7ceb 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2718,11 +2718,15 @@ usb3: usb@6af8800 { interrupt-names = "hs_phy_irq", "ss_phy_irq"; clocks = <&gcc GCC_SYS_NOC_USB3_AXI_CLK>, - <&gcc GCC_USB30_MASTER_CLK>, - <&gcc GCC_AGGRE2_USB3_AXI_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>, - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>; + <&gcc GCC_USB30_MASTER_CLK>, + <&gcc GCC_AGGRE2_USB3_AXI_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 0200d532b531..758c45bbbe78 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2023,10 +2023,13 @@ usb3: usb@a8f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_AXI_CLK>, <&gcc GCC_USB30_MASTER_CLK>, <&gcc GCC_AGGRE1_USB3_AXI_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index e9f834361660..bedb4991cc5c 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2762,10 +2762,13 @@ usb_1: usb@a6f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index e2857d3393ef..5d51b6ce45ef 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3069,10 +3069,13 @@ usb_2: usb@8cf8800 { clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SEC_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface","mock_utmi", - "sleep"; + <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>; @@ -3249,10 +3252,13 @@ usb_1: usb@a6f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 7f875bf9390a..b72e8e6c52f3 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1215,11 +1215,15 @@ usb3: usb@a8f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_AXI_CLK>, <&gcc GCC_USB30_MASTER_CLK>, <&gcc GCC_AGGRE2_USB3_AXI_CLK>, - <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>, <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "bus", - "mock_utmi", "sleep"; + <&rpmcc RPM_SMD_AGGR2_NOC_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "bus"; assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>, diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 6af80a627c3a..0692ae0e60a4 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3844,10 +3844,13 @@ usb_1: usb@a6f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; @@ -3892,10 +3895,13 @@ usb_2: usb@a8f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SEC_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index 50def880bc87..135e6e0da27a 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -487,12 +487,18 @@ usb3: usb@4ef8800 { #size-cells = <1>; ranges; - clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>, + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>, - <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB3_PRIM_CLKREF_CLK>, <&gcc GCC_USB30_PRIM_SLEEP_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB3_PRIM_CLKREF_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index fb1a0f662575..d4f8f33f3f0c 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1034,10 +1034,13 @@ usb_1: usb@a6f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, <&pdc 17 IRQ_TYPE_LEVEL_HIGH>, diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index a57a13486c6c..47700697c5ef 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3614,11 +3614,15 @@ usb_1: usb@a6f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB3_SEC_CLKREF_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; @@ -3659,11 +3663,15 @@ usb_2: usb@a8f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB3_SEC_CLKREF_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 881550cf7557..c8962acfddbe 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2995,11 +2995,15 @@ usb_1: usb@a6f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB3_SEC_CLKREF_EN>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; @@ -3046,11 +3050,15 @@ usb_2: usb@a8f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB3_SEC_CLKREF_EN>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index e1eba30dc7ad..dd32b227df49 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2449,10 +2449,13 @@ usb_1: usb@a6f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; @@ -2492,11 +2495,15 @@ usb_2: usb@a8f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB3_SEC_CLKREF_EN>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 7f52c3cfdfb7..e8c19b37ca0e 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3107,11 +3107,15 @@ usb_1: usb@a6f8800 { clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB3_0_CLKREF_EN>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>;