From patchwork Tue May 3 22:09:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 569095 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0530C433FE for ; Tue, 3 May 2022 22:09:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243515AbiECWNF (ORCPT ); Tue, 3 May 2022 18:13:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233631AbiECWNE (ORCPT ); Tue, 3 May 2022 18:13:04 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EEB7341F99 for ; Tue, 3 May 2022 15:09:30 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id j4so32548263lfh.8 for ; Tue, 03 May 2022 15:09:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8d3RGh9WkfDhENWItVe4+i9I4wBo7gJQ8zcDZXErACs=; b=fp9e8vWtPhWYoJSMyWyhSYZFwQcE5G0BmzwKfQnXa3IizGILaodCM2kCrCDAQOU5N8 J4PAqS6z0fzd1pOmDvu7qnorwqUC4RcGuSBHtiniS1RkbAyyMQPdsx3zO3ymZyy70QxR VOxVCyB/iB600VFPzVS/3E2JtH4IWnSnlZJTQEuAubbB9Zvcad7bSnqZziAY+Cq+w9b3 QMXOEwhkvQdlgSe9J0pfqokcRmmBieMXjVyE2KAm+4qNEUbIEm1/QSw4yOVBKhnAAxvA XjmI1Y971C5VPwk1MGN99KoG6zF3SDzMAWLLnT2QQeTGh3QUmphtw2Iygq2Lb6iXLGCp n3iQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8d3RGh9WkfDhENWItVe4+i9I4wBo7gJQ8zcDZXErACs=; b=7dteacClX4Rf0iLwVBT6iBbXDCYizggc/cya7orCl0ExV9vKvPWX6G9AYygerL3YyL WlkEiiUp1Dwx20CSp5sxRjd/1RhaN2KebxEDDHgs7XOIX9cvwI1peZH1MhP3t9xOSioP W5T5MBZGs4QA5Q7prxzaItZAoXjFAbbN2KMK9nXwtRsr6cmjLgQZMipZBxRWNoms7+Ux PR0HQeqKGNAY3AJwjYr+VFvvoAHgcvApn/Vx/EkUgmF46WXbsdiClIHOVLVCMnCzM23T XjuLW1eVTrdRYUkguh4wwYOW2vYCVPLbhVZvHSbgwiG7FGlNujOWeaJueSEK+BIYAWFa JELw== X-Gm-Message-State: AOAM530vAFBoxiM5sq/6dLRoEmveuaOHyil29LmVmGCUVEpEU8t19AZI 0ESyEh6/rj+CPIfaPzAsz6Xa+Q== X-Google-Smtp-Source: ABdhPJwDI76iB5KpVm2ek7OwtcHAL8fWRtoreJkZj3rEK9npOeQ5roXQY9sHMoTBXlrvPoJyxiQYtg== X-Received: by 2002:ac2:5b0f:0:b0:472:82f:2537 with SMTP id v15-20020ac25b0f000000b00472082f2537mr12592871lfn.0.1651615769335; Tue, 03 May 2022 15:09:29 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id j9-20020ac24549000000b0047255d2111bsm1042349lfm.74.2022.05.03.15.09.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 May 2022 15:09:28 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v1 1/5] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default Date: Wed, 4 May 2022 01:09:23 +0300 Message-Id: <20220503220927.960821-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503220927.960821-1-dmitry.baryshkov@linaro.org> References: <20220503220927.960821-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Follow the typical practice and keep DSI1/DSI1 PHY disabled by default. They should be enabled in the board DT files. No existing boards use them at this moment. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi index eccf6fde16b4..023b0ac4118c 100644 --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi @@ -192,6 +192,8 @@ dsi1: dsi@c996000 { phys = <&dsi1_phy>; phy-names = "dsi"; + status = "disabled"; + ports { #address-cells = <1>; #size-cells = <0>; @@ -225,6 +227,7 @@ dsi1_phy: dsi-phy@c996400 { clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "ref"; + status = "disabled"; }; }; From patchwork Tue May 3 22:09:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 569094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 719B2C433EF for ; Tue, 3 May 2022 22:09:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229952AbiECWNH (ORCPT ); Tue, 3 May 2022 18:13:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243524AbiECWNG (ORCPT ); Tue, 3 May 2022 18:13:06 -0400 Received: from mail-lj1-x22e.google.com (mail-lj1-x22e.google.com [IPv6:2a00:1450:4864:20::22e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C3C5D41FA5 for ; Tue, 3 May 2022 15:09:32 -0700 (PDT) Received: by mail-lj1-x22e.google.com with SMTP id s27so23719595ljd.2 for ; Tue, 03 May 2022 15:09:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=x77yuXv5BtdGGUwSqrBKhtb4m+5xi8gdiDRGz1Tgj6A=; b=MvfR5KWnkyQ5z66XRLgt9gUNzNfzz1E2OfAei0n+QCgJ4T1ZBor405muZpdNFVvj7X YinivZsQsofFLprI0NMQSblwMJ3FeZoaIs5HE5nbVpF5q+FwUUF9nsTz8FUKlX9OZ/qr hCnuo1EUYwqvQjCiY+BRH9gxlD+FHogX1z5sdvrKi7OM0x4O3CRHVbmwsknItKxMU9r5 1a2kK7O7/+/8eVfMUDy5HHNnsgOpTuGg66cTyW5R0mM7Ez73vEzjVdviipCNmLlHgBU5 9zugz3vlB5m4leSiXij2kYFfOmyQ3iltkhj6tsm0zAXcfXwMVKvUyE8BGNy4iI2it92Q Zs5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=x77yuXv5BtdGGUwSqrBKhtb4m+5xi8gdiDRGz1Tgj6A=; b=LztdPF5cEnfip2++ROZGrpSXlkLxfFO1i57ocEViXvdip6orvy55Fj8m0Oi3vb6Mn1 Flzaudc4Dq0M0hSMQist7e0k5TRnEE76kf9u+SAYbTaYmU61K7Ay6A04UHVkoqaUc038 1+aOcAyMdY6bFxxQD6rnezcQxOg2SN08GrxXmvDyxMCE+CvKodOWStxdSqPqg0a/kwmH j7H1ESa50p6lk6/5bXhGvvwUxcfgUzVny15PqksV+k4buzjSa/je3DAuOW/qa4Anvus3 G4IoAYog/dycxYPIYHpDHBg+i9qIA6F6wdJy5iou+7xC9JHlXQyZOhetUij3q41rOPzF pQnw== X-Gm-Message-State: AOAM531rO+jtzCcfKaRwzXSAu53jAXjGbikj5BwXl0Gu/aGQLq70QQbO dNAWYOc+fgcwUduPEfSNZDWGww== X-Google-Smtp-Source: ABdhPJyGax+qrJ+6s7feG3Xfj+msn65IPVR71DAfH8LtdyQsEx9xN77RxAwEgYmZf9D5u1/HkeRBSA== X-Received: by 2002:a05:651c:549:b0:250:6051:b5 with SMTP id q9-20020a05651c054900b00250605100b5mr4491859ljp.36.1651615771135; Tue, 03 May 2022 15:09:31 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id j9-20020ac24549000000b0047255d2111bsm1042349lfm.74.2022.05.03.15.09.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 May 2022 15:09:30 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio Subject: [PATCH v1 3/5] arm64: dts: qcom: sdm630: fix the qusb2phy ref clock Date: Wed, 4 May 2022 01:09:25 +0300 Message-Id: <20220503220927.960821-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503220927.960821-1-dmitry.baryshkov@linaro.org> References: <20220503220927.960821-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org According to the downstram DT file, the qusb2phy ref clock should be GCC_RX0_USB2_CLKREF_CLK, not GCC_RX1_USB2_CLKREF_CLK. Fixes: c65a4ed2ea8b ("arm64: dts: qcom: sdm630: Add USB configuration") Cc: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 45eaaa6a4a74..d8c3d2569340 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1262,7 +1262,7 @@ qusb2phy: phy@c012000 { #phy-cells = <0>; clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&gcc GCC_RX1_USB2_CLKREF_CLK>; + <&gcc GCC_RX0_USB2_CLKREF_CLK>; clock-names = "cfg_ahb", "ref"; resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; From patchwork Tue May 3 22:09:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 569093 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35DBFC433F5 for ; Tue, 3 May 2022 22:09:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243535AbiECWNK (ORCPT ); Tue, 3 May 2022 18:13:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52902 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243529AbiECWNJ (ORCPT ); Tue, 3 May 2022 18:13:09 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D53C41FAB for ; Tue, 3 May 2022 15:09:34 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id x33so32610309lfu.1 for ; Tue, 03 May 2022 15:09:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NpE7znxKqpOdFLe2btWlAqolByFJc6sXieoM5n8O52E=; b=TtRFsz+kgB64kUUuk/+9JhsyhG4/Do1lq80mtk/kL8j71+iwUYL4nhQ8HoxWq/Vksu 1WmuGMxQXutf6jSAiTeIyiYvYo/lJCKjn2DYjPWzY2LgOYkDl2Io7A9BfqUQZR+yoKHP /Foe01Wo+NWIX2DjGTQKMtjvEKVAuGvenKyOAiFbjvrBdcJbQid+ikcxsAMWzAImrPVc lHcLgtzU4FFaI7biSoKbKy+WbgyeuyPUo/lXhgXnAo/VbGEdUj7pjSJ34jbhEkN0nCQm +6txeO5z3zS1PfabGw2dzDPkQPNW5ibezWuCXO3Ou8t8NlYcFNXBgPrl3vq1XDAXiB72 e3PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NpE7znxKqpOdFLe2btWlAqolByFJc6sXieoM5n8O52E=; b=DBzCXXhYizHRMCM4m1R98z6GjTpMiMDkpIVNrZfEALV9E4Jr5mh7/HuDI+tWocS0at a8/LFZcAzq2fw/xoeXgvbdFzi7x/yj5nXsgJJoCTj8ZVkvMC7iotFaPuL/ZoL4E8hLtI L90lIig+4ly4eygt0vwlBqmMYlSZIvyk88CnhaLiMJVZ3GDw1RIVTKGDANdGolE2dEWL FawnoPyn6/e+5xer6Q+SxVRaRIDerGdJq5/UJYneExbTL21ntksqnJ5s26fbEMemkLLA C1hyqhrx7zBHJUDoDVJyUiVlD9+JY9y62yC2+BUYD20WaMqL83JNfaboOI8eIZus7Aqp 0QCw== X-Gm-Message-State: AOAM530Z60dRqYmex1hEgTvuhMRwO6FtZjJDpYDDre/OSO1JMTUJE43w +z5DK3RMBwKKZ+MCtTYyfMc1lQ== X-Google-Smtp-Source: ABdhPJyc/FBPF1p05tenpG7uMaDKLJw/cLv2z72yhFAelhH8cl+uUpUY0utOYmDzyXZswF/yuMdNrw== X-Received: by 2002:a05:6512:b0f:b0:473:be27:863e with SMTP id w15-20020a0565120b0f00b00473be27863emr158810lfu.167.1651615772940; Tue, 03 May 2022 15:09:32 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id j9-20020ac24549000000b0047255d2111bsm1042349lfm.74.2022.05.03.15.09.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 May 2022 15:09:32 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v1 5/5] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support Date: Wed, 4 May 2022 01:09:27 +0300 Message-Id: <20220503220927.960821-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503220927.960821-1-dmitry.baryshkov@linaro.org> References: <20220503220927.960821-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IFC6560 is a board from Inforce Computing, built around the SDA660 SoC. This patch describes core clocks, some regulators from the two PMICs, debug uart, storage, bluetooth and audio DSP remoteproc. The regulator settings are inherited from prior work by Konrad Dybcio and AngeloGioacchino Del Regno. Co-developed-by: Bjorn Andersson Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sda660-inforce-ifc6560.dts | 455 ++++++++++++++++++ 2 files changed, 456 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index f9e6343acd03..5f717fe0e8d0 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -88,6 +88,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-herobrine-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd.dtb +dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts new file mode 100644 index 000000000000..bb5cbd20379e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts @@ -0,0 +1,455 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Ltd. + * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, AngeloGioacchino Del Regno + * + */ + +/dts-v1/; + +#include "sdm660.dtsi" +#include "pm660.dtsi" +#include "pm660l.dtsi" + +/ { + model = "Inforce 6560 Single Board Computer"; + compatible = "inforce,ifc6560", "qcom,sdm660"; + + aliases { + serial0 = &blsp1_uart2; + serial1 = &blsp2_uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + volup { + label = "Volume Up"; + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + }; + + /* + * Until we hook up type-c detection, we + * have to stick with this. But it works. + */ + extcon_usb: extcon-usb { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7533_out>; + }; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + + regulator-always-on; + regulator-boot-on; + }; + + v3p3_bck_bst: v3p3-bck-bst-regulator { + compatible = "regulator-fixed"; + regulator-name = "v3p3_bck_bst"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + vin-supply = <&vph_pwr>; + }; + + v1p2_ldo: v1p2-ldo-regulator { + compatible = "regulator-fixed"; + regulator-name = "v1p2_ldo"; + + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + + vin-supply = <&vph_pwr>; + }; + + v5p0_boost: v5p0-boost-regulator { + compatible = "regulator-fixed"; + regulator-name = "v5p0_boost"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + vin-supply = <&vph_pwr>; + }; +}; + +&adsp_pil { + firmware-name = "qcom/inforce/ifc6560/adsp.mbn"; +}; + +&blsp_i2c6 { + status = "okay"; + + /* BAM DMA doesn't seem to work on the board */ + /delete-property/ dmas; + /delete-property/ dma-names; + + adv7533: hdmi@39 { + compatible = "adi,adv7535"; + + reg = <0x39>, <0x66>; + reg-names = "main", "edid"; + + interrupt-parent = <&pm660l_gpios>; + interrupts = <11 2>; + + clocks = <&rpmcc 12>; + clock-names = "cec"; + adi,dsi-lanes = <3>; + avdd-supply = <&vreg_l13a_1p8>; + dvdd-supply = <&vreg_l13a_1p8>; + pvdd-supply = <&vreg_l13a_1p8>; + a2vdd-supply = <&vreg_l13a_1p8>; + v3p3-supply = <&v3p3_bck_bst>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + adv7533_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + + adv7533_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; +}; + +/* BAM DMA doesn't seem to work on the board */ +&blsp1_dma { + status = "disabled"; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +/* BAM DMA doesn't seem to work on the board */ +&blsp2_dma { + status = "disabled"; +}; + +&blsp2_uart1 { + status = "okay"; + + bluetooth { + compatible = "qcom,wcn3990-bt"; + + vddio-supply = <&vreg_l13a_1p8>; + vddxo-supply = <&vreg_l9a_1p8>; + vddrf-supply = <&vreg_l6a_1p3>; + vddch0-supply = <&vreg_l19a_3p3>; + max-speed = <3200000>; + }; +}; + +&dsi0 { + status = "okay"; + vdda-supply = <&vreg_l1a_1p225>; +}; + +&dsi0_out { + remote-endpoint = <&adv7533_in>; + data-lanes = <0 1 2>; +}; + +&dsi0_phy { + status = "okay"; + vcca-supply = <&vreg_l1b_0p925>; +}; + +&mdp { + status = "okay"; +}; + +&mdss { + status = "okay"; +}; + +&mmss_smmu { + status = "okay"; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + status = "okay"; + + linux,code = <115>; +}; + +&qusb2phy { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&qusb2phy1 { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&rpm_requests { + pm660-regulators { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <1805000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1368000>; + regulator-allow-set-load; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1804000>; + regulator-max-microvolt = <1896000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l13a_1p8: l13 { + /* This gives power to the LPDDR4: never turn it off! */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_l19a_3p3: l19 { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + }; + + pm660l-regulators { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <925000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l2b_2p95: l2 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l4b_2p95: l4 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_2p95: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + regulator-system-load = <800000>; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3125000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3624000>; + regulator-enable-ramp-delay = <500>; + regulator-ramp-delay = <0>; + }; + }; +}; + +&sdhc_1 { + status = "okay"; + supports-cqe; + + mmc-ddr-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + vmmc-supply = <&vreg_l4b_2p95>; + vqmmc-supply = <&vreg_l8a_1p8>; +}; + +&sdhc_2 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&sdc2_state_on &sdc2_card_det_n>; + pinctrl1 = <&sdc2_state_off &sdc2_card_det_n>; + + vmmc-supply = <&vreg_l5b_2p95>; + vqmmc-supply = <&vreg_l2b_2p95>; + + cd-gpios = <&tlmm 54 1>; + no-sdio; + no-emmc; +}; + +&tlmm { + gpio-reserved-ranges = <0 4>, <8 4>; + + sdc2_card_det_n: sd-card-det-n { + pins = "gpio54"; + function = "gpio"; + bias-pull-up; + }; +}; + +&usb2 { + status = "okay"; +}; + +&usb2_dwc3 { + dr_mode = "host"; +}; + +&usb3 { + status = "okay"; +}; + +&usb3_dwc3 { + dr_mode = "peripheral"; + extcon = <&extcon_usb>; +};