From patchwork Fri Apr 29 22:01:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 568328 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9A11C433FE for ; Fri, 29 Apr 2022 22:02:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1381060AbiD2WFQ (ORCPT ); Fri, 29 Apr 2022 18:05:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379096AbiD2WFO (ORCPT ); Fri, 29 Apr 2022 18:05:14 -0400 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 855AFC90FB for ; Fri, 29 Apr 2022 15:01:54 -0700 (PDT) Received: by mail-pl1-x632.google.com with SMTP id n14so1382951plf.3 for ; Fri, 29 Apr 2022 15:01:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nl6FydOlN2pYUTl+MvQ4KSG1F7oU2ZiZQ3YsqnGUnWM=; b=IJ0KZ56BQJxyq1cFpWmA/lEKHni9tGykH/e58idITXUHIlJnB4H/0iWLcPcfaItCy1 Uz3aTKNIaoL9f4f3u8jgBuvQk0d62JCS4y9s0O6Vw0qS14Ar+UrzjpADxleApjQVNW2N yJImuoY+o6VEukXjwGcp2g31hNQUrluthlInk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nl6FydOlN2pYUTl+MvQ4KSG1F7oU2ZiZQ3YsqnGUnWM=; b=xZt9aeicTZbF69Jt4UsuPNxFfbiyHiVjmRxACDw9fIBDuJgVz7yoZjbJFh/lUlRT8a 7PzQnWQ5lbwiBS6U1Nz14wDX4ayhlmvTeMm3gie1EeWTl1edsx8IS8lkPhJByPhfVD4y uEDqTbDHQ++V6xBFzZPt4O21DPArOmtImJG5RYOPnQh5yIuzm1pgVZOShvUGSdLuOYRg 9hs7zqLtlDSOanAGxd8hmjdgiLT3rBB1Y7GM3/BUAeNB8z6p9xtkAjnBZ9AOYvMvyhbf Hjgp1W1IAuqZwwMuVmUz76QFVSsekE8w9l+hl/HKwLjzkdsM6sDBKuMwskNrhHjTM1iI sQWA== X-Gm-Message-State: AOAM532ZhPbLQshXiJOeB1nl09ziq2yyWftZiVUcEwtiIjWgZ1Gtrksr jhHBvJniFxIGTKxZz5RQ4SGJQA== X-Google-Smtp-Source: ABdhPJyG3ulfA5L9QHN9ajJjAgnor8GeebU0A2CJ7qY3c19G9gPA9afwRslYa+LBPgBpBJKoWe6eig== X-Received: by 2002:a17:902:9a8c:b0:15a:a21:b52a with SMTP id w12-20020a1709029a8c00b0015a0a21b52amr1155021plp.86.1651269714075; Fri, 29 Apr 2022 15:01:54 -0700 (PDT) Received: from localhost ([2620:15c:202:201:6161:73ca:10a5:5383]) by smtp.gmail.com with UTF8SMTPSA id bj1-20020a170902850100b0015e8d4eb2a2sm81088plb.236.2022.04.29.15.01.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 29 Apr 2022 15:01:53 -0700 (PDT) From: Gwendal Grignou To: jic23@kernel.org, robh+dt@kernel.org, swboyd@chromium.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, Gwendal Grignou , Rob Herring Subject: [PATCH v5 03/10] dt-bindings: iio: sx9324: Add precharge resistor setting Date: Fri, 29 Apr 2022 15:01:37 -0700 Message-Id: <20220429220144.1476049-4-gwendal@chromium.org> X-Mailer: git-send-email 2.36.0.464.gb9c8b46e94-goog In-Reply-To: <20220429220144.1476049-1-gwendal@chromium.org> References: <20220429220144.1476049-1-gwendal@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Allow configure the resistance used during precharge. Signed-off-by: Gwendal Grignou Reviewed-by: Stephen Boyd Acked-by: Rob Herring --- Changes since v4: - Add multipleOf propery - Move description at the end, to match convension. Changes since v3: - Added Review tags. Changes since v2: - Change kOhms into ohms. Changes since v1: - Suffix field with kOhms unit. .../bindings/iio/proximity/semtech,sx9324.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml index b8a6ee16854ff..d689b2bab71b4 100644 --- a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml +++ b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml @@ -126,6 +126,14 @@ properties: UINT_MAX (4294967295) represents infinite. Other values represent 1-1/N. + semtech,input-precharge-resistor-ohms: + default: 4000 + multipleOf: 2000 + minimum: 0 + maximum: 30000 + description: + Pre-charge input resistance in Ohm. + required: - compatible - reg @@ -157,5 +165,6 @@ examples: semtech,ph01-proxraw-strength = <2>; semtech,ph23-proxraw-strength = <2>; semtech,avg-pos-strength = <64>; + semtech,input-precharge-resistor-ohms = <2000>; }; }; From patchwork Fri Apr 29 22:01:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 568327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05EF4C433EF for ; Fri, 29 Apr 2022 22:02:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1380252AbiD2WFW (ORCPT ); Fri, 29 Apr 2022 18:05:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238891AbiD2WFP (ORCPT ); Fri, 29 Apr 2022 18:05:15 -0400 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30926CB015 for ; Fri, 29 Apr 2022 15:01:56 -0700 (PDT) Received: by mail-pl1-x62a.google.com with SMTP id u9so7643720plf.6 for ; Fri, 29 Apr 2022 15:01:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bzVP4SoLbvQ+2ClFFIC9xNs5B07CxGDHrnHqSGpSLAw=; b=j703hKi4kLCYjRuePWv3gyccqnWaFPRL+bVpATi2Z6o3yS3NKQS7rBNVG7Vr7N0NVQ rSd6m73Evjv+6brlhS48SedG19ShvjiUlLy1X2wExzPpdJFK94IjcYuzstG/zne63Nn5 m4RQugC391JJAoblTCfNUXSLjYeONNK6fV370= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bzVP4SoLbvQ+2ClFFIC9xNs5B07CxGDHrnHqSGpSLAw=; b=heCzw3g1hpoiYjsDQPvwFbjajm5B5gQlKA5qFirNNAFbv7JD6WGsUEsUmdFnNuminm Wf3cl+nVQoV0/nJvMUkwm1/tAQZhIqqfuwrHc3GvQDTaleaX/zueHUZkfiXq41XXb1QK zLFoOit6uk6IWP/MfJCHeMwQc5DtXTygiLha3Fvd9Tks0x6h+rELYX5qTjdeVLIdxoDX vevO24J8ni2kNUwRaseYCBGLO0hKkiVT3BNf3Io8JepJ3A+WaiCwO5n3nayNtVBoKjPG 1f1yI7fsv/6o6Kdl9siDS4KZ6yueuLrtfss0oq67xPqSSjLhhsF4U2HwiMGlOZMzKgI/ 2GJg== X-Gm-Message-State: AOAM533oebhQdGwqYA2gkxi6+l7R0d+z02DUOI0d9hTBUlsU4H4E49ZF uPus7j88108ZpoOALsFbLOlhJg== X-Google-Smtp-Source: ABdhPJx4h/jMuR0p2TEJd/JaZpQFc1tZVnOzZ8+0mM/JFDEnM6yE/7TuUzQ+NA7lEzFi1X5CWmo7zg== X-Received: by 2002:a17:90a:ba15:b0:1c6:7873:b192 with SMTP id s21-20020a17090aba1500b001c67873b192mr1237925pjr.76.1651269715379; Fri, 29 Apr 2022 15:01:55 -0700 (PDT) Received: from localhost ([2620:15c:202:201:6161:73ca:10a5:5383]) by smtp.gmail.com with UTF8SMTPSA id a14-20020a1709027e4e00b0015e8d4eb1easm80425pln.52.2022.04.29.15.01.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 29 Apr 2022 15:01:55 -0700 (PDT) From: Gwendal Grignou To: jic23@kernel.org, robh+dt@kernel.org, swboyd@chromium.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, Gwendal Grignou Subject: [PATCH v5 04/10] iio: sx9324: Add precharge internal resistance setting Date: Fri, 29 Apr 2022 15:01:38 -0700 Message-Id: <20220429220144.1476049-5-gwendal@chromium.org> X-Mailer: git-send-email 2.36.0.464.gb9c8b46e94-goog In-Reply-To: <20220429220144.1476049-1-gwendal@chromium.org> References: <20220429220144.1476049-1-gwendal@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add ability to set the precharge internal resistance from the device tree. Signed-off-by: Gwendal Grignou Reviewed-by: Stephen Boyd --- Changes since v4: - Added missing tests when property is not found. Changes since v3: - Added Review tags. Changes since v2: - Change kOhms into ohms. Changes since v1: - Suffix field with kOhms unit. - Split patch in 2. drivers/iio/proximity/sx9324.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/iio/proximity/sx9324.c b/drivers/iio/proximity/sx9324.c index a7d9a53692a6d..8eec73f7641ee 100644 --- a/drivers/iio/proximity/sx9324.c +++ b/drivers/iio/proximity/sx9324.c @@ -72,6 +72,7 @@ #define SX9324_REG_AFE_CTRL8 0x2c #define SX9324_REG_AFE_CTRL8_RESERVED 0x10 #define SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM 0x02 +#define SX9324_REG_AFE_CTRL8_RESFILTIN_MASK GENMASK(3, 0) #define SX9324_REG_AFE_CTRL9 0x2d #define SX9324_REG_AFE_CTRL9_AGAIN_1 0x08 @@ -893,6 +894,18 @@ sx9324_get_default_reg(struct device *dev, int idx, reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL4_RESOLUTION_MASK, raw); break; + case SX9324_REG_AFE_CTRL8: + ret = device_property_read_u32(dev, + "semtech,input-precharge-resistor-ohms", + &raw); + if (ret) + break; + + reg_def->def &= ~SX9324_REG_AFE_CTRL8_RESFILTIN_MASK; + reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL8_RESFILTIN_MASK, + raw / 2000); + break; + case SX9324_REG_ADV_CTRL5: ret = device_property_read_u32(dev, "semtech,startup-sensor", &start); From patchwork Fri Apr 29 22:01:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 568326 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81CE4C433F5 for ; Fri, 29 Apr 2022 22:02:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1381101AbiD2WFX (ORCPT ); Fri, 29 Apr 2022 18:05:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1381148AbiD2WFV (ORCPT ); Fri, 29 Apr 2022 18:05:21 -0400 Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B631ADC59B for ; Fri, 29 Apr 2022 15:01:58 -0700 (PDT) Received: by mail-pf1-x42e.google.com with SMTP id i24so7979216pfa.7 for ; Fri, 29 Apr 2022 15:01:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vZy9l9k4uZyTYOvy+bIc4en4lTtDW17uzkL7hL90S0o=; b=T9vDpGxGPNhFQtiNbNbEGU59lqujZtyQPOszurG5Mw6LQOA/30P7gr3tzq01SBy1od V6aXzZCCaT3QGLPMhhzxeA1/DRZcn0bB+O5sd3+VF5ZoHCFUSPI7cpO5wXSlQzDfCBdb WR/cIz3xVi1B7YQaTRrDqso9JdcepLJgWQAm4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vZy9l9k4uZyTYOvy+bIc4en4lTtDW17uzkL7hL90S0o=; b=rYj9oysV9sIkWBTzhPxMc8aYFVAGrhb0wUlWWfz0XbmM1651ShgZLMkzyMxE7LhhhP KLQfaJp+o7xy6EErv5J/eUKj1Fl+vULrxnHlTpxHd1+hO0WugoKKgtsCW+cb1jX4Rr67 KBNRtwqs0H+dYHZCaX6+ALZmNvOQQIZ7tRWAbhlft3Svz91FIHZ8OagIFODb/vTD1bc5 tz/cGT5EkS6+X1rBme0ioDw9MzVc2etWWHlyt3kdstjN28YY7H2ZMDeXt0wuy+v36WbB gM4A4lUfT4CXAQrUgdU+jHBKGh2OuXGfMLOOvc1/yvZYLxKZHMXELNGR/m9poFR1qMsA c7fA== X-Gm-Message-State: AOAM532ae36QLve2D6CYruC71O4aOB949c3R0CPyKACv5MYYg3iBJmb7 opBed16p5CR+pqicknS1xx3vwA== X-Google-Smtp-Source: ABdhPJxso9uP0uRrBNyXXfIfewY2zuevnr+5FrVTfNrU5RbDLr0oJnsJ2qF6oLgcJom/GEsgW3hVGw== X-Received: by 2002:aa7:82d9:0:b0:4fa:2c7f:41e with SMTP id f25-20020aa782d9000000b004fa2c7f041emr1265913pfn.1.1651269718236; Fri, 29 Apr 2022 15:01:58 -0700 (PDT) Received: from localhost ([2620:15c:202:201:6161:73ca:10a5:5383]) by smtp.gmail.com with UTF8SMTPSA id u23-20020a170902a61700b0015e8d4eb2b9sm80881plq.259.2022.04.29.15.01.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 29 Apr 2022 15:01:57 -0700 (PDT) From: Gwendal Grignou To: jic23@kernel.org, robh+dt@kernel.org, swboyd@chromium.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, Gwendal Grignou Subject: [PATCH v5 06/10] iio: sx9324: Add Setting for internal compensation resistor Date: Fri, 29 Apr 2022 15:01:40 -0700 Message-Id: <20220429220144.1476049-7-gwendal@chromium.org> X-Mailer: git-send-email 2.36.0.464.gb9c8b46e94-goog In-Reply-To: <20220429220144.1476049-1-gwendal@chromium.org> References: <20220429220144.1476049-1-gwendal@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Based on device tree setting, set the internal compensation resistor. Signed-off-by: Gwendal Grignou Reviewed-by: Stephen Boyd --- Changes since v4: - No changes. Changes since v3: - Use match_string() to prevent incorrect matching. Changes since v2: - No changes. Changes since v1: - No changes. drivers/iio/proximity/sx9324.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/iio/proximity/sx9324.c b/drivers/iio/proximity/sx9324.c index 8eec73f7641ee..6806262eb1c92 100644 --- a/drivers/iio/proximity/sx9324.c +++ b/drivers/iio/proximity/sx9324.c @@ -52,6 +52,11 @@ #define SX9324_REG_CLK_SPRD 0x15 #define SX9324_REG_AFE_CTRL0 0x20 +#define SX9324_REG_AFE_CTRL0_RINT_SHIFT 6 +#define SX9324_REG_AFE_CTRL0_RINT_MASK \ + GENMASK(SX9324_REG_AFE_CTRL0_RINT_SHIFT + 1, \ + SX9324_REG_AFE_CTRL0_RINT_SHIFT) +#define SX9324_REG_AFE_CTRL0_RINT_LOWEST 0x00 #define SX9324_REG_AFE_CTRL1 0x21 #define SX9324_REG_AFE_CTRL2 0x22 #define SX9324_REG_AFE_CTRL3 0x23 @@ -769,7 +774,7 @@ static const struct sx_common_reg_default sx9324_default_regs[] = { */ { SX9324_REG_GNRL_CTRL1, SX9324_REG_GNRL_CTRL1_PAUSECTRL }, - { SX9324_REG_AFE_CTRL0, 0x00 }, + { SX9324_REG_AFE_CTRL0, SX9324_REG_AFE_CTRL0_RINT_LOWEST }, { SX9324_REG_AFE_CTRL3, 0x00 }, { SX9324_REG_AFE_CTRL4, SX9324_REG_AFE_CTRL4_FREQ_83_33HZ | SX9324_REG_AFE_CTRL4_RES_100 }, @@ -848,6 +853,8 @@ static const struct sx_common_reg_default * sx9324_get_default_reg(struct device *dev, int idx, struct sx_common_reg_default *reg_def) { + static const char * const sx9324_rints[] = { "lowest", "low", "high", + "highest" }; #define SX9324_PIN_DEF "semtech,ph0-pin" #define SX9324_RESOLUTION_DEF "semtech,ph01-resolution" #define SX9324_PROXRAW_DEF "semtech,ph01-proxraw-strength" @@ -855,6 +862,7 @@ sx9324_get_default_reg(struct device *dev, int idx, char prop[] = SX9324_PROXRAW_DEF; u32 start = 0, raw = 0, pos = 0; int ret, count, ph, pin; + const char *res; memcpy(reg_def, &sx9324_default_regs[idx], sizeof(*reg_def)); switch (reg_def->reg) { @@ -875,6 +883,17 @@ sx9324_get_default_reg(struct device *dev, int idx, SX9324_REG_AFE_PH0_PIN_MASK(pin); reg_def->def = raw; break; + case SX9324_REG_AFE_CTRL0: + ret = device_property_read_string(dev, + "semtech,int-comp-resistor", &res); + if (ret) + break; + ret = match_string(sx9324_rints, ARRAY_SIZE(sx9324_rints), res); + if (ret < 0) + break; + reg_def->def &= ~SX9324_REG_AFE_CTRL0_RINT_MASK; + reg_def->def |= ret << SX9324_REG_AFE_CTRL0_RINT_SHIFT; + break; case SX9324_REG_AFE_CTRL4: case SX9324_REG_AFE_CTRL7: if (reg_def->reg == SX9324_REG_AFE_CTRL4) From patchwork Fri Apr 29 22:01:42 2022 Content-Type: text/plain; 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Fri, 29 Apr 2022 15:02:01 -0700 (PDT) Received: from localhost ([2620:15c:202:201:6161:73ca:10a5:5383]) by smtp.gmail.com with UTF8SMTPSA id z21-20020a631915000000b003c14af5062dsm6225226pgl.69.2022.04.29.15.02.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 29 Apr 2022 15:02:01 -0700 (PDT) From: Gwendal Grignou To: jic23@kernel.org, robh+dt@kernel.org, swboyd@chromium.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, Gwendal Grignou Subject: [PATCH v5 08/10] iio: sx9324: Add Setting for internal analog gain Date: Fri, 29 Apr 2022 15:01:42 -0700 Message-Id: <20220429220144.1476049-9-gwendal@chromium.org> X-Mailer: git-send-email 2.36.0.464.gb9c8b46e94-goog In-Reply-To: <20220429220144.1476049-1-gwendal@chromium.org> References: <20220429220144.1476049-1-gwendal@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Based on device tree setting, set the internal analog gain. Signed-off-by: Gwendal Grignou Reviewed-by: Stephen Boyd --- New in v5. drivers/iio/proximity/sx9324.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/iio/proximity/sx9324.c b/drivers/iio/proximity/sx9324.c index 6806262eb1c92..851f2ff0ae7e8 100644 --- a/drivers/iio/proximity/sx9324.c +++ b/drivers/iio/proximity/sx9324.c @@ -79,6 +79,7 @@ #define SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM 0x02 #define SX9324_REG_AFE_CTRL8_RESFILTIN_MASK GENMASK(3, 0) #define SX9324_REG_AFE_CTRL9 0x2d +#define SX9324_REG_AFE_CTRL9_AGAIN_MASK GENMASK(3, 0) #define SX9324_REG_AFE_CTRL9_AGAIN_1 0x08 #define SX9324_REG_PROX_CTRL0 0x30 @@ -925,6 +926,27 @@ sx9324_get_default_reg(struct device *dev, int idx, raw / 2000); break; + case SX9324_REG_AFE_CTRL9: + ret = device_property_read_u32(dev, + "semtech,input-analog-gain", &raw); + if (ret) + break; + /* + * The analog gain has the following setting: + * +---------+----------------+----------------+ + * | dt(raw) | physical value | register value | + * +---------+----------------+----------------+ + * | 0 | x1.247 | 6 | + * | 1 | x1 | 8 | + * | 2 | x0.768 | 11 | + * | 3 | x0.552 | 15 | + * +---------+----------------+----------------+ + */ + reg_def->def &= ~SX9324_REG_AFE_CTRL9_AGAIN_MASK; + reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL9_AGAIN_MASK, + 6 + raw * (raw + 3) / 2); + break; + case SX9324_REG_ADV_CTRL5: ret = device_property_read_u32(dev, "semtech,startup-sensor", &start); From patchwork Fri Apr 29 22:01:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 568324 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B03AC4167B for ; Fri, 29 Apr 2022 22:02:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1381177AbiD2WFc (ORCPT ); Fri, 29 Apr 2022 18:05:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239494AbiD2WF0 (ORCPT ); Fri, 29 Apr 2022 18:05:26 -0400 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25956DC5A0 for ; Fri, 29 Apr 2022 15:02:05 -0700 (PDT) Received: by mail-pl1-x636.google.com with SMTP id i1so2122622plg.7 for ; Fri, 29 Apr 2022 15:02:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=i3slZG/YREGv9792NS06KvJhabhMlI2Rp7qXb7SE0gE=; b=oWlj2Zp5aCOqdQDVGlnxiaPsSqVK6peltl05TwAq6Scqs5XuFTQWo0M5bUfJ95ioak JV1qJn39WJ/lHWJSTGhckD0ee3gqD10+yVac792LxLN22GXDPmSUtESuQYXFiU2BOXDF m18K5oZTGc4YT1g0QCzxSBFD9r0wgOb+W4T+s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=i3slZG/YREGv9792NS06KvJhabhMlI2Rp7qXb7SE0gE=; b=r/T/FZcURmQZcABwzSKpWzvgFH/u8yqZWqhEHFpYTDqAMHlzGbc9q2qmR9fqsE6NB/ YNq8KsrkPZVo/g74MKfLGpi+uwzfkXLiLrxhk1rI2owKVUsNAjlQ++5foIL7Kq3pPWjM 5OzRklt834JzkR40Bm54Ctma1kNsI6AQN6qjHOm88TMYFUi6qODzmGs1hek7IxdGx+R0 6COmUADBMIQuqQZGjGlI0YjseDR1pNHeJh0kK/ktI0dxIrS6kAHJ6Oykgw9pqnvjorud uSGW3aGasE3YkQKRthuwsaJE+Mu8sp7+EwXMQyqSaGrWHqDAO96U1DVW3gtvNDbUAk6O NVbg== X-Gm-Message-State: AOAM53306FAvkcy8Rv5SE4GxI+sg7qIqBn5tIhDYyZ36fc1B/a3NvH/1 GutQonoNJrOdaI7FEmf+Mh2DJA== X-Google-Smtp-Source: ABdhPJwS9kzvXGCjSfwCC3eoczLstXT0CH0kXt71Tu4EbCRr03Tk0xL4L0/ZwhmEDpnFW4waFzQDMQ== X-Received: by 2002:a17:902:f608:b0:158:29e6:c88 with SMTP id n8-20020a170902f60800b0015829e60c88mr1316424plg.174.1651269724588; Fri, 29 Apr 2022 15:02:04 -0700 (PDT) Received: from localhost ([2620:15c:202:201:6161:73ca:10a5:5383]) by smtp.gmail.com with UTF8SMTPSA id o41-20020a17090a0a2c00b001d75aabe050sm11131597pjo.34.2022.04.29.15.02.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 29 Apr 2022 15:02:04 -0700 (PDT) From: Gwendal Grignou To: jic23@kernel.org, robh+dt@kernel.org, swboyd@chromium.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, Gwendal Grignou Subject: [PATCH v5 10/10] iio: sx9360: Add pre-charge resistor setting Date: Fri, 29 Apr 2022 15:01:44 -0700 Message-Id: <20220429220144.1476049-11-gwendal@chromium.org> X-Mailer: git-send-email 2.36.0.464.gb9c8b46e94-goog In-Reply-To: <20220429220144.1476049-1-gwendal@chromium.org> References: <20220429220144.1476049-1-gwendal@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add ability to set the precharge internal resistance from the device tree. Signed-off-by: Gwendal Grignou Reviewed-by: Stephen Boyd --- Changes since v4: - Added missing tests when property is not found. Changes since v3: - Added Review tags. Changes since v2: - Change kOhms into ohms. Changes since v1: - Suffix field with kOhms unit. drivers/iio/proximity/sx9360.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/iio/proximity/sx9360.c b/drivers/iio/proximity/sx9360.c index 3ebb30c8a4f61..d9a12e6be6ca6 100644 --- a/drivers/iio/proximity/sx9360.c +++ b/drivers/iio/proximity/sx9360.c @@ -51,6 +51,8 @@ #define SX9360_REG_GNRL_REG_2_FREQ(_r) (SX9360_FOSC_HZ / ((_r) * 8192)) #define SX9360_REG_AFE_CTRL1 0x21 +#define SX9360_REG_AFE_CTRL1_RESFILTIN_MASK GENMASK(3, 0) +#define SX9360_REG_AFE_CTRL1_RESFILTIN_0OHMS 0 #define SX9360_REG_AFE_PARAM0_PHR 0x22 #define SX9360_REG_AFE_PARAM1_PHR 0x23 #define SX9360_REG_AFE_PARAM0_PHM 0x24 @@ -671,7 +673,7 @@ static const struct sx_common_reg_default sx9360_default_regs[] = { { SX9360_REG_GNRL_CTRL1, 0x00 }, { SX9360_REG_GNRL_CTRL2, SX9360_REG_GNRL_CTRL2_PERIOD_102MS }, - { SX9360_REG_AFE_CTRL1, 0x00 }, + { SX9360_REG_AFE_CTRL1, SX9360_REG_AFE_CTRL1_RESFILTIN_0OHMS }, { SX9360_REG_AFE_PARAM0_PHR, SX9360_REG_AFE_PARAM0_RSVD | SX9360_REG_AFE_PARAM0_RESOLUTION_128 }, { SX9360_REG_AFE_PARAM1_PHR, SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF | @@ -722,6 +724,17 @@ sx9360_get_default_reg(struct device *dev, int idx, memcpy(reg_def, &sx9360_default_regs[idx], sizeof(*reg_def)); switch (reg_def->reg) { + case SX9360_REG_AFE_CTRL1: + ret = device_property_read_u32(dev, + "semtech,input-precharge-resistor-ohms", + &raw); + if (ret) + break; + + reg_def->def &= ~SX9360_REG_AFE_CTRL1_RESFILTIN_MASK; + reg_def->def |= FIELD_PREP(SX9360_REG_AFE_CTRL1_RESFILTIN_MASK, + raw / 2000); + break; case SX9360_REG_AFE_PARAM0_PHR: case SX9360_REG_AFE_PARAM0_PHM: ret = device_property_read_u32(dev, "semtech,resolution", &raw);