From patchwork Mon Apr 25 10:45:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 565882 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C80AC433EF for ; Mon, 25 Apr 2022 10:48:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241301AbiDYKve (ORCPT ); Mon, 25 Apr 2022 06:51:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229731AbiDYKv3 (ORCPT ); Mon, 25 Apr 2022 06:51:29 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CFC9362D2 for ; Mon, 25 Apr 2022 03:48:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1650883704; x=1682419704; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Hcxn67SV1WL8W3y44Hc/jdaaeJYqYeWsGFj0inQot5Y=; b=HBw+7gcp9aFBNk4DHNexj/8XxakwDQnT65/K7rsa2SAwKNZWESKcOE2A furQkYeLteLI8AL/zMVpSVXrMhddPpGJW5kJLtITjB10OJaQX6vK9P/cB fq4cztC0chxs/xWNxB40uUPrhrXquHsRsd5OLQkmAXxvK61ocKxtFyxbD iB7vhyrBbY8shlW8yZgrrvOa7MCXsUZdJrBlA1/3lf/k9mx46MVl4fphz oEbTHi+Yid8zPaS26/31dcnNHHjR6In214zvF3V4KzqXo1YZjUVvH7fmu 4VN9vDRlr+fOZWe8MD+/NHa4g+XEKsRVwy/O53v5woSPuSkD/DRuC0WXF w==; X-IronPort-AV: E=Sophos;i="5.90,287,1643698800"; d="scan'208";a="156654228" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 25 Apr 2022 03:48:23 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 25 Apr 2022 03:48:23 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 25 Apr 2022 03:48:21 -0700 From: Conor Dooley To: Palmer Dabbelt , , CC: Paul Walmsley , Albert Ou , , , Conor Dooley , Palmer Dabbelt , Rob Herring Subject: [PATCH 2/2] riscv: dts: microchip: move sysctrlr out of soc bus Date: Mon, 25 Apr 2022 11:45:23 +0100 Message-ID: <20220425104521.132538-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220425104521.132538-1-conor.dooley@microchip.com> References: <20220425104521.132538-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The MPFS system controller has no registers of its own, so move it out of the soc node to avoid dtbs_check warnings: arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: soc: syscontroller: {'compatible': ['microchip,mpfs-sys-controller'], 'mboxes': [[15, 0]], 'status': ['okay']} should not be valid under {'type': 'object'} Reported-by: Palmer Dabbelt Suggested-by: Rob Herring Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree") Signed-off-by: Conor Dooley --- Rob: I assume the Suggested-by tag is appropriate here since you told me to do it this way? arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index c5c9d1360de0..bb420ed6965e 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -146,6 +146,11 @@ refclk: msspllclk { #clock-cells = <0>; }; + syscontroller: syscontroller { + compatible = "microchip,mpfs-sys-controller"; + mboxes = <&mbox 0>; + }; + soc { #address-cells = <2>; #size-cells = <2>; @@ -446,10 +451,5 @@ mbox: mailbox@37020000 { #mbox-cells = <1>; status = "disabled"; }; - - syscontroller: syscontroller { - compatible = "microchip,mpfs-sys-controller"; - mboxes = <&mbox 0>; - }; }; };