From patchwork Wed Apr 13 07:51:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 563081 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E594C4332F for ; Wed, 13 Apr 2022 07:51:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233499AbiDMHyJ (ORCPT ); Wed, 13 Apr 2022 03:54:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233495AbiDMHyI (ORCPT ); Wed, 13 Apr 2022 03:54:08 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 16B082AE2B; Wed, 13 Apr 2022 00:51:47 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 9E964FF814; Wed, 13 Apr 2022 07:51:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649836306; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qm0XugBHn63VlkNrRIwu6dicxO8nELKVELpAB8yZ6NU=; b=oA30U6y1bHlm96toMlF/4jC2bi9sjq5+kw2cet+4g/KeEaAzG97Fv66djEAH3wJk0sb7FO AS3xhBegxrEflUzMkuczhfyaKDRr847+b5XwgvGYwLEQ0gciq2qutd/OoekV7UvbRoqk2u gAq+uuEGVNswILV2ExdVTA6TWQJsiO+yVpogE64ArPO922CYQw9ELPNkDvbYXMMTINYNTL 0ZbRQ91qDeXsEZXiQx3HobG4MSZwFLBNgCv3siCnXsWRQV/knUG/u5ej+RzwPOJb5vcfZA N7jCE6K4elcfxNknmvsvFooj83GVJI/ZSj5JrCGLIsM8JHEPHO+gdZczjn1Jeg== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen , Phil Edworthy Subject: [PATCH v5 01/11] serial: 8250: dw: Move definitions to the shared header Date: Wed, 13 Apr 2022 09:51:31 +0200 Message-Id: <20220413075141.72777-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220413075141.72777-1-miquel.raynal@bootlin.com> References: <20220413075141.72777-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Phil Edworthy Move the per-device structure and a helper out of the main .c file, into a shared header as they will both be reused from another .c file. There is no functional change. Signed-off-by: Phil Edworthy [miquel.raynal@bootlin.com: Extracted from a bigger change] Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 21 --------------------- drivers/tty/serial/8250/8250_dwlib.h | 26 ++++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 21 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 96a62e95726b..1666041513a5 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -42,27 +42,6 @@ #define DW_UART_QUIRK_ARMADA_38X BIT(1) #define DW_UART_QUIRK_SKIP_SET_RATE BIT(2) -struct dw8250_data { - struct dw8250_port_data data; - - u8 usr_reg; - int msr_mask_on; - int msr_mask_off; - struct clk *clk; - struct clk *pclk; - struct notifier_block clk_notifier; - struct work_struct clk_work; - struct reset_control *rst; - - unsigned int skip_autocfg:1; - unsigned int uart_16550_compatible:1; -}; - -static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) -{ - return container_of(data, struct dw8250_data, data); -} - static inline struct dw8250_data *clk_to_dw8250_data(struct notifier_block *nb) { return container_of(nb, struct dw8250_data, clk_notifier); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 83d528e5cc21..72e7dbcccad0 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -1,10 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* Synopsys DesignWare 8250 library header file. */ +#include #include +#include #include "8250.h" +struct clk; +struct reset_control; + struct dw8250_port_data { /* Port properties */ int line; @@ -16,5 +21,26 @@ struct dw8250_port_data { u8 dlf_size; }; +struct dw8250_data { + struct dw8250_port_data data; + + u8 usr_reg; + int msr_mask_on; + int msr_mask_off; + struct clk *clk; + struct clk *pclk; + struct notifier_block clk_notifier; + struct work_struct clk_work; + struct reset_control *rst; + + unsigned int skip_autocfg:1; + unsigned int uart_16550_compatible:1; +}; + void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, struct ktermios *old); void dw8250_setup_port(struct uart_port *p); + +static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) +{ + return container_of(data, struct dw8250_data, data); +} From patchwork Wed Apr 13 07:51:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 563080 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14E53C433FE for ; Wed, 13 Apr 2022 07:52:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233510AbiDMHyV (ORCPT ); Wed, 13 Apr 2022 03:54:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46042 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233491AbiDMHyM (ORCPT ); Wed, 13 Apr 2022 03:54:12 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D46802AE2C; Wed, 13 Apr 2022 00:51:51 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id D2A09FF806; Wed, 13 Apr 2022 07:51:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649836310; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BEXVWsaDwRLXPaV0JvlxSGsK3e+q5MmOU/HFk1qgThw=; b=IOW+zcIEBYPJnG6COUdKCwDOebjJqrelDO7jX3KsbhjOm6iJt27f07+XDqvWJj7KVUt/79 VfjUi0AmUwv1YaQ7r7YaqT6nk/36X+Y0Nu/WFopRRAHNZCoKW4Gj+kepH85vOlNkhIctgK bJM26j8CRtQ61DJvlifnNB/deGzP8Ig6WcLFnifC+WeBMEhhskuNybyxw/5umcwBLN/TFy dtUSLI1sQ6Z0OP8xw+s8bcJymiSWMYUYwJu4fCWTkVbP9JCdkf3Fw2Nn2kN4Qm922ybz6a 314qGiu9pZf2NJejGOTYArK7ouRa3xbMt6huv4hdXq5d/lwOctWMmrbtgrTlGw== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen , Emil Renner Berthing Subject: [PATCH v5 03/11] serial: 8250: dw: Create a more generic platform data structure Date: Wed, 13 Apr 2022 09:51:33 +0200 Message-Id: <20220413075141.72777-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220413075141.72777-1-miquel.raynal@bootlin.com> References: <20220413075141.72777-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Before adding more platform data information, let's turn the quirks information as being a member of a wider structure. More fields will be added later. At the same time, change the quirks type to unsigned int, as its size won't change between setups and we don't really need this variable to be more than a few bits wide anyway. Provide a stub to the compatibles without quirks to simplify handling. Keep two different empty structure for the base DW compatible and the Renesas one because the latter will soon be fulfilled anyway. Cc: Emil Renner Berthing Suggested-by: Andy Shevchenko Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 33 ++++++++++++++++++++++------ drivers/tty/serial/8250/8250_dwlib.h | 5 +++++ 2 files changed, 31 insertions(+), 7 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index e9f8b65563a1..93b112f3bc49 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -372,7 +372,7 @@ static bool dw8250_idma_filter(struct dma_chan *chan, void *param) static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) { struct device_node *np = p->dev->of_node; - unsigned long quirks = (unsigned long)device_get_match_data(p->dev); + unsigned int quirks = data->pdata->quirks; if (np) { int id; @@ -463,6 +463,7 @@ static int dw8250_probe(struct platform_device *pdev) data->data.dma.fn = dw8250_fallback_dma_filter; data->usr_reg = DW_UART_USR; + data->pdata = device_get_match_data(p->dev); p->private_data = &data->data; data->uart_16550_compatible = device_property_read_bool(dev, @@ -679,13 +680,31 @@ static const struct dev_pm_ops dw8250_pm_ops = { SET_RUNTIME_PM_OPS(dw8250_runtime_suspend, dw8250_runtime_resume, NULL) }; +static const struct dw8250_platform_data dw8250_dw_apb = { +}; + +static const struct dw8250_platform_data dw8250_octeon_3860_data = { + .quirks = DW_UART_QUIRK_OCTEON, +}; + +static const struct dw8250_platform_data dw8250_armada_38x_data = { + .quirks = DW_UART_QUIRK_ARMADA_38X, +}; + +static const struct dw8250_platform_data dw8250_renesas_rzn1_data = { +}; + +static const struct dw8250_platform_data dw8250_starfive_jh7100_data = { + .quirks = DW_UART_QUIRK_SKIP_SET_RATE, +}; + static const struct of_device_id dw8250_of_match[] = { - { .compatible = "snps,dw-apb-uart" }, - { .compatible = "cavium,octeon-3860-uart", .data = (void *)DW_UART_QUIRK_OCTEON }, - { .compatible = "marvell,armada-38x-uart", .data = (void *)DW_UART_QUIRK_ARMADA_38X }, - { .compatible = "renesas,rzn1-uart" }, - { .compatible = "starfive,jh7100-hsuart", .data = (void *)DW_UART_QUIRK_SKIP_SET_RATE }, - { .compatible = "starfive,jh7100-uart", .data = (void *)DW_UART_QUIRK_SKIP_SET_RATE }, + { .compatible = "snps,dw-apb-uart", .data = &dw8250_dw_apb }, + { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data }, + { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data }, + { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data }, + { .compatible = "starfive,jh7100-hsuart", .data = &dw8250_starfive_jh7100_data }, + { .compatible = "starfive,jh7100-uart", .data = &dw8250_starfive_jh7100_data }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, dw8250_of_match); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 72e7dbcccad0..68bb81bee660 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -21,8 +21,13 @@ struct dw8250_port_data { u8 dlf_size; }; +struct dw8250_platform_data { + unsigned int quirks; +}; + struct dw8250_data { struct dw8250_port_data data; + const struct dw8250_platform_data *pdata; u8 usr_reg; int msr_mask_on; From patchwork Wed Apr 13 07:51:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 563079 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82099C433F5 for ; Wed, 13 Apr 2022 07:52:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233524AbiDMHyY (ORCPT ); Wed, 13 Apr 2022 03:54:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46070 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233504AbiDMHyO (ORCPT ); Wed, 13 Apr 2022 03:54:14 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D91F52B24B; Wed, 13 Apr 2022 00:51:53 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id C1568FF80F; Wed, 13 Apr 2022 07:51:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649836312; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vPuYPzUCJIiRBLxRQdpRrYuxESn/7Z8jFgmSKedcXtE=; b=GF/eFfizenP2ulFukFVmg34iwAFaLrbo/H+YbHF0eTOzt7NO6iTkQcDpEQo6ytksc5HtiZ Wf2z+fizWX8Oap5h4yMm6UfA4qt0Kl0A2wrBAHP1jKfVWocWQyVTvcQI2XLruxQZ1PdbHf jZWihNLFBpabmOiH6OeZcmLt51Iht/yoGEwxJYksu281zrhxJAdrKyq+OPHHl1mac2/OcV Rx4sJqwNJccEn1flHmyxocezpKa414M70BRSBZfwxqVo3n3sLGcY70woKpqQI0gngkLbV+ 91YPtTPcMSMvlY6bbPH6eBGW6846ByaUqsJiCkMC2hGisE+uAnq7MySCnN/+Jg== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen Subject: [PATCH v5 04/11] serial: 8250: dw: Move the USR register to pdata Date: Wed, 13 Apr 2022 09:51:34 +0200 Message-Id: <20220413075141.72777-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220413075141.72777-1-miquel.raynal@bootlin.com> References: <20220413075141.72777-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org This offset is a good candidate to pdata's because it changes depending on the vendor implementation. Let's move the usr_reg entry from regular to pdata. This way we can drop initializing it at run time. Let's also use a define for it instead of defining only the default value. Suggested-by: Andy Shevchenko Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 11 ++++++++--- drivers/tty/serial/8250/8250_dwlib.h | 2 +- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 93b112f3bc49..babf5dc597a8 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -35,6 +35,8 @@ /* Offsets for the DesignWare specific registers */ #define DW_UART_USR 0x1f /* UART Status Register */ +#define OCTEON_UART_USR 0x27 /* UART Status Register */ + /* DesignWare specific register fields */ #define DW_UART_MCR_SIRE BIT(6) @@ -251,7 +253,7 @@ static int dw8250_handle_irq(struct uart_port *p) if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) { /* Clear the USR */ - (void)p->serial_in(p, d->usr_reg); + (void)p->serial_in(p, d->pdata->usr_reg); return 1; } @@ -387,7 +389,6 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) p->serial_out = dw8250_serial_outq; p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE; p->type = PORT_OCTEON; - data->usr_reg = 0x27; data->skip_autocfg = true; } #endif @@ -462,7 +463,6 @@ static int dw8250_probe(struct platform_device *pdev) return -ENOMEM; data->data.dma.fn = dw8250_fallback_dma_filter; - data->usr_reg = DW_UART_USR; data->pdata = device_get_match_data(p->dev); p->private_data = &data->data; @@ -681,20 +681,25 @@ static const struct dev_pm_ops dw8250_pm_ops = { }; static const struct dw8250_platform_data dw8250_dw_apb = { + .usr_reg = DW_UART_USR, }; static const struct dw8250_platform_data dw8250_octeon_3860_data = { + .usr_reg = OCTEON_UART_USR, .quirks = DW_UART_QUIRK_OCTEON, }; static const struct dw8250_platform_data dw8250_armada_38x_data = { + .usr_reg = DW_UART_USR, .quirks = DW_UART_QUIRK_ARMADA_38X, }; static const struct dw8250_platform_data dw8250_renesas_rzn1_data = { + .usr_reg = DW_UART_USR, }; static const struct dw8250_platform_data dw8250_starfive_jh7100_data = { + .usr_reg = DW_UART_USR, .quirks = DW_UART_QUIRK_SKIP_SET_RATE, }; diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 68bb81bee660..0df6baa6eaee 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -22,6 +22,7 @@ struct dw8250_port_data { }; struct dw8250_platform_data { + u8 usr_reg; unsigned int quirks; }; @@ -29,7 +30,6 @@ struct dw8250_data { struct dw8250_port_data data; const struct dw8250_platform_data *pdata; - u8 usr_reg; int msr_mask_on; int msr_mask_off; struct clk *clk; From patchwork Wed Apr 13 07:51:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 563078 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 987AAC433FE for ; Wed, 13 Apr 2022 07:52:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233527AbiDMHy0 (ORCPT ); Wed, 13 Apr 2022 03:54:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233512AbiDMHyU (ORCPT ); Wed, 13 Apr 2022 03:54:20 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97BB241FA4; Wed, 13 Apr 2022 00:51:59 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id DBB29FF806; Wed, 13 Apr 2022 07:51:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649836318; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XFiyV4hvI7uUiv0v2hsPJJtKWfdwUNh4ammNKKQDV1k=; b=AksRdt9mtefDnv7Vr9I75h0uLx9Q1EXWNfOD3T3SFyFOEp+4ipJ1vPUj8txNeYzJ6JkvMX uvMFw9lywS1SMf3Zm907G8OJvn7cqYsjVy9kqqUyhYp1V2GjCCoiQtKqNMhFneJHYDWSYd AoR29CYoeKQSZNVZQQ+7d5NOhneelI/gohx/jhz2GLjQhXTwhi1OVeE6AETOIk8YhbESz5 xI0Xfs7VAcRirv1K/V5sT+QP70LX7EviMc4t5x6Vao8WoFCvAytSaFchSfw0N3ld/im9wn qFzFMIVPSUCL84hdFUQAvmuUG5o1jSawZ4GCX47NS/cwIrPJDY4Fk3gs6F8qeQ== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen Subject: [PATCH v5 07/11] serial: 8250: dw: Introduce an rx_timeout variable in the IRQ path Date: Wed, 13 Apr 2022 09:51:37 +0200 Message-Id: <20220413075141.72777-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220413075141.72777-1-miquel.raynal@bootlin.com> References: <20220413075141.72777-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org In a next change we are going to need the same Rx timeout condition as we already have in the IRQ handling code. Let's just create a boolean to clarify what this operation does before reusing it. There is no functional change. Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index babf5dc597a8..238bcdf1bab0 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -225,6 +225,7 @@ static int dw8250_handle_irq(struct uart_port *p) struct uart_8250_port *up = up_to_u8250p(p); struct dw8250_data *d = to_dw8250_data(p->private_data); unsigned int iir = p->serial_in(p, UART_IIR); + bool rx_timeout = (iir & 0x3f) == UART_IIR_RX_TIMEOUT; unsigned int status; unsigned long flags; @@ -238,7 +239,7 @@ static int dw8250_handle_irq(struct uart_port *p) * This problem has only been observed so far when not in DMA mode * so we limit the workaround only to non-DMA mode. */ - if (!up->dma && ((iir & 0x3f) == UART_IIR_RX_TIMEOUT)) { + if (!up->dma && rx_timeout) { spin_lock_irqsave(&p->lock, flags); status = p->serial_in(p, UART_LSR); From patchwork Wed Apr 13 07:51:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 563077 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 126A4C433FE for ; Wed, 13 Apr 2022 07:52:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233533AbiDMHy2 (ORCPT ); Wed, 13 Apr 2022 03:54:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233523AbiDMHyX (ORCPT ); Wed, 13 Apr 2022 03:54:23 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50F482B24B; Wed, 13 Apr 2022 00:52:03 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 58714FF80A; Wed, 13 Apr 2022 07:52:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649836321; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TXqXnTic6cbbCVSdTgkEfuK3zR186Y8H8a/AYZ3ACOQ=; b=BQ/TippxmWDVK9UyIVKLA0sxQrCzdjqkYYIJ0waEcUpJbU8I93mNS3htd2/5ATgcl5H1a3 5t20o6/jriHp/Vg+fpTTZFAEwvxHQIVazIiL+vqcQ0iKIJUdKY59nydxh6a6U6eRzX55SJ Xsz2AeEQeEGyTnq9Io3Qg8WvH7ilAIvU/hXYK2YEauJ7XAp8jf2Wp5L+LYsdlxQ6EIn/5D 7iHJuaiUUpSLHi+pCzWJ+HsK5RLuMwxBT1D4wJJGExRkHuV5BagkLRQvyuLdQswBTlEF+y GJTf0kfwZhzsx+dmrDdkeg17Cfa1At3EJRjWf/Kv9mDLvwbMl89TbuOrEI9q6Q== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen , Phil Edworthy Subject: [PATCH v5 09/11] serial: 8250: dw: Add support for DMA flow controlling devices Date: Wed, 13 Apr 2022 09:51:39 +0200 Message-Id: <20220413075141.72777-10-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220413075141.72777-1-miquel.raynal@bootlin.com> References: <20220413075141.72777-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Phil Edworthy DW based controllers like the one on Renesas RZ/N1 must be programmed as flow controllers when using DMA. * Table 11.45 of the system manual, "Flow Control Combinations", states that using UART with DMA requires setting the DMA in the peripheral flow controller mode regardless of the direction. * Chapter 11.6.1.3 of the system manual, "Basic Interface Definitions", explains that the burst size in the above case must be configured in the peripheral's register DEST/SRC_BURST_SIZE. Experiments shown that upon Rx timeout, the DMA transaction needed to be manually cleared as well. Signed-off-by: Phil Edworthy Co-developed-by: Miquel Raynal Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 64 +++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 238bcdf1bab0..f8e762e3ef0f 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -34,16 +34,28 @@ /* Offsets for the DesignWare specific registers */ #define DW_UART_USR 0x1f /* UART Status Register */ +#define DW_UART_DMASA 0xa8 /* DMA Software Ack */ + +#define RZN1_UART_TDMACR 0x10c /* DMA Control Register Transmit Mode */ +#define RZN1_UART_RDMACR 0x110 /* DMA Control Register Receive Mode */ #define OCTEON_UART_USR 0x27 /* UART Status Register */ /* DesignWare specific register fields */ #define DW_UART_MCR_SIRE BIT(6) +/* Renesas specific register fields */ +#define RZN1_UART_xDMACR_DMA_EN BIT(0) +#define RZN1_UART_xDMACR_1_WORD_BURST (0 << 1) +#define RZN1_UART_xDMACR_4_WORD_BURST (1 << 1) +#define RZN1_UART_xDMACR_8_WORD_BURST (3 << 1) +#define RZN1_UART_xDMACR_BLK_SZ(x) ((x) << 3) + /* Quirks */ #define DW_UART_QUIRK_OCTEON BIT(0) #define DW_UART_QUIRK_ARMADA_38X BIT(1) #define DW_UART_QUIRK_SKIP_SET_RATE BIT(2) +#define DW_UART_QUIRK_IS_DMA_FC BIT(3) static inline struct dw8250_data *clk_to_dw8250_data(struct notifier_block *nb) { @@ -226,6 +238,7 @@ static int dw8250_handle_irq(struct uart_port *p) struct dw8250_data *d = to_dw8250_data(p->private_data); unsigned int iir = p->serial_in(p, UART_IIR); bool rx_timeout = (iir & 0x3f) == UART_IIR_RX_TIMEOUT; + unsigned int quirks = d->pdata->quirks; unsigned int status; unsigned long flags; @@ -249,6 +262,15 @@ static int dw8250_handle_irq(struct uart_port *p) spin_unlock_irqrestore(&p->lock, flags); } + /* Manually stop the Rx DMA transfer when acting as flow controller */ + if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) { + status = p->serial_in(p, UART_LSR); + if (status & (UART_LSR_DR | UART_LSR_BI)) { + dw8250_writel_ext(p, RZN1_UART_RDMACR, 0); + dw8250_writel_ext(p, DW_UART_DMASA, 1); + } + } + if (serial8250_handle_irq(p, iir)) return 1; @@ -372,6 +394,42 @@ static bool dw8250_idma_filter(struct dma_chan *chan, void *param) return param == chan->device->dev; } +static u32 dw8250_rzn1_get_dmacr_burst(int max_burst) +{ + if (max_burst >= 8) + return RZN1_UART_xDMACR_8_WORD_BURST; + else if (max_burst >= 4) + return RZN1_UART_xDMACR_4_WORD_BURST; + else + return RZN1_UART_xDMACR_1_WORD_BURST; +} + +static void dw8250_prepare_tx_dma(struct uart_8250_port *p) +{ + struct uart_port *up = &p->port; + struct uart_8250_dma *dma = p->dma; + u32 val; + + dw8250_writel_ext(up, RZN1_UART_TDMACR, 0); + val = dw8250_rzn1_get_dmacr_burst(dma->txconf.dst_maxburst) | + RZN1_UART_xDMACR_BLK_SZ(dma->tx_size) | + RZN1_UART_xDMACR_DMA_EN; + dw8250_writel_ext(up, RZN1_UART_TDMACR, val); +} + +static void dw8250_prepare_rx_dma(struct uart_8250_port *p) +{ + struct uart_port *up = &p->port; + struct uart_8250_dma *dma = p->dma; + u32 val; + + dw8250_writel_ext(up, RZN1_UART_RDMACR, 0); + val = dw8250_rzn1_get_dmacr_burst(dma->rxconf.src_maxburst) | + RZN1_UART_xDMACR_BLK_SZ(dma->rx_size) | + RZN1_UART_xDMACR_DMA_EN; + dw8250_writel_ext(up, RZN1_UART_RDMACR, val); +} + static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) { struct device_node *np = p->dev->of_node; @@ -404,6 +462,12 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) p->serial_out = dw8250_serial_out38x; if (quirks & DW_UART_QUIRK_SKIP_SET_RATE) p->set_termios = dw8250_do_set_termios; + if (quirks & DW_UART_QUIRK_IS_DMA_FC) { + data->data.dma.txconf.device_fc = 1; + data->data.dma.rxconf.device_fc = 1; + data->data.dma.prepare_tx_dma = dw8250_prepare_tx_dma; + data->data.dma.prepare_rx_dma = dw8250_prepare_rx_dma; + } } else if (acpi_dev_present("APMC0D08", NULL, -1)) { p->iotype = UPIO_MEM32; From patchwork Wed Apr 13 07:51:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 563076 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C142FC433F5 for ; Wed, 13 Apr 2022 07:52:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233507AbiDMHyg (ORCPT ); Wed, 13 Apr 2022 03:54:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230223AbiDMHyd (ORCPT ); Wed, 13 Apr 2022 03:54:33 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DFF9633356; Wed, 13 Apr 2022 00:52:06 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id C94A0FF806; Wed, 13 Apr 2022 07:52:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649836325; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/nh7f6/HuLMWiH/LM1IrO4PPA0OM/mrddN4VWrPik6E=; b=Lwwxhh+dnSvqEz+K+mijdMx6fFL5dVZ2n3TTqFTWg4L8AUJYvwRffinbzKafvrY6LCeFMg LJwZ7dsFN/5gc6AA7JPsoQbfC96k0h46tGmpm65d6RkvcS5F0bEF5NBWgdmy7gsDOWBm7B OV3SzcqmcVw2TbzSFSkLAO3LOzk59k9YzflK21xzLwS7UO+oNg45d8s9pigGC9m5qDOwPp 4RhhxLc+PYRe/z6THeNdjCMriku0vtlFJwmEDF0fXLl8Eyb1OI3PrIDR9CZdZRyKI+ydtI lIbNGkop3CxEKY0ZDlU1GzWfDpmCbarICGiWbCwnT2prLB6367RSIJmu0pEHwQ== From: Miquel Raynal To: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby Cc: Miquel Raynal , Andy Shevchenko , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Ilpo Jarvinen Subject: [PATCH v5 11/11] ARM: dts: r9a06g032: Fill the UART DMA properties Date: Wed, 13 Apr 2022 09:51:41 +0200 Message-Id: <20220413075141.72777-12-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220413075141.72777-1-miquel.raynal@bootlin.com> References: <20220413075141.72777-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org UART 0 to 2 do not have DMA support, while UART 3 to 7 do. Fill the "dmas" and "dma-names" properties for each of these nodes. Please mind that these nodes go through the dmamux node which will redirect the requests to the right DMA controller. The first 4 cells of the "dmas" properties will be transferred as-is to the DMA controllers. The last 2 cells are consumed by the dmamux. Which means cell 0 and 4 are almost redundant, one giving the controller request ID and the other the dmamux channel which is a 1:1 translation of the request IDs, shifted by 16 when pointing to the second DMA controller. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/r9a06g032.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index c854aa4cfa77..4288b935fcea 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -144,6 +144,9 @@ uart3: serial@50000000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART3>, <&sysctrl R9A06G032_HCLK_UART3>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 0 0 0 0 0 1>, + <&dmamux 1 0 0 0 1 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -155,6 +158,9 @@ uart4: serial@50001000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART4>, <&sysctrl R9A06G032_HCLK_UART4>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 2 0 0 0 2 1>, + <&dmamux 3 0 0 0 3 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -166,6 +172,9 @@ uart5: serial@50002000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART5>, <&sysctrl R9A06G032_HCLK_UART5>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 4 0 0 0 4 1>, + <&dmamux 5 0 0 0 5 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -177,6 +186,9 @@ uart6: serial@50003000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART6>, <&sysctrl R9A06G032_HCLK_UART6>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 6 0 0 0 6 1>, + <&dmamux 7 0 0 0 7 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -188,6 +200,9 @@ uart7: serial@50004000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART7>, <&sysctrl R9A06G032_HCLK_UART7>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 4 0 0 0 20 1>, + <&dmamux 5 0 0 0 21 1>; + dma-names = "rx", "tx"; status = "disabled"; };