From patchwork Wed Apr 13 08:37:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas tanure X-Patchwork-Id: 561006 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF272C433F5 for ; Wed, 13 Apr 2022 08:37:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233853AbiDMIkR (ORCPT ); Wed, 13 Apr 2022 04:40:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233725AbiDMIkM (ORCPT ); Wed, 13 Apr 2022 04:40:12 -0400 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7FA03D1C1; Wed, 13 Apr 2022 01:37:51 -0700 (PDT) Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 23D8Z6Rg011523; Wed, 13 Apr 2022 03:37:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=fQyvszLtolR9pP+GhC/k1mSInQzeGXWFii3sFSxKtak=; b=q5gEaoiZOq6VurMNjuxErrx+n30dJUZNhczpLcMvh0I40v1kdUbwaeIdWqn0EWshlsyg Q6tiD+iXmfFSZDGQbxE9HKoefOMJQvgSosExkrXNKnIUwAZFHhpYwuRfrNFBdXOtJWnb gQ9b3X1WrjZYSGPPKyxeivHi9sEkPwYrFksR9LjdXlQUuHFKFAYUxgA7TWS/eFUzarvg QKtI2mBhk9vfcNVa+eY4yIdFQoBhyNuvSIOSVuKKo6UQlAm4jWlrMKN4l9dTg18CjI8B hVJr989GFW5LWJ6PsA1UY+elQKKEVfGTozOk5qb3Txc/Gs/+5l/9HGNprDOSD1LPw6Ax CA== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 3fb6pycvcv-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Wed, 13 Apr 2022 03:37:32 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Wed, 13 Apr 2022 09:37:30 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.24 via Frontend Transport; Wed, 13 Apr 2022 09:37:30 +0100 Received: from aryzen.ad.cirrus.com (unknown [198.61.64.152]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 19B2FB1A; Wed, 13 Apr 2022 08:37:30 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure , Charles Keepax Subject: [PATCH v7 02/16] ALSA: cs35l41: Check hw_config before using it Date: Wed, 13 Apr 2022 09:37:14 +0100 Message-ID: <20220413083728.10730-3-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220413083728.10730-1-tanureal@opensource.cirrus.com> References: <20220413083728.10730-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 4fP794nCeo_ZVecntG8xo1dl2eM-uUkX X-Proofpoint-GUID: 4fP794nCeo_ZVecntG8xo1dl2eM-uUkX X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The driver can receive an empty hw_config, so mark as valid if successfully read from device tree/ACPI or set by the driver itself. Platforms not marked with a valid hw config will not be supported. Signed-off-by: Lucas Tanure Acked-by: Charles Keepax --- include/sound/cs35l41.h | 3 +- sound/pci/hda/cs35l41_hda.c | 70 +++++++++++++++++++------------ sound/soc/codecs/cs35l41-lib.c | 16 ++++--- sound/soc/codecs/cs35l41.c | 76 +++++++++++++++++++++------------- 4 files changed, 104 insertions(+), 61 deletions(-) diff --git a/include/sound/cs35l41.h b/include/sound/cs35l41.h index abcf850f7110..4200379e0c26 100644 --- a/include/sound/cs35l41.h +++ b/include/sound/cs35l41.h @@ -538,7 +538,6 @@ #define CS35L41_OTP_SIZE_WORDS 32 #define CS35L41_NUM_OTP_ELEM 100 -#define CS35L41_VALID_PDATA 0x80000000 #define CS35L41_NUM_SUPPLIES 2 #define CS35L41_SCLK_MSTR_MASK 0x10 @@ -753,12 +752,14 @@ enum cs35l41_gpio2_func { }; struct cs35l41_gpio_cfg { + bool valid; bool pol_inv; bool out_en; unsigned int func; }; struct cs35l41_hw_cfg { + bool valid; int bst_ind; int bst_ipk; int bst_cap; diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index b79d6ad4b4f5..a14ad3b0d516 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -219,46 +219,52 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) bool internal_boost = false; int ret; + if (!cs35l41->hw_cfg.valid) + return -EINVAL; + if (hw_cfg->vspk_always_on) { cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst; return 0; } - if (hw_cfg->bst_ind || hw_cfg->bst_cap || hw_cfg->bst_ipk) + if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0) internal_boost = true; - switch (hw_cfg->gpio1.func) { - case CS35L41_NOT_USED: - break; - case CS35l41_VSPK_SWITCH: - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO1_CTRL_MASK, 1 << CS35L41_GPIO1_CTRL_SHIFT); - break; - case CS35l41_SYNC: - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO1_CTRL_MASK, 2 << CS35L41_GPIO1_CTRL_SHIFT); - break; - default: - dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n", hw_cfg->gpio1.func); - return -EINVAL; + if (hw_cfg->gpio1.valid) { + switch (hw_cfg->gpio1.func) { + case CS35L41_NOT_USED: + break; + case CS35l41_VSPK_SWITCH: + regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, + CS35L41_GPIO1_CTRL_MASK, 1 << CS35L41_GPIO1_CTRL_SHIFT); + break; + case CS35l41_SYNC: + regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, + CS35L41_GPIO1_CTRL_MASK, 2 << CS35L41_GPIO1_CTRL_SHIFT); + break; + default: + dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n", + hw_cfg->gpio1.func); + return -EINVAL; + } } - switch (hw_cfg->gpio2.func) { - case CS35L41_NOT_USED: - break; - case CS35L41_INTERRUPT: - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO2_CTRL_MASK, 2 << CS35L41_GPIO2_CTRL_SHIFT); - break; - default: - dev_err(cs35l41->dev, "Invalid function %d for GPIO2\n", hw_cfg->gpio2.func); - return -EINVAL; + if (hw_cfg->gpio2.valid) { + switch (hw_cfg->gpio2.func) { + case CS35L41_NOT_USED: + break; + case CS35L41_INTERRUPT: + regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, + CS35L41_GPIO2_CTRL_MASK, 2 << CS35L41_GPIO2_CTRL_SHIFT); + break; + default: + dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func); + return -EINVAL; + } } if (internal_boost) { cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst; - if (!(hw_cfg->bst_ind && hw_cfg->bst_cap && hw_cfg->bst_ipk)) - return -EINVAL; ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk); if (ret) @@ -334,28 +340,37 @@ static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, i if (ret) goto err; hw_cfg->gpio1.func = values[cs35l41->index]; + hw_cfg->gpio1.valid = true; property = "cirrus,gpio2-func"; ret = device_property_read_u32_array(physdev, property, values, nval); if (ret) goto err; hw_cfg->gpio2.func = values[cs35l41->index]; + hw_cfg->gpio2.valid = true; property = "cirrus,boost-peak-milliamp"; ret = device_property_read_u32_array(physdev, property, values, nval); if (ret == 0) hw_cfg->bst_ipk = values[cs35l41->index]; + else + hw_cfg->bst_ipk = -1; property = "cirrus,boost-ind-nanohenry"; ret = device_property_read_u32_array(physdev, property, values, nval); if (ret == 0) hw_cfg->bst_ind = values[cs35l41->index]; + else + hw_cfg->bst_ind = -1; property = "cirrus,boost-cap-microfarad"; ret = device_property_read_u32_array(physdev, property, values, nval); if (ret == 0) hw_cfg->bst_cap = values[cs35l41->index]; + else + hw_cfg->bst_cap = -1; + hw_cfg->valid = true; put_device(physdev); return 0; @@ -381,6 +396,7 @@ static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, i cs35l41->index = id == 0x40 ? 0 : 1; cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH); cs35l41->hw_cfg.vspk_always_on = true; + cs35l41->hw_cfg.valid = true; put_device(physdev); return 0; diff --git a/sound/soc/codecs/cs35l41-lib.c b/sound/soc/codecs/cs35l41-lib.c index e5a56bcbb223..905c648a8f49 100644 --- a/sound/soc/codecs/cs35l41-lib.c +++ b/sound/soc/codecs/cs35l41-lib.c @@ -992,10 +992,20 @@ int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_in case 101 ... 200: bst_cbst_range = 3; break; - default: /* 201 uF and greater */ + default: + if (boost_cap < 0) { + dev_err(dev, "Invalid boost capacitor value: %d nH\n", boost_cap); + return -EINVAL; + } + /* 201 uF and greater */ bst_cbst_range = 4; } + if (boost_ipk < 1600 || boost_ipk > 4500) { + dev_err(dev, "Invalid boost inductor peak current: %d mA\n", boost_ipk); + return -EINVAL; + } + ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_COEFF, CS35L41_BST_K1_MASK | CS35L41_BST_K2_MASK, cs35l41_bst_k1_table[bst_lbst_val][bst_cbst_range] @@ -1017,10 +1027,6 @@ int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_in return ret; } - if (boost_ipk < 1600 || boost_ipk > 4500) { - dev_err(dev, "Invalid boost inductor peak current: %d mA\n", boost_ipk); - return -EINVAL; - } bst_ipk_scaled = ((boost_ipk - 1600) / 50) + 0x10; ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_PEAK_CUR, CS35L41_BST_IPK_MASK, diff --git a/sound/soc/codecs/cs35l41.c b/sound/soc/codecs/cs35l41.c index e76b93c15106..90dec80707ea 100644 --- a/sound/soc/codecs/cs35l41.c +++ b/sound/soc/codecs/cs35l41.c @@ -995,28 +995,24 @@ static int cs35l41_dai_set_sysclk(struct snd_soc_dai *dai, static int cs35l41_set_pdata(struct cs35l41_private *cs35l41) { + struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; int ret; - /* Set Platform Data */ - /* Required */ - if (cs35l41->hw_cfg.bst_ipk && - cs35l41->hw_cfg.bst_ind && cs35l41->hw_cfg.bst_cap) { - ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, cs35l41->hw_cfg.bst_ind, - cs35l41->hw_cfg.bst_cap, cs35l41->hw_cfg.bst_ipk); - if (ret) { - dev_err(cs35l41->dev, "Error in Boost DT config: %d\n", ret); - return ret; - } - } else { - dev_err(cs35l41->dev, "Incomplete Boost component DT config\n"); + if (!hw_cfg->valid) return -EINVAL; + + /* Required */ + ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, + hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk); + if (ret) { + dev_err(cs35l41->dev, "Error in Boost DT config: %d\n", ret); + return ret; } /* Optional */ - if (cs35l41->hw_cfg.dout_hiz <= CS35L41_ASP_DOUT_HIZ_MASK && - cs35l41->hw_cfg.dout_hiz >= 0) + if (hw_cfg->dout_hiz <= CS35L41_ASP_DOUT_HIZ_MASK && hw_cfg->dout_hiz >= 0) regmap_update_bits(cs35l41->regmap, CS35L41_SP_HIZ_CTRL, CS35L41_ASP_DOUT_HIZ_MASK, - cs35l41->hw_cfg.dout_hiz); + hw_cfg->dout_hiz); return 0; } @@ -1037,16 +1033,28 @@ static int cs35l41_gpio_config(struct cs35l41_private *cs35l41) gpio2->pol_inv << CS35L41_GPIO_POL_SHIFT | !gpio2->out_en << CS35L41_GPIO_DIR_SHIFT); - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO1_CTRL_MASK | CS35L41_GPIO2_CTRL_MASK, - gpio1->func << CS35L41_GPIO1_CTRL_SHIFT | - gpio2->func << CS35L41_GPIO2_CTRL_SHIFT); + if (gpio1->valid) + regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, + CS35L41_GPIO1_CTRL_MASK, + gpio1->func << CS35L41_GPIO1_CTRL_SHIFT); - if ((gpio2->func == (CS35L41_GPIO2_INT_PUSH_PULL_LOW | CS35L41_VALID_PDATA)) || - (gpio2->func == (CS35L41_GPIO2_INT_OPEN_DRAIN | CS35L41_VALID_PDATA))) - irq_pol = IRQF_TRIGGER_LOW; - else if (gpio2->func == (CS35L41_GPIO2_INT_PUSH_PULL_HIGH | CS35L41_VALID_PDATA)) - irq_pol = IRQF_TRIGGER_HIGH; + if (gpio2->valid) { + regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, + CS35L41_GPIO2_CTRL_MASK, + gpio2->func << CS35L41_GPIO2_CTRL_SHIFT); + + switch (gpio2->func) { + case CS35L41_GPIO2_INT_PUSH_PULL_LOW: + case CS35L41_GPIO2_INT_OPEN_DRAIN: + irq_pol = IRQF_TRIGGER_LOW; + break; + case CS35L41_GPIO2_INT_PUSH_PULL_HIGH: + irq_pol = IRQF_TRIGGER_HIGH; + break; + default: + break; + } + } return irq_pol; } @@ -1121,14 +1129,20 @@ static int cs35l41_handle_pdata(struct device *dev, struct cs35l41_hw_cfg *hw_cf ret = device_property_read_u32(dev, "cirrus,boost-peak-milliamp", &val); if (ret >= 0) hw_cfg->bst_ipk = val; + else + hw_cfg->bst_ipk = -1; ret = device_property_read_u32(dev, "cirrus,boost-ind-nanohenry", &val); if (ret >= 0) hw_cfg->bst_ind = val; + else + hw_cfg->bst_ind = -1; ret = device_property_read_u32(dev, "cirrus,boost-cap-microfarad", &val); if (ret >= 0) hw_cfg->bst_cap = val; + else + hw_cfg->bst_cap = -1; ret = device_property_read_u32(dev, "cirrus,asp-sdout-hiz", &val); if (ret >= 0) @@ -1140,15 +1154,21 @@ static int cs35l41_handle_pdata(struct device *dev, struct cs35l41_hw_cfg *hw_cf gpio1->pol_inv = device_property_read_bool(dev, "cirrus,gpio1-polarity-invert"); gpio1->out_en = device_property_read_bool(dev, "cirrus,gpio1-output-enable"); ret = device_property_read_u32(dev, "cirrus,gpio1-src-select", &val); - if (ret >= 0) - gpio1->func = val | CS35L41_VALID_PDATA; + if (ret >= 0) { + gpio1->func = val; + gpio1->valid = true; + } /* GPIO2 Pin Config */ gpio2->pol_inv = device_property_read_bool(dev, "cirrus,gpio2-polarity-invert"); gpio2->out_en = device_property_read_bool(dev, "cirrus,gpio2-output-enable"); ret = device_property_read_u32(dev, "cirrus,gpio2-src-select", &val); - if (ret >= 0) - gpio2->func = val | CS35L41_VALID_PDATA; + if (ret >= 0) { + gpio2->func = val; + gpio2->valid = true; + } + + hw_cfg->valid = true; return 0; } From patchwork Wed Apr 13 08:37:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas tanure X-Patchwork-Id: 561007 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67D77C433FE for ; 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Wed, 13 Apr 2022 08:37:30 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure , Charles Keepax Subject: [PATCH v7 03/16] ALSA: cs35l41: Move cs35l41_gpio_config to shared lib Date: Wed, 13 Apr 2022 09:37:15 +0100 Message-ID: <20220413083728.10730-4-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220413083728.10730-1-tanureal@opensource.cirrus.com> References: <20220413083728.10730-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 1yNcbAW7PvUPf5I0FELRW0b5xYyGovpU X-Proofpoint-GUID: 1yNcbAW7PvUPf5I0FELRW0b5xYyGovpU X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org ASoC and HDA can use a single function to configure the chip gpios. Signed-off-by: Lucas Tanure Acked-by: Charles Keepax --- include/sound/cs35l41.h | 1 + sound/pci/hda/cs35l41_hda.c | 11 ++++----- sound/soc/codecs/cs35l41-lib.c | 41 +++++++++++++++++++++++++++++++ sound/soc/codecs/cs35l41.c | 44 +--------------------------------- 4 files changed, 48 insertions(+), 49 deletions(-) diff --git a/include/sound/cs35l41.h b/include/sound/cs35l41.h index 4200379e0c26..e312eb1f6e48 100644 --- a/include/sound/cs35l41.h +++ b/include/sound/cs35l41.h @@ -798,5 +798,6 @@ int cs35l41_set_channels(struct device *dev, struct regmap *reg, unsigned int rx_num, unsigned int *rx_slot); int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_ind, int boost_cap, int boost_ipk); +int cs35l41_gpio_config(struct regmap *regmap, struct cs35l41_hw_cfg *hw_cfg); #endif /* __CS35L41_H */ diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index a14ad3b0d516..e00ceaca79c0 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -235,12 +235,11 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) case CS35L41_NOT_USED: break; case CS35l41_VSPK_SWITCH: - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO1_CTRL_MASK, 1 << CS35L41_GPIO1_CTRL_SHIFT); + hw_cfg->gpio1.func = CS35L41_GPIO1_GPIO; + hw_cfg->gpio1.out_en = true; break; case CS35l41_SYNC: - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO1_CTRL_MASK, 2 << CS35L41_GPIO1_CTRL_SHIFT); + hw_cfg->gpio1.func = CS35L41_GPIO1_MDSYNC; break; default: dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n", @@ -254,8 +253,6 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) case CS35L41_NOT_USED: break; case CS35L41_INTERRUPT: - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO2_CTRL_MASK, 2 << CS35L41_GPIO2_CTRL_SHIFT); break; default: dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func); @@ -263,6 +260,8 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) } } + cs35l41_gpio_config(cs35l41->regmap, hw_cfg); + if (internal_boost) { cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst; ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, diff --git a/sound/soc/codecs/cs35l41-lib.c b/sound/soc/codecs/cs35l41-lib.c index 905c648a8f49..eeeaeaa0db82 100644 --- a/sound/soc/codecs/cs35l41-lib.c +++ b/sound/soc/codecs/cs35l41-lib.c @@ -1040,6 +1040,47 @@ int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_in } EXPORT_SYMBOL_GPL(cs35l41_boost_config); +int cs35l41_gpio_config(struct regmap *regmap, struct cs35l41_hw_cfg *hw_cfg) +{ + struct cs35l41_gpio_cfg *gpio1 = &hw_cfg->gpio1; + struct cs35l41_gpio_cfg *gpio2 = &hw_cfg->gpio2; + int irq_pol = IRQF_TRIGGER_NONE; + + regmap_update_bits(regmap, CS35L41_GPIO1_CTRL1, + CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK, + gpio1->pol_inv << CS35L41_GPIO_POL_SHIFT | + !gpio1->out_en << CS35L41_GPIO_DIR_SHIFT); + + regmap_update_bits(regmap, CS35L41_GPIO2_CTRL1, + CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK, + gpio2->pol_inv << CS35L41_GPIO_POL_SHIFT | + !gpio2->out_en << CS35L41_GPIO_DIR_SHIFT); + + if (gpio1->valid) + regmap_update_bits(regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO1_CTRL_MASK, + gpio1->func << CS35L41_GPIO1_CTRL_SHIFT); + + if (gpio2->valid) { + regmap_update_bits(regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO2_CTRL_MASK, + gpio2->func << CS35L41_GPIO2_CTRL_SHIFT); + + switch (gpio2->func) { + case CS35L41_GPIO2_INT_PUSH_PULL_LOW: + case CS35L41_GPIO2_INT_OPEN_DRAIN: + irq_pol = IRQF_TRIGGER_LOW; + break; + case CS35L41_GPIO2_INT_PUSH_PULL_HIGH: + irq_pol = IRQF_TRIGGER_HIGH; + break; + default: + break; + } + } + + return irq_pol; +} +EXPORT_SYMBOL_GPL(cs35l41_gpio_config); + MODULE_DESCRIPTION("CS35L41 library"); MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, "); MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, "); diff --git a/sound/soc/codecs/cs35l41.c b/sound/soc/codecs/cs35l41.c index 90dec80707ea..d25689fe0c60 100644 --- a/sound/soc/codecs/cs35l41.c +++ b/sound/soc/codecs/cs35l41.c @@ -1017,48 +1017,6 @@ static int cs35l41_set_pdata(struct cs35l41_private *cs35l41) return 0; } -static int cs35l41_gpio_config(struct cs35l41_private *cs35l41) -{ - struct cs35l41_gpio_cfg *gpio1 = &cs35l41->hw_cfg.gpio1; - struct cs35l41_gpio_cfg *gpio2 = &cs35l41->hw_cfg.gpio2; - int irq_pol = IRQF_TRIGGER_NONE; - - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO1_CTRL1, - CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK, - gpio1->pol_inv << CS35L41_GPIO_POL_SHIFT | - !gpio1->out_en << CS35L41_GPIO_DIR_SHIFT); - - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO2_CTRL1, - CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK, - gpio2->pol_inv << CS35L41_GPIO_POL_SHIFT | - !gpio2->out_en << CS35L41_GPIO_DIR_SHIFT); - - if (gpio1->valid) - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO1_CTRL_MASK, - gpio1->func << CS35L41_GPIO1_CTRL_SHIFT); - - if (gpio2->valid) { - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO2_CTRL_MASK, - gpio2->func << CS35L41_GPIO2_CTRL_SHIFT); - - switch (gpio2->func) { - case CS35L41_GPIO2_INT_PUSH_PULL_LOW: - case CS35L41_GPIO2_INT_OPEN_DRAIN: - irq_pol = IRQF_TRIGGER_LOW; - break; - case CS35L41_GPIO2_INT_PUSH_PULL_HIGH: - irq_pol = IRQF_TRIGGER_HIGH; - break; - default: - break; - } - } - - return irq_pol; -} - static int cs35l41_component_probe(struct snd_soc_component *component) { struct cs35l41_private *cs35l41 = snd_soc_component_get_drvdata(component); @@ -1366,7 +1324,7 @@ int cs35l41_probe(struct cs35l41_private *cs35l41, const struct cs35l41_hw_cfg * cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); - irq_pol = cs35l41_gpio_config(cs35l41); + irq_pol = cs35l41_gpio_config(cs35l41->regmap, &cs35l41->hw_cfg); /* Set interrupt masks for critical errors */ regmap_write(cs35l41->regmap, CS35L41_IRQ1_MASK1, From patchwork Wed Apr 13 08:37:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas tanure X-Patchwork-Id: 561009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C8E3C433EF for ; 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Wed, 13 Apr 2022 08:37:30 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure Subject: [PATCH v7 04/16] ALSA: hda: cs35l41: Fix I2S params comments Date: Wed, 13 Apr 2022 09:37:16 +0100 Message-ID: <20220413083728.10730-5-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220413083728.10730-1-tanureal@opensource.cirrus.com> References: <20220413083728.10730-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: H3oxFV2M5zzfSskjwO7XlIsx7J6CmRKH X-Proofpoint-GUID: H3oxFV2M5zzfSskjwO7XlIsx7J6CmRKH X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fix clock and slot size comments Signed-off-by: Lucas Tanure --- sound/pci/hda/cs35l41_hda.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index e00ceaca79c0..d2addae8c085 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -17,11 +17,11 @@ #include "cs35l41_hda.h" static const struct reg_sequence cs35l41_hda_config[] = { - { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3200000Hz, BCLK Input, PLL_REFCLK_EN = 1 + { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1 { CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz { CS35L41_SP_ENABLES, 0x00010000 }, // ASP_RX1_EN = 1 { CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz - { CS35L41_SP_FORMAT, 0x20200200 }, // 24 bits, I2S, BCLK Slave, FSYNC Slave + { CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer { CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1 { CS35L41_AMP_DIG_VOL_CTRL, 0x00000000 }, // AMP_VOL_PCM 0.0 dB { CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB From patchwork Wed Apr 13 08:37:18 2022 Content-Type: text/plain; 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Wed, 13 Apr 2022 09:37:31 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.24 via Frontend Transport; Wed, 13 Apr 2022 09:37:31 +0100 Received: from aryzen.ad.cirrus.com (unknown [198.61.64.152]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 806A4B1A; Wed, 13 Apr 2022 08:37:31 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure Subject: [PATCH v7 06/16] ALSA: hda: cs35l41: Add Boost type flag Date: Wed, 13 Apr 2022 09:37:18 +0100 Message-ID: <20220413083728.10730-7-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220413083728.10730-1-tanureal@opensource.cirrus.com> References: <20220413083728.10730-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: Y_7OOnZW_6f3cu2C1r3Cz78iKZGTOl70 X-Proofpoint-GUID: Y_7OOnZW_6f3cu2C1r3Cz78iKZGTOl70 X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Replace vspk_always_on by a enum that better characterizes the boost type, as there is 3 types of boost hardware. And with the new boost type other parts of the driver can better handle the configuration of the chip. Signed-off-by: Lucas Tanure --- include/sound/cs35l41.h | 9 ++++++-- sound/pci/hda/cs35l41_hda.c | 43 +++++++++++++++++++++---------------- 2 files changed, 31 insertions(+), 21 deletions(-) diff --git a/include/sound/cs35l41.h b/include/sound/cs35l41.h index e312eb1f6e48..64d98cbd5c0e 100644 --- a/include/sound/cs35l41.h +++ b/include/sound/cs35l41.h @@ -725,6 +725,12 @@ #define CS35L41_SPI_MAX_FREQ 4000000 #define CS35L41_REGSTRIDE 4 +enum cs35l41_boost_type { + CS35L41_INT_BOOST, + CS35L41_EXT_BOOST, + CS35L41_EXT_BOOST_NO_VSPK_SWITCH, +}; + enum cs35l41_clk_ids { CS35L41_CLKID_SCLK = 0, CS35L41_CLKID_LRCLK = 1, @@ -768,8 +774,7 @@ struct cs35l41_hw_cfg { struct cs35l41_gpio_cfg gpio2; unsigned int spk_pos; - /* Don't put the AMP in reset if VSPK can not be turned off */ - bool vspk_always_on; + enum cs35l41_boost_type bst_type; }; struct cs35l41_otp_packed_element_t { diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index f853530eb385..0dac622805c4 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -210,20 +210,30 @@ static const struct component_ops cs35l41_hda_comp_ops = { static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) { struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; - bool internal_boost = false; int ret; if (!cs35l41->hw_cfg.valid) return -EINVAL; - if (hw_cfg->vspk_always_on) { + switch (hw_cfg->bst_type) { + case CS35L41_INT_BOOST: + cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst; + ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, + hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk); + if (ret) + return ret; + break; + case CS35L41_EXT_BOOST: + cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst; + break; + case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst; - return 0; + break; + default: + dev_err(cs35l41->dev, "Boost type %d not supported\n", hw_cfg->bst_type); + return -EINVAL; } - if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0) - internal_boost = true; - if (hw_cfg->gpio1.valid) { switch (hw_cfg->gpio1.func) { case CS35L41_NOT_USED: @@ -256,16 +266,6 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) cs35l41_gpio_config(cs35l41->regmap, hw_cfg); - if (internal_boost) { - cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst; - ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, - hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk); - if (ret) - return ret; - } else { - cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst; - } - return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos); } @@ -363,6 +363,11 @@ static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, i else hw_cfg->bst_cap = -1; + if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0) + hw_cfg->bst_type = CS35L41_INT_BOOST; + else + hw_cfg->bst_type = CS35L41_EXT_BOOST; + hw_cfg->valid = true; put_device(physdev); @@ -388,7 +393,7 @@ static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, i /* check I2C address to assign the index */ cs35l41->index = id == 0x40 ? 0 : 1; cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH); - cs35l41->hw_cfg.vspk_always_on = true; + cs35l41->hw_cfg.bst_type = CS35L41_EXT_BOOST_NO_VSPK_SWITCH; cs35l41->hw_cfg.valid = true; put_device(physdev); @@ -515,7 +520,7 @@ int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int i return 0; err: - if (!cs35l41->hw_cfg.vspk_always_on) + if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH) gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); gpiod_put(cs35l41->reset_gpio); @@ -529,7 +534,7 @@ void cs35l41_hda_remove(struct device *dev) component_del(cs35l41->dev, &cs35l41_hda_comp_ops); - if (!cs35l41->hw_cfg.vspk_always_on) + if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH) gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); gpiod_put(cs35l41->reset_gpio); } From patchwork Wed Apr 13 08:37:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas tanure X-Patchwork-Id: 561008 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA74CC433EF for ; Wed, 13 Apr 2022 08:37:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233763AbiDMIkN (ORCPT ); Wed, 13 Apr 2022 04:40:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50494 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233099AbiDMIkL (ORCPT ); Wed, 13 Apr 2022 04:40:11 -0400 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 180E93D1DA; Wed, 13 Apr 2022 01:37:51 -0700 (PDT) Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 23D8Z6Rm011523; Wed, 13 Apr 2022 03:37:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=JB5Nxxb7PP2Z+8zfdlJ3ArDwBK5Xe14Kzd8YYMR9nwk=; b=BzpstBKiqTVP9JHegD564LGnayCIdalXnjW/yVoFAdbvyauQqsxNXCVXPqcOfhMHKsLY 6h2b0O+TQ7tOTzAbWwvbWInSo+heyJvS/6u59bUKiOI+HXkdA1Gzj5FKJTI2bauSZ6O+ g28/xMDe/3wZ3sM7OP/uEq/IBdXdHMAwzI9OqTPk9db4dwYhMM/V+S1VfPxXxswcm4co CsszU3qsIxUsH+uxO2Hw8SlBvD4Hgq82dsITsTD/N6ZJYwBaNucuOYNOMH6fpKUcnZk9 WxxLOLl1umEPWwgCFTSiHSlKf7kYAzV9zeT2q33V7rUSUCzs3YPtINdh5+QQG/Svq6Sf lg== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 3fb6pycvcv-8 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Wed, 13 Apr 2022 03:37:36 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Wed, 13 Apr 2022 09:37:33 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.24 via Frontend Transport; Wed, 13 Apr 2022 09:37:33 +0100 Received: from aryzen.ad.cirrus.com (unknown [198.61.64.152]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id DC286B06; Wed, 13 Apr 2022 08:37:32 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure Subject: [PATCH v7 10/16] ALSA: hda: cs35l41: Move boost config to initialization code Date: Wed, 13 Apr 2022 09:37:22 +0100 Message-ID: <20220413083728.10730-11-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220413083728.10730-1-tanureal@opensource.cirrus.com> References: <20220413083728.10730-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: BQLcXDiL9yYfQjysnCyqn4eTmdXv-yNB X-Proofpoint-GUID: BQLcXDiL9yYfQjysnCyqn4eTmdXv-yNB X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Having CS35L41_PWR_CTRL2 on cs35l41_hda_config overwrites the boost configuration for internal boost. So move it to the initialization part and use regmap_update_bits to only change the correct bits. Signed-off-by: Lucas Tanure --- include/sound/cs35l41.h | 1 + sound/pci/hda/cs35l41_hda.c | 13 ++++++++----- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/include/sound/cs35l41.h b/include/sound/cs35l41.h index 64d98cbd5c0e..7d892c97b1e8 100644 --- a/include/sound/cs35l41.h +++ b/include/sound/cs35l41.h @@ -661,6 +661,7 @@ #define CS35L41_GLOBAL_EN_SHIFT 0 #define CS35L41_BST_EN_MASK 0x0030 #define CS35L41_BST_EN_SHIFT 4 +#define CS35L41_BST_DIS_FET_OFF 0x00 #define CS35L41_BST_EN_DEFAULT 0x2 #define CS35L41_AMP_EN_SHIFT 0 #define CS35L41_AMP_EN_MASK 1 diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index 0709d09f4e13..6e82ab9517f0 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -25,7 +25,6 @@ static const struct reg_sequence cs35l41_hda_config[] = { { CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1 { CS35L41_AMP_DIG_VOL_CTRL, 0x00000000 }, // AMP_VOL_PCM 0.0 dB { CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB - { CS35L41_PWR_CTRL2, 0x00000001 }, // AMP_EN = 1 }; static const struct reg_sequence cs35l41_hda_mute[] = { @@ -34,7 +33,6 @@ static const struct reg_sequence cs35l41_hda_mute[] = { }; static const struct reg_sequence cs35l41_hda_start_bst[] = { - { CS35L41_PWR_CTRL2, 0x00000021 }, // BST_EN = 10, AMP_EN = 1 { CS35L41_PWR_CTRL1, 0x00000001, 3000}, // set GLOBAL_EN = 1 }; @@ -94,7 +92,6 @@ static const struct reg_sequence cs35l41_active_to_safe[] = { { 0x00000040, 0x00000055 }, { 0x00000040, 0x000000AA }, { 0x00007438, 0x00585941 }, - { CS35L41_PWR_CTRL2, 0x00000000 }, // AMP_EN = 0 { CS35L41_PWR_CTRL1, 0x00000000 }, { 0x0000742C, 0x00000009, 2000 }, { 0x00007438, 0x00580941 }, @@ -144,6 +141,8 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) case HDA_GEN_PCM_ACT_OPEN: ret = regmap_multi_reg_write(reg, cs35l41_hda_config, ARRAY_SIZE(cs35l41_hda_config)); + regmap_update_bits(reg, CS35L41_PWR_CTRL2, + CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT); break; case HDA_GEN_PCM_ACT_PREPARE: if (reg_seq->prepare) @@ -155,6 +154,8 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) ret = regmap_multi_reg_write(reg, reg_seq->cleanup, reg_seq->num_cleanup); break; case HDA_GEN_PCM_ACT_CLOSE: + regmap_update_bits(reg, CS35L41_PWR_CTRL2, + CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); if (reg_seq->close) ret = regmap_multi_reg_write(reg, reg_seq->close, reg_seq->num_close); break; @@ -232,8 +233,10 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst; else cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst; - ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_reset_to_safe, - ARRAY_SIZE(cs35l41_reset_to_safe)); + regmap_multi_reg_write(cs35l41->regmap, cs35l41_reset_to_safe, + ARRAY_SIZE(cs35l41_reset_to_safe)); + ret = regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK, + CS35L41_BST_DIS_FET_OFF << CS35L41_BST_EN_SHIFT); if (ret) return ret; break; From patchwork Wed Apr 13 08:37:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas tanure X-Patchwork-Id: 561005 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CADF6C433EF for ; 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Wed, 13 Apr 2022 08:37:33 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure Subject: [PATCH v7 11/16] ALSA: hda: cs35l41: Remove cs35l41_hda_reg_sequence struct Date: Wed, 13 Apr 2022 09:37:23 +0100 Message-ID: <20220413083728.10730-12-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220413083728.10730-1-tanureal@opensource.cirrus.com> References: <20220413083728.10730-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 3TRwK98DHxi-VG03FVqrkK4-2C05BZHR X-Proofpoint-GUID: 3TRwK98DHxi-VG03FVqrkK4-2C05BZHR X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Remove cs35l41_hd_reg_sequence as it adds a layer of flexibility not needed. As cs35l41_hda_(start/stop)_bst is a single register, it can be replaced by regmap_update_bits with usleep_range to wait for the same 3000us that reg_sequence had. Signed-off-by: Lucas Tanure --- sound/pci/hda/cs35l41_hda.c | 79 ++++++++++++++++--------------------- sound/pci/hda/cs35l41_hda.h | 14 ------- 2 files changed, 33 insertions(+), 60 deletions(-) diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index 6e82ab9517f0..ece784662dbd 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -32,14 +32,6 @@ static const struct reg_sequence cs35l41_hda_mute[] = { { CS35L41_AMP_DIG_VOL_CTRL, 0x0000A678 }, // AMP_VOL_PCM Mute }; -static const struct reg_sequence cs35l41_hda_start_bst[] = { - { CS35L41_PWR_CTRL1, 0x00000001, 3000}, // set GLOBAL_EN = 1 -}; - -static const struct reg_sequence cs35l41_hda_stop_bst[] = { - { CS35L41_PWR_CTRL1, 0x00000000, 3000}, // set GLOBAL_EN = 0 -}; - // only on amps where GPIO1 is used to control ext. VSPK switch static const struct reg_sequence cs35l41_start_ext_vspk[] = { { 0x00000040, 0x00000055 }, @@ -109,31 +101,44 @@ static const struct reg_sequence cs35l41_reset_to_safe[] = { { 0x00000040, 0x00000033 }, }; -static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_no_bst = { - .prepare = cs35l41_safe_to_active, - .num_prepare = ARRAY_SIZE(cs35l41_safe_to_active), - .cleanup = cs35l41_active_to_safe, - .num_cleanup = ARRAY_SIZE(cs35l41_active_to_safe), -}; +static int cs35l41_hda_global_enable(struct cs35l41_hda *cs35l41, int enable) +{ + int ret; -static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_ext_bst = { - .prepare = cs35l41_start_ext_vspk, - .num_prepare = ARRAY_SIZE(cs35l41_start_ext_vspk), - .cleanup = cs35l41_stop_ext_vspk, - .num_cleanup = ARRAY_SIZE(cs35l41_stop_ext_vspk), -}; + switch (cs35l41->hw_cfg.bst_type) { + case CS35L41_INT_BOOST: + ret = regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL1, + CS35L41_GLOBAL_EN_MASK, + enable << CS35L41_GLOBAL_EN_SHIFT); + usleep_range(3000, 3100); + break; + case CS35L41_EXT_BOOST: + if (enable) + ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_start_ext_vspk, + ARRAY_SIZE(cs35l41_start_ext_vspk)); + else + ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_stop_ext_vspk, + ARRAY_SIZE(cs35l41_stop_ext_vspk)); + break; + case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: + if (enable) + ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_safe_to_active, + ARRAY_SIZE(cs35l41_safe_to_active)); + else + ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_active_to_safe, + ARRAY_SIZE(cs35l41_active_to_safe)); + break; + default: + ret = -EINVAL; + break; + } -static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_int_bst = { - .prepare = cs35l41_hda_start_bst, - .num_prepare = ARRAY_SIZE(cs35l41_hda_start_bst), - .cleanup = cs35l41_hda_stop_bst, - .num_cleanup = ARRAY_SIZE(cs35l41_hda_stop_bst), + return ret; }; static void cs35l41_hda_playback_hook(struct device *dev, int action) { struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); - const struct cs35l41_hda_reg_sequence *reg_seq = cs35l41->reg_seq; struct regmap *reg = cs35l41->regmap; int ret = 0; @@ -145,19 +150,15 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT); break; case HDA_GEN_PCM_ACT_PREPARE: - if (reg_seq->prepare) - ret = regmap_multi_reg_write(reg, reg_seq->prepare, reg_seq->num_prepare); + ret = cs35l41_hda_global_enable(cs35l41, 1); break; case HDA_GEN_PCM_ACT_CLEANUP: regmap_multi_reg_write(reg, cs35l41_hda_mute, ARRAY_SIZE(cs35l41_hda_mute)); - if (reg_seq->cleanup) - ret = regmap_multi_reg_write(reg, reg_seq->cleanup, reg_seq->num_cleanup); + ret = cs35l41_hda_global_enable(cs35l41, 0); break; case HDA_GEN_PCM_ACT_CLOSE: regmap_update_bits(reg, CS35L41_PWR_CTRL2, CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); - if (reg_seq->close) - ret = regmap_multi_reg_write(reg, reg_seq->close, reg_seq->num_close); break; default: ret = -EINVAL; @@ -221,7 +222,6 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) switch (hw_cfg->bst_type) { case CS35L41_INT_BOOST: - cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst; ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk); if (ret) @@ -229,10 +229,6 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) break; case CS35L41_EXT_BOOST: case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: - if (hw_cfg->bst_type == CS35L41_EXT_BOOST) - cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst; - else - cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst; regmap_multi_reg_write(cs35l41->regmap, cs35l41_reset_to_safe, ARRAY_SIZE(cs35l41_reset_to_safe)); ret = regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK, @@ -511,15 +507,6 @@ int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int i if (ret) goto err; - if (cs35l41->reg_seq->probe) { - ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41->reg_seq->probe, - cs35l41->reg_seq->num_probe); - if (ret) { - dev_err(cs35l41->dev, "Fail to apply probe reg patch: %d\n", ret); - goto err; - } - } - ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops); if (ret) { dev_err(cs35l41->dev, "Register component failed: %d\n", ret); diff --git a/sound/pci/hda/cs35l41_hda.h b/sound/pci/hda/cs35l41_hda.h index 17f10764f174..44d9204ffdf1 100644 --- a/sound/pci/hda/cs35l41_hda.h +++ b/sound/pci/hda/cs35l41_hda.h @@ -27,24 +27,10 @@ enum cs35l41_hda_gpio_function { CS35l41_SYNC, }; -struct cs35l41_hda_reg_sequence { - const struct reg_sequence *probe; - unsigned int num_probe; - const struct reg_sequence *open; - unsigned int num_open; - const struct reg_sequence *prepare; - unsigned int num_prepare; - const struct reg_sequence *cleanup; - unsigned int num_cleanup; - const struct reg_sequence *close; - unsigned int num_close; -}; - struct cs35l41_hda { struct device *dev; struct regmap *regmap; struct gpio_desc *reset_gpio; - const struct cs35l41_hda_reg_sequence *reg_seq; struct cs35l41_hw_cfg hw_cfg; int irq; From patchwork Wed Apr 13 08:37:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas tanure X-Patchwork-Id: 561003 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6C2BC4332F for ; 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Wed, 13 Apr 2022 08:37:33 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure Subject: [PATCH v7 13/16] ALSA: hda: cs35l41: Handle all external boost setups the same way Date: Wed, 13 Apr 2022 09:37:25 +0100 Message-ID: <20220413083728.10730-14-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220413083728.10730-1-tanureal@opensource.cirrus.com> References: <20220413083728.10730-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: iIHnN0xiuybP091_RiPp-hlv-OHHGmoJ X-Proofpoint-ORIG-GUID: iIHnN0xiuybP091_RiPp-hlv-OHHGmoJ X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org External boost enables sequences for devices with or without GPIO1 as VSPK switch are the same if devices are put in safe mode from reset. As a previous patch put all external boost devices into safe mode from reset, all external boost devices can be handled in the same way for stream open and close. The only difference is that devices without an VSPK switch can not be put in reset and devices with it can be put into reset if a configuration is applied. The function cs35l41_hda_safe_reset is created to handle the safe reset of the chip, and as systems without VSPK switch are not supported anymore, only the CS35L41 HDA driver should check its return. Signed-off-by: Lucas Tanure --- sound/pci/hda/cs35l41_hda.c | 60 +++++++++++++++---------------------- 1 file changed, 24 insertions(+), 36 deletions(-) diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index 3294837ff606..e54b5fbb6fb5 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -32,33 +32,9 @@ static const struct reg_sequence cs35l41_hda_mute[] = { { CS35L41_AMP_DIG_VOL_CTRL, 0x0000A678 }, // AMP_VOL_PCM Mute }; -// only on amps where GPIO1 is used to control ext. VSPK switch -static const struct reg_sequence cs35l41_start_ext_vspk[] = { +static const struct reg_sequence cs35l41_safe_to_reset[] = { { 0x00000040, 0x00000055 }, { 0x00000040, 0x000000AA }, - { 0x00007438, 0x00585941 }, - { 0x00007414, 0x08C82222 }, - { 0x0000742C, 0x00000009 }, - { 0x00011008, 0x00008001 }, - { 0x0000742C, 0x0000000F }, - { 0x0000742C, 0x00000079 }, - { 0x00007438, 0x00585941 }, - { CS35L41_PWR_CTRL1, 0x00000001, 3000}, // set GLOBAL_EN = 1 - { 0x0000742C, 0x000000F9 }, - { 0x00007438, 0x00580941 }, - { 0x00000040, 0x000000CC }, - { 0x00000040, 0x00000033 }, -}; - -//only on amps where GPIO1 is used to control ext. VSPK switch -static const struct reg_sequence cs35l41_stop_ext_vspk[] = { - { 0x00000040, 0x00000055 }, - { 0x00000040, 0x000000AA }, - { 0x00007438, 0x00585941 }, - { 0x00002014, 0x00000000, 3000}, // set GLOBAL_EN = 0 - { 0x0000742C, 0x00000009 }, - { 0x00007438, 0x00580941 }, - { 0x00011008, 0x00000001 }, { 0x0000393C, 0x000000C0, 6000}, { 0x0000393C, 0x00000000 }, { 0x00007414, 0x00C82222 }, @@ -73,7 +49,7 @@ static const struct reg_sequence cs35l41_safe_to_active[] = { { 0x0000742C, 0x0000000F }, { 0x0000742C, 0x00000079 }, { 0x00007438, 0x00585941 }, - { CS35L41_PWR_CTRL1, 0x00000001, 2000 }, // GLOBAL_EN = 1 + { CS35L41_PWR_CTRL1, 0x00000001, 3000 }, // GLOBAL_EN = 1 { 0x0000742C, 0x000000F9 }, { 0x00007438, 0x00580941 }, { 0x00000040, 0x000000CC }, @@ -85,7 +61,7 @@ static const struct reg_sequence cs35l41_active_to_safe[] = { { 0x00000040, 0x000000AA }, { 0x00007438, 0x00585941 }, { CS35L41_PWR_CTRL1, 0x00000000 }, - { 0x0000742C, 0x00000009, 2000 }, + { 0x0000742C, 0x00000009, 3000 }, { 0x00007438, 0x00580941 }, { 0x00000040, 0x000000CC }, { 0x00000040, 0x00000033 }, @@ -101,6 +77,21 @@ static const struct reg_sequence cs35l41_reset_to_safe[] = { { 0x00000040, 0x00000033 }, }; +static bool cs35l41_hda_safe_reset(struct cs35l41_hda *cs35l41) +{ + switch (cs35l41->hw_cfg.bst_type) { + case CS35L41_EXT_BOOST: + regmap_write(cs35l41->regmap, CS35L41_GPIO1_CTRL1, 0x00000001); + regmap_multi_reg_write(cs35l41->regmap, cs35l41_safe_to_reset, + ARRAY_SIZE(cs35l41_safe_to_reset)); + return true; + case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: + return false; + default: + return true; + } +}; + static int cs35l41_hda_global_enable(struct cs35l41_hda *cs35l41, int enable) { int ret; @@ -113,13 +104,6 @@ static int cs35l41_hda_global_enable(struct cs35l41_hda *cs35l41, int enable) usleep_range(3000, 3100); break; case CS35L41_EXT_BOOST: - if (enable) - ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_start_ext_vspk, - ARRAY_SIZE(cs35l41_start_ext_vspk)); - else - ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_stop_ext_vspk, - ARRAY_SIZE(cs35l41_stop_ext_vspk)); - break; case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: if (enable) ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_safe_to_active, @@ -147,6 +131,8 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) regmap_multi_reg_write(reg, cs35l41_hda_config, ARRAY_SIZE(cs35l41_hda_config)); ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2, CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT); + if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) + regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00008001); break; case HDA_GEN_PCM_ACT_PREPARE: ret = cs35l41_hda_global_enable(cs35l41, 1); @@ -158,6 +144,8 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) case HDA_GEN_PCM_ACT_CLOSE: ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2, CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); + if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) + regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00000001); break; default: dev_warn(cs35l41->dev, "Playback action not supported: %d\n", action); @@ -517,7 +505,7 @@ int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int i return 0; err: - if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH) + if (cs35l41_hda_safe_reset(cs35l41)) gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); gpiod_put(cs35l41->reset_gpio); @@ -531,7 +519,7 @@ void cs35l41_hda_remove(struct device *dev) component_del(cs35l41->dev, &cs35l41_hda_comp_ops); - if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH) + if (cs35l41_hda_safe_reset(cs35l41)) gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); gpiod_put(cs35l41->reset_gpio); } From patchwork Wed Apr 13 08:37:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas tanure X-Patchwork-Id: 561004 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2939DC433EF for ; Wed, 13 Apr 2022 08:38:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233810AbiDMIkW (ORCPT ); Wed, 13 Apr 2022 04:40:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233865AbiDMIkT (ORCPT ); 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Wed, 13 Apr 2022 03:37:40 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Wed, 13 Apr 2022 09:37:34 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.24 via Frontend Transport; Wed, 13 Apr 2022 09:37:34 +0100 Received: from aryzen.ad.cirrus.com (unknown [198.61.64.152]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 7F32F475; Wed, 13 Apr 2022 08:37:34 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Jaroslav Kysela , Takashi Iwai CC: , , , , David Rhodes , Lucas Tanure , Charles Keepax , Rob Herring Subject: [PATCH v7 15/16] ASoC: cs35l41: Document CS35l41 External Boost Date: Wed, 13 Apr 2022 09:37:27 +0100 Message-ID: <20220413083728.10730-16-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220413083728.10730-1-tanureal@opensource.cirrus.com> References: <20220413083728.10730-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: RozJuXc3IjwFQG5rMqmWpdmvBEwkkgK4 X-Proofpoint-ORIG-GUID: RozJuXc3IjwFQG5rMqmWpdmvBEwkkgK4 X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: David Rhodes Document internal and external boost feature for ASoC CS35L41. For internal boost the following properties are required: - cirrus,boost-peak-milliamp - cirrus,boost-ind-nanohenry - cirrus,boost-cap-microfarad For external boost, the GPIO1 must be configured as output, so the following properties are required: - cirrus,gpio1-src-select = <1> - cirrus,gpio1-output-enable Signed-off-by: David Rhodes Signed-off-by: Lucas Tanure Acked-by: Charles Keepax Reviewed-by: Rob Herring Acked-by: Mark Brown --- .../bindings/sound/cirrus,cs35l41.yaml | 44 +++++++++++++++++-- 1 file changed, 41 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml index 3235702ce402..51d815d0c696 100644 --- a/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml +++ b/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml @@ -75,6 +75,19 @@ properties: maximum: 3 default: 2 + cirrus,boost-type: + description: + Configures the type of Boost being used. + Internal boost requires boost-peak-milliamp, boost-ind-nanohenry and + boost-cap-microfarad. + External Boost must have GPIO1 as GPIO output. GPIO1 will be set high to + enable boost voltage. + 0 = Internal Boost + 1 = External Boost + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 1 + cirrus,gpio1-polarity-invert: description: Boolean which specifies whether the GPIO1 @@ -131,9 +144,32 @@ required: - compatible - reg - "#sound-dai-cells" - - cirrus,boost-peak-milliamp - - cirrus,boost-ind-nanohenry - - cirrus,boost-cap-microfarad + +allOf: + - if: + properties: + cirrus,boost-type: + const: 0 + then: + required: + - cirrus,boost-peak-milliamp + - cirrus,boost-ind-nanohenry + - cirrus,boost-cap-microfarad + else: + if: + properties: + cirrus,boost-type: + const: 1 + then: + required: + - cirrus,gpio1-output-enable + - cirrus,gpio1-src-select + properties: + cirrus,boost-peak-milliamp: false + cirrus,boost-ind-nanohenry: false + cirrus,boost-cap-microfarad: false + cirrus,gpio1-src-select: + enum: [1] additionalProperties: false @@ -150,6 +186,8 @@ examples: VA-supply = <&dummy_vreg>; VP-supply = <&dummy_vreg>; reset-gpios = <&gpio 110 0>; + + cirrus,boost-type = <0>; cirrus,boost-peak-milliamp = <4500>; cirrus,boost-ind-nanohenry = <1000>; cirrus,boost-cap-microfarad = <15>;