From patchwork Fri Apr 8 21:08:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 559687 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1ADCC433FE for ; Fri, 8 Apr 2022 21:05:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239661AbiDHVIA (ORCPT ); Fri, 8 Apr 2022 17:08:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239670AbiDHVH6 (ORCPT ); Fri, 8 Apr 2022 17:07:58 -0400 Received: from mail-ot1-x32e.google.com (mail-ot1-x32e.google.com [IPv6:2607:f8b0:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1758413CCE7 for ; Fri, 8 Apr 2022 14:05:54 -0700 (PDT) Received: by mail-ot1-x32e.google.com with SMTP id n19-20020a9d7113000000b005cd9cff76c3so6946636otj.1 for ; Fri, 08 Apr 2022 14:05:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=aV4gP9imWb5RV0sDAD5Q2cONnZ9+iBwKt8kNT5bBOgs=; b=EPNSfj2nSYc7mOIqFUv4NpJ2ph3jKTAr6r155GsfmKoMjl+mstddRpU/PdkCD+veSr RRmRFlM2YM1vcHvSJOD16KHHggz7wTKD4KnPt2wSVe8I+KLt7zb2acZz8sBiiVifWvMI 89QabWBFFUOuxcNwBpwpcOj/q4R2tLjw14g37tshRqdCwtxB/jvy3JDhfQRlsjwaauYJ MeuOb0c1u1AeWs9lU8KrdCEdbsORexjiWQFpe3SkflxGFQn9vCsryZO1CPhC/nA/L64U nk/F3WpK5aV6MdVZ9roK+zUfKDksBpag9Xp5jN+0GPLtufE3lREvNi2WfaVfsjG+Fa9d xC0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=aV4gP9imWb5RV0sDAD5Q2cONnZ9+iBwKt8kNT5bBOgs=; b=hVif5MrbTaafctnoC6Uf4A6MtnsDXQaLglu8B6vnKOB3htaqcjlYDN8Q6/2CrKljyC 9FWMn3yW2pvYgFAM65Ueb+uD/ZU0V05Mat4diNvQpKvci3tE2niylXc/gWU6UfXJbXpB iVsouCX6zQaDqOoNrLs7yfzvy5wd1Oky+i5vsavldXPwxSLzZJgMw5dvpMnCIz+4YQYV skYve83zqtgHr7ch5o27fEruZuzdKhG7gfMd6/iCUO1+EXdrvKLyC7n1K+nB70Apjx/M EDyouXgB59LTgtINRfzzm+ENlSV8x/zLSDedXMAqQHduM9W2RVZTqlRLpajFpIv62r1Q Wc8w== X-Gm-Message-State: AOAM531v2FqVcz1pR4cUJOa4DKVbQo/xkR04CsVjpuR8aFPwIeD/+eNI WG/XYymzM2iyiqN8nzjdaV0n2w== X-Google-Smtp-Source: ABdhPJzHAUSFVblBCfU82rzxb0/OF2t7uWRv3V+7FZkZRXyvsJrWXXh9cYS+NGxmn7hZPw0F8IU1Tg== X-Received: by 2002:a9d:6447:0:b0:5b2:35ae:7ad6 with SMTP id m7-20020a9d6447000000b005b235ae7ad6mr7240550otl.275.1649451953460; Fri, 08 Apr 2022 14:05:53 -0700 (PDT) Received: from ripper.. ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id y18-20020a056871011200b000e1f5910d45sm6560356oab.7.2022.04.08.14.05.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Apr 2022 14:05:52 -0700 (PDT) From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov Cc: Sean Paul , David Airlie , Daniel Vetter , Philipp Zabel , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] dt-bindings: display: msm: Add optional resets Date: Fri, 8 Apr 2022 14:08:12 -0700 Message-Id: <20220408210813.581391-1-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add an optional reference to the MDSS_CORE reset, which when specified can be used by the implementation to reset the hardware blocks. Signed-off-by: Bjorn Andersson --- Resending these two patches again as I put "v2" in the subject, even though I meant v3. Sorry about that. Changes since v2: - None .../devicetree/bindings/display/msm/dpu-qcm2290.yaml | 4 ++++ Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml | 4 ++++ Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml | 4 ++++ Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml index 6fb7e321f011..734d14de966d 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml @@ -66,6 +66,10 @@ properties: interconnect-names: const: mdp0-mem + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml index 12a86b1ec1bc..b41991eaa454 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml @@ -65,6 +65,10 @@ properties: interconnect-names: const: mdp0-mem + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml index fbeb931a026e..6e417d06fc79 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml @@ -64,6 +64,10 @@ properties: interconnect-names: const: mdp0-mem + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml index 0dca4b3d66e4..1a42491efdbc 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml @@ -57,6 +57,10 @@ properties: ranges: true + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object From patchwork Fri Apr 8 21:08:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 558911 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBC62C43217 for ; Fri, 8 Apr 2022 21:06:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239671AbiDHVIC (ORCPT ); Fri, 8 Apr 2022 17:08:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239701AbiDHVIA (ORCPT ); Fri, 8 Apr 2022 17:08:00 -0400 Received: from mail-ot1-x32e.google.com (mail-ot1-x32e.google.com [IPv6:2607:f8b0:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABEF5140747 for ; Fri, 8 Apr 2022 14:05:55 -0700 (PDT) Received: by mail-ot1-x32e.google.com with SMTP id z9-20020a05683020c900b005b22bf41872so6903276otq.13 for ; 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([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id y18-20020a056871011200b000e1f5910d45sm6560356oab.7.2022.04.08.14.05.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Apr 2022 14:05:54 -0700 (PDT) From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov Cc: Sean Paul , David Airlie , Daniel Vetter , Philipp Zabel , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/2] drm/msm/dpu: Issue MDSS reset during initialization Date: Fri, 8 Apr 2022 14:08:13 -0700 Message-Id: <20220408210813.581391-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220408210813.581391-1-bjorn.andersson@linaro.org> References: <20220408210813.581391-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It's typical for the bootloader to bring up the display for showing a boot splash or efi framebuffer. But in some cases the kernel driver ends up only partially configuring (in particular) the DPU, which might result in e.g. that two different data paths attempts to push data to the interface - with resulting graphical artifacts. Naturally the end goal would be to inherit the bootloader's configuration and provide the user with a glitch free handover from the boot configuration to a running DPU. But as implementing seamless transition from the bootloader configuration to the running OS will be a considerable effort, start by simply resetting the entire MDSS to its power-on state, to avoid the partial configuration. Signed-off-by: Bjorn Andersson Reviewed-by: Dmitry Baryshkov --- Changes since v2: - Move the reset before the probing of the children, to avoid issues if child drivers touched hardware at probe time. - Extend reset assert time as the previous 1us showed reliability issues on Lenovo Flex 5G. drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 32 ++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c index b10ca505f9ac..6f921910d0e0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c @@ -3,10 +3,12 @@ * Copyright (c) 2018, The Linux Foundation */ +#include #include #include #include #include +#include #include "dpu_kms.h" #define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base) @@ -197,6 +199,32 @@ static void dpu_mdss_destroy(struct msm_mdss *mdss) dpu_mdss->mmio = NULL; } +static int dpu_mdss_reset(struct device *dev) +{ + struct reset_control *reset; + + reset = reset_control_get_optional_exclusive(dev, NULL); + if (!reset) { + /* Optional reset not specified */ + return 0; + } else if (IS_ERR(reset)) { + DPU_ERROR("failed to acquire mdss reset, ret=%ld", PTR_ERR(reset)); + return PTR_ERR(reset); + } + + reset_control_assert(reset); + /* + * Tests indicate that reset has to be held for some period of time, + * make it one frame in a typical system + */ + msleep(20); + reset_control_deassert(reset); + + reset_control_put(reset); + + return 0; +} + static const struct msm_mdss_funcs mdss_funcs = { .enable = dpu_mdss_enable, .disable = dpu_mdss_disable, @@ -210,6 +238,10 @@ int dpu_mdss_init(struct platform_device *pdev) int ret; int irq; + ret = dpu_mdss_reset(&pdev->dev); + if (ret) + return ret; + dpu_mdss = devm_kzalloc(&pdev->dev, sizeof(*dpu_mdss), GFP_KERNEL); if (!dpu_mdss) return -ENOMEM;