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Fri, 08 Apr 2022 09:47:44 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id D701B1FFB8; Fri, 8 Apr 2022 17:47:42 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 01/15] tests/avocado: update aarch64_virt test to exercise -cpu max Date: Fri, 8 Apr 2022 17:47:28 +0100 Message-Id: <20220408164742.2844631-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, Peter Maydell , berrange@redhat.com, stefanha@redhat.com, "open list:Virt" , crosa@redhat.com, Richard Henderson , aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Wainer dos Santos Moschetta , Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net, Beraldo Leal Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The Fedora 29 kernel is quite old and importantly fails when running in LPA2 scenarios. As it's not really exercising much of the CPU space replace it with a custom 5.16.12 kernel with all the architecture options turned on. There is a minimal buildroot initramfs included in the kernel which has a few tools for stress testing the memory subsystem. The userspace also targets the Neoverse N1 processor so would fail with a v8.0 cpu like cortex-a53. While we are at it move the test into its own file so it can have an assigned maintainer. Signed-off-by: Alex Bennée Acked-by: Richard Henderson Tested-by: Richard Henderson Message-Id: <20220315121251.2280317-3-alex.bennee@linaro.org> --- v2 - move test into own machine file v3 - minor reword of commit, added tags --- MAINTAINERS | 1 + tests/avocado/boot_linux_console.py | 25 ------------- tests/avocado/machine_aarch64_virt.py | 51 +++++++++++++++++++++++++++ 3 files changed, 52 insertions(+), 25 deletions(-) create mode 100644 tests/avocado/machine_aarch64_virt.py diff --git a/MAINTAINERS b/MAINTAINERS index 4ad2451e03..dcedfaed1f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -942,6 +942,7 @@ S: Maintained F: hw/arm/virt* F: include/hw/arm/virt.h F: docs/system/arm/virt.rst +F: tests/avocado/machine_aarch64_virt.py Xilinx Zynq M: Edgar E. Iglesias diff --git a/tests/avocado/boot_linux_console.py b/tests/avocado/boot_linux_console.py index b40a3abc81..45a2ceda22 100644 --- a/tests/avocado/boot_linux_console.py +++ b/tests/avocado/boot_linux_console.py @@ -325,31 +325,6 @@ def test_mips_malta32el_nanomips_64k_dbg(self): kernel_hash = '18d1c68f2e23429e266ca39ba5349ccd0aeb7180' self.do_test_mips_malta32el_nanomips(kernel_url, kernel_hash) - def test_aarch64_virt(self): - """ - :avocado: tags=arch:aarch64 - :avocado: tags=machine:virt - :avocado: tags=accel:tcg - :avocado: tags=cpu:cortex-a53 - """ - kernel_url = ('https://archives.fedoraproject.org/pub/archive/fedora' - '/linux/releases/29/Everything/aarch64/os/images/pxeboot' - '/vmlinuz') - kernel_hash = '8c73e469fc6ea06a58dc83a628fc695b693b8493' - kernel_path = self.fetch_asset(kernel_url, asset_hash=kernel_hash) - - self.vm.set_console() - kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE + - 'console=ttyAMA0') - self.require_accelerator("tcg") - self.vm.add_args('-cpu', 'cortex-a53', - '-accel', 'tcg', - '-kernel', kernel_path, - '-append', kernel_command_line) - self.vm.launch() - console_pattern = 'Kernel command line: %s' % kernel_command_line - self.wait_for_console_pattern(console_pattern) - def test_aarch64_xlnx_versal_virt(self): """ :avocado: tags=arch:aarch64 diff --git a/tests/avocado/machine_aarch64_virt.py b/tests/avocado/machine_aarch64_virt.py new file mode 100644 index 0000000000..21848cba70 --- /dev/null +++ b/tests/avocado/machine_aarch64_virt.py @@ -0,0 +1,51 @@ +# Functional test that boots a Linux kernel and checks the console +# +# Copyright (c) 2022 Linaro Ltd. +# +# Author: +# Alex Bennée +# +# SPDX-License-Identifier: GPL-2.0-or-later + +import time + +from avocado_qemu import QemuSystemTest +from avocado_qemu import wait_for_console_pattern +from avocado_qemu import exec_command + +class Aarch64VirtMachine(QemuSystemTest): + KERNEL_COMMON_COMMAND_LINE = 'printk.time=0 ' + + def wait_for_console_pattern(self, success_message, vm=None): + wait_for_console_pattern(self, success_message, + failure_message='Kernel panic - not syncing', + vm=vm) + + def test_aarch64_virt(self): + """ + :avocado: tags=arch:aarch64 + :avocado: tags=machine:virt + :avocado: tags=accel:tcg + :avocado: tags=cpu:max + """ + kernel_url = ('https://fileserver.linaro.org/s/' + 'z6B2ARM7DQT3HWN/download') + + kernel_hash = 'ed11daab50c151dde0e1e9c9cb8b2d9bd3215347' + kernel_path = self.fetch_asset(kernel_url, asset_hash=kernel_hash) + + self.vm.set_console() + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE + + 'console=ttyAMA0') + self.require_accelerator("tcg") + self.vm.add_args('-cpu', 'max,pauth-impdef=on', + '-accel', 'tcg', + '-kernel', kernel_path, + '-append', kernel_command_line) + self.vm.launch() + self.wait_for_console_pattern('Welcome to Buildroot') + time.sleep(0.1) + exec_command(self, 'root') + time.sleep(0.1) + exec_command(self, 'cat /proc/self/maps') + time.sleep(0.1) From patchwork Fri Apr 8 16:47:29 2022 Content-Type: text/plain; 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Fri, 08 Apr 2022 09:47:44 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 0FE371FFBA; Fri, 8 Apr 2022 17:47:43 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 02/15] docs/devel: add some notes on the binfmt-image-debian targets Date: Fri, 8 Apr 2022 17:47:29 +0100 Message-Id: <20220408164742.2844631-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, stefanha@redhat.com, crosa@redhat.com, aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We document some of this on the wiki but lets move it into our official developer notes documentation. Signed-off-by: Alex Bennée Cc: Paolo Bonzini --- v2 - fix some trailing ws --- docs/devel/testing.rst | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/docs/devel/testing.rst b/docs/devel/testing.rst index 92d40cdd19..5b60a31807 100644 --- a/docs/devel/testing.rst +++ b/docs/devel/testing.rst @@ -637,6 +637,44 @@ The full set of annotations can be found here: https://github.com/llvm/llvm-project/blob/master/compiler-rt/lib/tsan/rtl/tsan_interface_ann.cpp +docker-binfmt-image-debian-% targets +------------------------------------ + +It is possible to combine Debian's bootstrap scripts with a configured +``binfmt_misc`` to bootstrap a number of Debian's distros including +experimental ports not yet supported by a released OS. This can +simplify setting up a rootfs by using docker to contain the foreign +rootfs rather than manually invoking chroot. + +Setting up ``binfmt_misc`` +~~~~~~~~~~~~~~~~~~~~~~~~~~ + +You can use the script ``qemu-binfmt-conf.sh`` to configure a QEMU +user binary to automatically run binaries for the foreign +architecture. While the scripts will try their best to work with +dynamically linked QEMU's a statically linked one will present less +potential complications when copying into the docker image. Modern +kernels support the ``F`` (fix binary) flag which will open the QEMU +executable on setup and avoids the need to find and re-open in the +chroot environment. This is triggered with the ``--persistent`` flag. + +Example invocation +~~~~~~~~~~~~~~~~~~ + +For example to setup the HPPA ports builds of Debian:: + + make docker-binfmt-image-debian-sid-hppa \ + DEB_TYPE=sid DEB_ARCH=hppa \ + DEB_URL=http://ftp.ports.debian.org/debian-ports/ \ + DEB_KEYRING=/usr/share/keyrings/debian-ports-archive-keyring.gpg \ + EXECUTABLE=(pwd)/qemu-hppa V=1 + +The ``DEB_`` variables are substitutions used by +``debian-boostrap.pre`` which is called to do the initial debootstrap +of the rootfs before it is copied into the container. The second stage +is run as part of the build. The final image will be tagged as +``qemu/debian-sid-hppa``. + VM testing ---------- From patchwork Fri Apr 8 16:47:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 558852 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp497503map; Fri, 8 Apr 2022 09:53:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwVcXRKJJPBFqBh1W1oc9UoXjoSJkL2Mw5nPgUwM7ffeL77IRqEf2nDSrVEgjZIhSzm+rEP X-Received: by 2002:a25:9f90:0:b0:624:521e:d4a5 with SMTP id u16-20020a259f90000000b00624521ed4a5mr14342215ybq.230.1649436812929; Fri, 08 Apr 2022 09:53:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649436812; cv=none; d=google.com; s=arc-20160816; b=W+xwjOpqWmMFdO4zli4MLw5e2KDXIQmjvA9GF9rFbPNqHlyzrw4v+1Nd6qwTjtmxnO vpKPRMcuqAVN/qLSG6SJmEk95UCeStPfwKciEqviEBD0Cu5yu+Z2BexCoSiTZJxqYV/4 ZRG/1qHGp2dbsJgpdAqfnL+FFYy7OowHPEZxauGoU+Btsg5z61cEM+oUy1LtSJ79IpvZ QRwjZk90KjKtL9zq5gWyCP5ccDiY5lwDDyeWcmzOACWY32+tcsxGPDss/S3VK4SJhb2v d+gob5KaLeavX0P6IETJ8GZ6XxPOJ2xA6Uwp/lO+9XGJAmBaCMC9U9ZMnMYrHK5mzE0r XKzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=dvwLTF/YUpusucxnWfO5BDXCMNh2/WY9f2hzq1Kk0Rs=; b=tjy2Xvbu65g/w3mt5ef1jEDYJYc+vESHRiC6tfBB3+7SSeJnOCUrh/lEMFjNdA1jTz dYfTlY2ikDh1zZtByxjxZHKPUDdKfsyrwm8tbu41d/YDGQnjEb4i6PovgvL10Fi5wf49 iehaXad3dHqyihzLRPKXYLaFW3khEE836W6wDQVz5ssKpixFuwnsPSpWEfwaHNJ0O3DC MRaVVyvbmM58VgXs0k+YEazN1XqodU6hfn5AbojOZZo2ig+RHotj99Bt8GO5bDX+ZVJJ FWiFYZ3TJxH63XOhvhxBK4uwWuZEfqzsTfaapKv+JNOnNKdzkufBhr5EiUzsKf8LxUUD huTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=UlROvWYm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Alex Bennée --- docs/devel/index-api.rst | 1 - docs/devel/index-build.rst | 3 +-- docs/devel/index-internals.rst | 1 - docs/devel/index-process.rst | 1 - docs/devel/index-tcg.rst | 1 - docs/devel/index.rst | 2 -- docs/devel/qtest.rst | 1 - 7 files changed, 1 insertion(+), 9 deletions(-) diff --git a/docs/devel/index-api.rst b/docs/devel/index-api.rst index b749240272..60c0d7459d 100644 --- a/docs/devel/index-api.rst +++ b/docs/devel/index-api.rst @@ -6,7 +6,6 @@ generated from in-code annotations to function prototypes. .. toctree:: :maxdepth: 2 - :includehidden: bitops loads-stores diff --git a/docs/devel/index-build.rst b/docs/devel/index-build.rst index d96894f07c..1002a533a6 100644 --- a/docs/devel/index-build.rst +++ b/docs/devel/index-build.rst @@ -6,8 +6,7 @@ into our testing infrastructure. You will need to understand some of the basics if you are adding new files and targets to the build. .. toctree:: - :maxdepth: 2 - :includehidden: + :maxdepth: 3 build-system kconfig diff --git a/docs/devel/index-internals.rst b/docs/devel/index-internals.rst index bb118b8eaf..a50889c556 100644 --- a/docs/devel/index-internals.rst +++ b/docs/devel/index-internals.rst @@ -5,7 +5,6 @@ Details about QEMU's various subsystems including how to add features to them. .. toctree:: :maxdepth: 2 - :includehidden: qom atomics diff --git a/docs/devel/index-process.rst b/docs/devel/index-process.rst index 314e9e94cc..d0d7a200fd 100644 --- a/docs/devel/index-process.rst +++ b/docs/devel/index-process.rst @@ -5,7 +5,6 @@ Notes about how to interact with the community and how and where to submit patch .. toctree:: :maxdepth: 2 - :includehidden: code-of-conduct conflict-resolution diff --git a/docs/devel/index-tcg.rst b/docs/devel/index-tcg.rst index 3acbd95d36..0b0ad12c22 100644 --- a/docs/devel/index-tcg.rst +++ b/docs/devel/index-tcg.rst @@ -7,7 +7,6 @@ are only implementing things for HW accelerated hypervisors. .. toctree:: :maxdepth: 2 - :includehidden: tcg decodetree diff --git a/docs/devel/index.rst b/docs/devel/index.rst index a68207052d..09cfb322be 100644 --- a/docs/devel/index.rst +++ b/docs/devel/index.rst @@ -8,8 +8,6 @@ modifying QEMU's source code. .. toctree:: :maxdepth: 1 - :includehidden: - index-process index-build diff --git a/docs/devel/qtest.rst b/docs/devel/qtest.rst index c3dceb6c8a..add293d397 100644 --- a/docs/devel/qtest.rst +++ b/docs/devel/qtest.rst @@ -3,7 +3,6 @@ QTest Device Emulation Testing Framework ======================================== .. toctree:: - :hidden: qgraph From patchwork Fri Apr 8 16:47:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 558850 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp497316map; Fri, 8 Apr 2022 09:53:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwAzr54sn7rjTmIWoz4O8iM5G30jB4YSVNEUR6Kmoa+W+/fX206Dode2bps3mk99ectz8fy X-Received: by 2002:a0d:ca46:0:b0:2eb:c12d:f7ec with SMTP id m67-20020a0dca46000000b002ebc12df7ecmr9021668ywd.9.1649436791183; Fri, 08 Apr 2022 09:53:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649436791; cv=none; d=google.com; s=arc-20160816; b=Pus3CoX3Ro/habpWX+csNb0V0yuzEExVBm/Mr8kkSdTi/WZ9hQH6i1HFZ+lNieBGN6 9L8IFfoNf6pMNjllykgYD3H5YbvkPz4jyQXMSw9/zTatPKCeioclGA2rdkFJfOOIe2bM CLLYxPdPO5qr6kLHOEmO0IVII+bjGQRm8GGzh+RwpJDaGJUz2xnBNuAlMa87pqBKCPT3 ZAjLq6wKZJoVsBeN+UQgpPzXzTKshUC9si/qwFtBWn7w1xhMO2la1zxyaSDhHH0K+MHK gWfpYkblq2W/GD9RdIiUsGzPsXXPxsCPbf+cVUhqHEEOd7GDpy89zGMdOPohEwf/+z52 va+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=cbfUhEdoXUFU1ImJHXBrosmpAlm+ZA5/z2VauZwOXbI=; b=MEdI/z0ISg2UqXxugytHzw8/pc440jExVe6fcqU7UaUeC80nlqVMxWVtZ6lULCsLq4 ThZQ4UFsEPbZamle1s0MCZlrAGnhdZZ1Y6+c2InFQtRoDfiuiSSIj4Q65q/5as+e2GTz naRrjkFoYfkD3M4gNtbqw4rpEPHey4Q9orvN0PvvqwJiRD4wN98WnFvpIi1hAUmxt1aH A68oX08JAuuvwwI0keenJ4+WuomDQJCVw6TI+EJLrYY8rdqwCo9CNtmDKt7D5+4gxBPO cUtUUMpcaqHF8t9tvmxiAE8hglwNo9n+X3nZplTOQ6cFwZHWOXKs0MXaHmpBAR1Z/b1U iIyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=BTOedRCy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 08 Apr 2022 09:47:44 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 886F81FFBC; Fri, 8 Apr 2022 17:47:43 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 04/15] accel/tcg: move trace events to correct location Date: Fri, 8 Apr 2022 17:47:31 +0100 Message-Id: <20220408164742.2844631-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, stefanha@redhat.com, crosa@redhat.com, Richard Henderson , aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- accel/tcg/cputlb.c | 2 +- accel/tcg/trace-events | 4 ++++ trace-events | 4 ---- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 2035b2ac0a..35797cea49 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -33,7 +33,7 @@ #include "qemu/atomic.h" #include "qemu/atomic128.h" #include "exec/translate-all.h" -#include "trace/trace-root.h" +#include "trace.h" #include "tb-hash.h" #include "internal.h" #ifdef CONFIG_PLUGIN diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events index 59eab96f26..4e9b450520 100644 --- a/accel/tcg/trace-events +++ b/accel/tcg/trace-events @@ -6,5 +6,9 @@ exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=0x%x" +# cputlb.c +memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) "0x%" PRIx64 " ram_addr 0x%" PRIx64 " size %u" +memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 + # translate-all.c translate_block(void *tb, uintptr_t pc, const void *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p" diff --git a/trace-events b/trace-events index bc71006675..841c2ca7c5 100644 --- a/trace-events +++ b/trace-events @@ -42,10 +42,6 @@ find_ram_offset(uint64_t size, uint64_t offset) "size: 0x%" PRIx64 " @ 0x%" PRIx find_ram_offset_loop(uint64_t size, uint64_t candidate, uint64_t offset, uint64_t next, uint64_t mingap) "trying size: 0x%" PRIx64 " @ 0x%" PRIx64 ", offset: 0x%" PRIx64" next: 0x%" PRIx64 " mingap: 0x%" PRIx64 ram_block_discard_range(const char *rbname, void *hva, size_t length, bool need_madvise, bool need_fallocate, int ret) "%s@%p + 0x%zx: madvise: %d fallocate: %d ret: %d" -# accel/tcg/cputlb.c -memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) "0x%" PRIx64 " ram_addr 0x%" PRIx64 " size %u" -memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 - # gdbstub.c gdbstub_op_start(const char *device) "Starting gdbstub using device %s" gdbstub_op_exiting(uint8_t code) "notifying exit with code=0x%02x" From patchwork Fri Apr 8 16:47:32 2022 Content-Type: text/plain; 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Fri, 08 Apr 2022 09:47:49 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id BADBC1FFBD; Fri, 8 Apr 2022 17:47:43 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 05/15] accel/tcg: add tb_invalidate_phy_pages_fast tracepoint Date: Fri, 8 Apr 2022 17:47:32 +0100 Message-Id: <20220408164742.2844631-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, stefanha@redhat.com, crosa@redhat.com, Richard Henderson , aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These events can be very expensive for the translator so lets add a tracepoint to help with debugging what might be causing them. Clean up the comments while we are at it. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- accel/tcg/translate-all.c | 15 +++++++++++---- accel/tcg/trace-events | 1 + 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 5971cd53ab..e9f1cc179d 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1807,21 +1807,28 @@ void tb_invalidate_phys_range(target_ulong start, target_ulong end) } #ifdef CONFIG_SOFTMMU -/* len must be <= 8 and start must be a multiple of len. +/* + * len must be <= 8 and start must be a multiple of len. * Called via softmmu_template.h when code areas are written to with * iothread mutex not held. * - * Call with all @pages in the range [@start, @start + len[ locked. + * Call with all @pages in the range [@start, @start + len] locked. */ void tb_invalidate_phys_page_fast(struct page_collection *pages, tb_page_addr_t start, int len, uintptr_t retaddr) { - PageDesc *p; + PageDesc *p = page_find(start >> TARGET_PAGE_BITS); + + if (trace_event_get_state_backends(TRACE_TB_INVALIDATE_PHYS_PAGE_FAST)) { + TranslationBlock *tb = tcg_tb_lookup(retaddr); + g_assert(tb); + trace_tb_invalidate_phys_page_fast(start, len, tb->pc, + p->code_write_count, p->code_bitmap); + } assert_memory_lock(); - p = page_find(start >> TARGET_PAGE_BITS); if (!p) { return; } diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events index 4e9b450520..f4d1321b1b 100644 --- a/accel/tcg/trace-events +++ b/accel/tcg/trace-events @@ -11,4 +11,5 @@ memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) " memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 # translate-all.c +tb_invalidate_phys_page_fast(uint64_t page_start, int len, uint64_t ret, int wc, void *bmap) "addr:0x%" PRIx64 "/%d pc:0x%" PRIx64" wc:%d/%p" translate_block(void *tb, uintptr_t pc, const void *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p" From patchwork Fri Apr 8 16:47:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 558853 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp499134map; Fri, 8 Apr 2022 09:56:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwnyDgPk6FSMSFsR5vo84lPC1hJ2f9Qb1oh64eLSmDw7KfTGOnO5Kj1ixQhlc4TFu4p9Lwk X-Received: by 2002:a25:d642:0:b0:641:107f:8d12 with SMTP id n63-20020a25d642000000b00641107f8d12mr1984619ybg.243.1649436963511; Fri, 08 Apr 2022 09:56:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649436963; cv=none; d=google.com; s=arc-20160816; b=WwoiGispoG8UzGoVBePkjcSD9aWxaI0k3aKBa25earriLoe5XqFrMJFQdanLVlupX0 XWeXX5pieaPolR/SjE04iK3As1LZfqtrzWFrmWH2SHK49S/UPMaO9qxxsOVp7mGHX7Yh KSAYRFOug9liV4vYYrk7qGMYBr+GdGlkN8z1zRoqc+Dju/cl7KcSXybMkLJQSJkFydRd iFYS321y6tNrxXq40o/bLlTeODYovdzWNhV+yWDiNNIArj0POgCQc0MjjUPX6odinKtY 3jyN3MW6gI4CP2gF+nJQavIAROupG6JkvPlbwne6E5uiT+VaHDHwEbtAUG5zybNcJO9N AujA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=4NTszvMqpo5kXDPKuOt5Qa+p4D0vEgJ4d0rxv9/sMM8=; b=ALQaoTv3VRDAzLW4uRZH+6dOrN/RI54LRLANquavyVIr9tUZiw7dSDXdMkfyVXBHJh Z8FTZZOVWwVtek7brQf8ytJpUQbV6S+NcITagaGKaC9Bfj0bKcajHX5H4bVEKDyFIa+V mZVYWp0GexQB37LReH+GK45FHl6ZVDmZVjyOaAAAI0EOT+ohoNOqWeQKM4kYTxVm7R6R pvkZYAR1ESFZlLZl9cJWN5KD3+X3laAEWFt8jbybGn7Yvxw+1hvOMU3e4OBgLsRbpq2I O+GU+LoYKX8GbAvtGMp+9qs1f/FXmHkU6pB3kUORHNh9RlwFJA9QD5ABCcQKcmd3TID2 8kHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=cXR0BLDL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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It avoids having to jump through hoops like: monitor_printf(mon, "%s", s->str); Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- include/monitor/monitor.h | 1 + monitor/monitor-internal.h | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/include/monitor/monitor.h b/include/monitor/monitor.h index cc4cc6c6ad..8e291a2588 100644 --- a/include/monitor/monitor.h +++ b/include/monitor/monitor.h @@ -31,6 +31,7 @@ void monitor_resume(Monitor *mon); int monitor_get_fd(Monitor *mon, const char *fdname, Error **errp); int monitor_fd_param(Monitor *mon, const char *fdname, Error **errp); +int monitor_puts(Monitor *mon, const char *str); int monitor_vprintf(Monitor *mon, const char *fmt, va_list ap) G_GNUC_PRINTF(2, 0); int monitor_printf(Monitor *mon, const char *fmt, ...) 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Fri, 08 Apr 2022 09:47:49 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 30B501FFBF; Fri, 8 Apr 2022 17:47:44 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 07/15] disas: generalise plugin_printf and use for monitor_disas Date: Fri, 8 Apr 2022 17:47:34 +0100 Message-Id: <20220408164742.2844631-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: 0 X-Spam_score: -0.1 X-Spam_bar: / X-Spam_report: (-0.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_OTHER_BAD_TLD=1.997, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, stefanha@redhat.com, crosa@redhat.com, aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Rather than assembling our output piecemeal lets use the same approach as the plugin disas interface to build the disassembly string before printing it. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- disas.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/disas.c b/disas.c index 3dab4482d1..9b52b2fa93 100644 --- a/disas.c +++ b/disas.c @@ -248,7 +248,7 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code, } } -static int plugin_printf(FILE *stream, const char *fmt, ...) +static int gstring_printf(FILE *stream, const char *fmt, ...) { /* We abuse the FILE parameter to pass a GString. */ GString *s = (GString *)stream; @@ -279,7 +279,7 @@ char *plugin_disas(CPUState *cpu, uint64_t addr, size_t size) GString *ds = g_string_new(NULL); initialize_debug_target(&s, cpu); - s.info.fprintf_func = plugin_printf; + s.info.fprintf_func = gstring_printf; s.info.stream = (FILE *)ds; /* abuse this slot */ s.info.buffer_vma = addr; s.info.buffer_length = size; @@ -367,15 +367,19 @@ void monitor_disas(Monitor *mon, CPUState *cpu, { int count, i; CPUDebug s; + g_autoptr(GString) ds = g_string_new(""); initialize_debug_target(&s, cpu); - s.info.fprintf_func = qemu_fprintf; + s.info.fprintf_func = gstring_printf; + s.info.stream = (FILE *)ds; /* abuse this slot */ + if (is_physical) { s.info.read_memory_func = physical_read_memory; } s.info.buffer_vma = pc; if (s.info.cap_arch >= 0 && cap_disas_monitor(&s.info, pc, nb_insn)) { + monitor_puts(mon, ds->str); return; } @@ -385,13 +389,16 @@ void monitor_disas(Monitor *mon, CPUState *cpu, return; } - for(i = 0; i < nb_insn; i++) { - monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc); + for (i = 0; i < nb_insn; i++) { + g_string_append_printf(ds, "0x" TARGET_FMT_lx ": ", pc); count = s.info.print_insn(pc, &s.info); - monitor_printf(mon, "\n"); - if (count < 0) - break; + g_string_append_c(ds, '\n'); + if (count < 0) { + break; + } pc += count; } + + monitor_puts(mon, ds->str); } #endif From patchwork Fri Apr 8 16:47:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 558851 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp497389map; Fri, 8 Apr 2022 09:53:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy+Hh+MntBu8T0MX1c6pbzfipycR3pd8ZB+GhOan1ZKE54AgHbNk3Ho4N+L5/6aLNjC+aqV X-Received: by 2002:a0d:c583:0:b0:2e6:b1e7:a6b with SMTP id h125-20020a0dc583000000b002e6b1e70a6bmr16676017ywd.424.1649436799250; Fri, 08 Apr 2022 09:53:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649436799; cv=none; d=google.com; s=arc-20160816; b=XCiK4gWxT67iHQPQ8HfaHU7oB8bl6s88KmgKV9huZZ8R89AvliA3QYbKdXF3QtLwhG 2tt9AiGAEYRfoVWatpTZHcQHu0tiJ8NovVpIKrwnYEnwKwOw/H88R8GJoXDdIKYLDaCK LtNrJbNR5W2xHXRg/WgxqMYzSVltRuC207gBylDyoZfrYaF80rlg2uQMHzIhz49dXhJu 7+4xdFxXtCa2t84Zak6dKK1KtcGojRBqYW8XXc64REcoaWL/UHnYuh7XZExSiioNj1ko sqBAnFpgjNIsacrh2oZj2c+CbQqNS7d6B21Kogi1YzNH3g2dN6xa8CBPz/ApcoVNKCEl CBvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ubCqK51gYtJJDCrG/hEyxYZ9EfsVm0Z8CHCmeeA6FEk=; b=1E/Q9YyuB1FBmQ/h4rV4++sOpUo681Y2R1BttDJ0jfwSFB3vrdkemxOcSn3d1e9H5M avyJHReTB8TuL0ssCvxjK38txBqf7h7NlWdBwEWlsN9gcr1DU3EyOvO7k46CWIRY+FR6 ixhkJG4LkJZARaKg8Ux+e7ju3yBS8ljC0rF93HtqkDZiHrldLCDcjgpYgYn1f6eJiDzi 07wMshOd4WD7bkj+28UlLXLL1YiunJqcZNNSjmWY4znQ95O161gQChaefZ2KJtRwWZTW OXbItcoJJzHpIxzU5Xn8EfTKislAv6Piawx5PuP4QXPcB1npBRJyGZYP1rQ/43P76jW5 V/cA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=dARvqjpD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 08 Apr 2022 09:47:49 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 624231FFB7; Fri, 8 Apr 2022 17:47:44 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 08/15] disas: use result of ->read_memory_func Date: Fri, 8 Apr 2022 17:47:35 +0100 Message-Id: <20220408164742.2844631-9-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, stefanha@redhat.com, crosa@redhat.com, aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This gets especially confusing if you start plugging in host addresses from a trace and you wonder why the output keeps changing. Report when read_memory_func fails instead of blindly disassembling the buffer contents. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- disas.c | 20 ++++++------- disas/capstone.c | 73 ++++++++++++++++++++++++++++-------------------- 2 files changed, 53 insertions(+), 40 deletions(-) diff --git a/disas.c b/disas.c index 9b52b2fa93..04329aae36 100644 --- a/disas.c +++ b/disas.c @@ -83,18 +83,18 @@ static int print_insn_objdump(bfd_vma pc, disassemble_info *info, const char *prefix) { int i, n = info->buffer_length; - uint8_t *buf = g_malloc(n); - - info->read_memory_func(pc, buf, n, info); - - for (i = 0; i < n; ++i) { - if (i % 32 == 0) { - info->fprintf_func(info->stream, "\n%s: ", prefix); + g_autofree uint8_t *buf = g_malloc(n); + + if (info->read_memory_func(pc, buf, n, info) == 0) { + for (i = 0; i < n; ++i) { + if (i % 32 == 0) { + info->fprintf_func(info->stream, "\n%s: ", prefix); + } + info->fprintf_func(info->stream, "%02x", buf[i]); } - info->fprintf_func(info->stream, "%02x", buf[i]); + } else { + info->fprintf_func(info->stream, "unable to read memory"); } - - g_free(buf); return n; } diff --git a/disas/capstone.c b/disas/capstone.c index 20bc8f9669..fe3efb0d3c 100644 --- a/disas/capstone.c +++ b/disas/capstone.c @@ -191,37 +191,43 @@ bool cap_disas_target(disassemble_info *info, uint64_t pc, size_t size) size_t tsize = MIN(sizeof(cap_buf) - csize, size); const uint8_t *cbuf = cap_buf; - info->read_memory_func(pc + csize, cap_buf + csize, tsize, info); - csize += tsize; - size -= tsize; + if (info->read_memory_func(pc + csize, cap_buf + csize, tsize, info) == 0) { + csize += tsize; + size -= tsize; - while (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) { - cap_dump_insn(info, insn); - } + while (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) { + cap_dump_insn(info, insn); + } + + /* If the target memory is not consumed, go back for more... */ + if (size != 0) { + /* + * ... taking care to move any remaining fractional insn + * to the beginning of the buffer. + */ + if (csize != 0) { + memmove(cap_buf, cbuf, csize); + } + continue; + } - /* If the target memory is not consumed, go back for more... */ - if (size != 0) { /* - * ... taking care to move any remaining fractional insn - * to the beginning of the buffer. + * Since the target memory is consumed, we should not have + * a remaining fractional insn. */ if (csize != 0) { - memmove(cap_buf, cbuf, csize); + info->fprintf_func(info->stream, + "Disassembler disagrees with translator " + "over instruction decoding\n" + "Please report this to qemu-devel@nongnu.org\n"); } - continue; - } + break; - /* - * Since the target memory is consumed, we should not have - * a remaining fractional insn. - */ - if (csize != 0) { + } else { info->fprintf_func(info->stream, - "Disassembler disagrees with translator " - "over instruction decoding\n" - "Please report this to qemu-devel@nongnu.org\n"); + "0x%08" PRIx64 ": unable to read memory\n", pc); + break; } - break; } cs_close(&handle); @@ -286,16 +292,23 @@ bool cap_disas_monitor(disassemble_info *info, uint64_t pc, int count) /* Make certain that we can make progress. */ assert(tsize != 0); - info->read_memory_func(pc + csize, cap_buf + csize, tsize, info); - csize += tsize; - - if (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) { - cap_dump_insn(info, insn); - if (--count <= 0) { - break; + if (info->read_memory_func(pc + csize, cap_buf + csize, + tsize, info) == 0) + { + csize += tsize; + + if (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) { + cap_dump_insn(info, insn); + if (--count <= 0) { + break; + } } + memmove(cap_buf, cbuf, csize); + } else { + info->fprintf_func(info->stream, + "0x%08" PRIx64 ": unable to read memory\n", pc); + break; } - memmove(cap_buf, cbuf, csize); } cs_close(&handle); From patchwork Fri Apr 8 16:47:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 558858 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp501401map; Fri, 8 Apr 2022 09:59:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyvMmuSJQkEas/Vggq8726zwZBzWsML7OQflCyoKSmoNuQIS/VjqQ8WczkukEGQYyJQcdkx X-Received: by 2002:a25:640f:0:b0:63d:b10b:6bd6 with SMTP id y15-20020a25640f000000b0063db10b6bd6mr14011150ybb.306.1649437176402; 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Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- accel/tcg/cputlb.c | 14 ++++++++++---- accel/tcg/trace-events | 3 +++ 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 35797cea49..f2983cb2fc 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -947,18 +947,24 @@ void tlb_flush_page_bits_by_mmuidx_all_cpus_synced(CPUState *src_cpu, idxmap, bits); } -/* update the TLBs so that writes to code in the virtual page 'addr' - can be detected */ +/* + * Update the TLBs so that writes to code in the virtual page 'ram_addr' + * can be detected. + */ void tlb_protect_code(ram_addr_t ram_addr) { + trace_tlb_protect_code(ram_addr); cpu_physical_memory_test_and_clear_dirty(ram_addr, TARGET_PAGE_SIZE, DIRTY_MEMORY_CODE); } -/* update the TLB so that writes in physical page 'phys_addr' are no longer - tested for self modifying code */ +/* + * Update the TLB so that writes in physical page 'ram_addr' are no longer + * tested for self modifying code + */ void tlb_unprotect_code(ram_addr_t ram_addr) { + trace_tlb_unprotect_code(ram_addr); cpu_physical_memory_set_dirty_flag(ram_addr, DIRTY_MEMORY_CODE); } diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events index f4d1321b1b..e11e59492f 100644 --- a/accel/tcg/trace-events +++ b/accel/tcg/trace-events @@ -7,6 +7,9 @@ exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=0x%x" # cputlb.c +tlb_protect_code(uint64_t ram_addr) "0x%" PRIx64"" +tlb_unprotect_code(uint64_t ram_addr) "0x%" PRIx64"" + memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) "0x%" PRIx64 " ram_addr 0x%" PRIx64 " size %u" memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 From patchwork Fri Apr 8 16:47:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 558861 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp511058map; Fri, 8 Apr 2022 10:10:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyRUHhor17N37uF6AUmwrQa3Wuu8ceufZ69ctnP8yaf0dVrlJx3g36LcA1fUZ9oFRime+yA X-Received: by 2002:a5b:d2:0:b0:63d:a269:37ee with SMTP id d18-20020a5b00d2000000b0063da26937eemr13890292ybp.538.1649437801881; Fri, 08 Apr 2022 10:10:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649437801; cv=none; d=google.com; s=arc-20160816; b=ht/8o0qZAfGsF1QOVcCWWB5B14J0nDT1Phkc4Y6/RM4mRmyzuhKeB5e5XhTNs6HxIu waDY32ZyYDkl2FmQRyB1rhm+EE46saO/a8LKUFYRf+Dni50aDnkdYwcbDui7rDa0xPcD 6wWCKQdpj8ulTKrSCkzRr7MVuviQvncDm4TfWFAOG1Q7D+pCXc/PBxpvcq7PQJG6+Yrz s7P5QC3oaANiCLVaPrzoEqpp5B1GXIme7I2Hh2HBnoIIsN2Sc2RGv38vYLn4h0cDnFjX +98Jv2uiSTAHAyqlnCfPoRB8dpNT4QC2pNlN7EoWindv0Dmf+rJQASpgKkNwGkkQV5tK Sj/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=BMis61C8omQYYseV7MGnkVBUiKXffiRK6pjvcW205Rg=; b=D8j6FgpuGE1QtZhO4DIoUOr/kLVA/1fo9iCrimWsi+CgijdrvCoY2wHJl6OxCEkeCk AQHCpWSYI8FyRdbKnGV0xcBe9Gl7JvPmuM8vjA2ZrBt4r/V8ADC3vtBJx9qvdN0dI569 +SSjM0yiNKerNC/m+tw758Qh4lF4KzH1RHDtqn0x8j1w9qyKfYE/II8zbGpArpabI47r YeTNSlCKkgxBeFHxUT0dJzxj9mcoaEGvmVUy/BAwZ4H7+gtYylwpQGv1XuuSOOS3ut2b vPm2UuqP3RaeM8/aKRa35gBwdJi0D4SEagM+hAsyBIxFk9JobSET9DIeLpufap8EIja1 RK9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=JxkhP0+f; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 08 Apr 2022 09:54:43 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id C396F1FFC1; Fri, 8 Apr 2022 17:47:44 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 10/15] cputlb: add tracepoints for TB invalidation Date: Fri, 8 Apr 2022 17:47:37 +0100 Message-Id: <20220408164742.2844631-11-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, stefanha@redhat.com, crosa@redhat.com, Richard Henderson , aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- accel/tcg/translate-all.c | 2 ++ accel/tcg/trace-events | 1 + 2 files changed, 3 insertions(+) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index e9f1cc179d..b0009177b9 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1180,6 +1180,8 @@ static void do_tb_phys_invalidate(TranslationBlock *tb, bool rm_from_page_list) assert_memory_lock(); + trace_tb_phys_invalidate(tb, tb->pc); + /* make sure no further incoming jumps will be chained to this TB */ qemu_spin_lock(&tb->jmp_lock); qatomic_set(&tb->cflags, tb->cflags | CF_INVALID); diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events index e11e59492f..c034649dc2 100644 --- a/accel/tcg/trace-events +++ b/accel/tcg/trace-events @@ -14,5 +14,6 @@ memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) " memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 # translate-all.c +tb_phys_invalidate(void *tb, uintptr_t pc) "tb:%p, pc:0x%"PRIxPTR"" tb_invalidate_phys_page_fast(uint64_t page_start, int len, uint64_t ret, int wc, void *bmap) "addr:0x%" PRIx64 "/%d pc:0x%" PRIx64" wc:%d/%p" translate_block(void *tb, uintptr_t pc, const void *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p" From patchwork Fri Apr 8 16:47:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 558854 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp499313map; 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Signed-off-by: Alex Bennée --- accel/tcg/translate-all.c | 9 +++++++++ accel/tcg/trace-events | 1 + 2 files changed, 10 insertions(+) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index b0009177b9..625c46dd9b 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1671,6 +1671,7 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages, TranslationBlock *tb; tb_page_addr_t tb_start, tb_end; int n; + int checked = 0, removed = 0; #ifdef TARGET_HAS_PRECISE_SMC CPUState *cpu = current_cpu; CPUArchState *env = NULL; @@ -1695,6 +1696,7 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages, the code */ PAGE_FOR_EACH_TB(p, tb, n) { assert_page_locked(p); + checked++; /* NOTE: this is subtle as a TB may span two physical pages */ if (n == 0) { /* NOTE: tb_end may be after the end of the page, but @@ -1728,13 +1730,20 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages, } #endif /* TARGET_HAS_PRECISE_SMC */ tb_phys_invalidate__locked(tb); + removed++; } } + + #if !defined(CONFIG_USER_ONLY) /* if no code remaining, no need to continue to use slow writes */ if (!p->first_tb) { invalidate_page_bitmap(p); tlb_unprotect_code(start); + trace_tb_invalidate_phys_page_range(checked, removed, 0); + } else { + TranslationBlock *tb = (TranslationBlock *) p->first_tb; + trace_tb_invalidate_phys_page_range(checked, removed, tb->pc); } #endif #ifdef TARGET_HAS_PRECISE_SMC diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events index c034649dc2..fdc64e1423 100644 --- a/accel/tcg/trace-events +++ b/accel/tcg/trace-events @@ -15,5 +15,6 @@ memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 # translate-all.c tb_phys_invalidate(void *tb, uintptr_t pc) "tb:%p, pc:0x%"PRIxPTR"" +tb_invalidate_phys_page_range(int checked, int removed, uintptr_t ftb_pc) "checked:%d removed:%d first_tb_pc:0x%"PRIxPTR"" tb_invalidate_phys_page_fast(uint64_t page_start, int len, uint64_t ret, int wc, void *bmap) "addr:0x%" PRIx64 "/%d pc:0x%" PRIx64" wc:%d/%p" translate_block(void *tb, uintptr_t pc, const void *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p" From patchwork Fri Apr 8 16:47:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 558856 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp501211map; Fri, 8 Apr 2022 09:59:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy8sATzbxndUI8QpVj9j0FPsxJNNG2UiP6cfepz/0Bju0KL/vujNLR7vPKtbMNY9QHlv5z+ X-Received: by 2002:a25:e6cd:0:b0:63d:c367:eb5c with SMTP id d196-20020a25e6cd000000b0063dc367eb5cmr14178575ybh.339.1649437161800; Fri, 08 Apr 2022 09:59:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649437161; cv=none; d=google.com; s=arc-20160816; b=Y8JeNnEuTxX7DG1fHYNsXynjKGXd9vnrXn7ryVctcMYwfV4guDGzbQH2x7QVNokj7K 0AdU12krV7qquwViKKgGSx1rR80G5IAj0rVVa3mgE7DWEjzgDHnIcxept9719F5j19jN Gvnda/5k9MBuGXJU9YrN08vlaE8gCD0GHoyPoRU21lXG7hI8+J63sYO292kGTQ1laf7V UzkieDgQiQsNhleijpPJpb5wIwAoJKI9FryOeU3nsLhnmSojwEWVt235IEAGgb6AhDeA 2qZdGLql82wtir3oisZcdm4MN31lY1TBbWpHCyiwFOiNbvTJnT64IL8t/8rv02BKOhAl rncQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Gs6DhXXH3OheiODrWMr7bw7KN+vJ8pkDZF2hBYggHlU=; b=LziHsE6ydpH+wbwHGvdQJ9vL0XGodKdT9RCKmkpTWKIjP8YM2ksMoY/iFddJjEV9vq mnPnQITHnKXLf7KPNzjoR9FD/teeNaAP/zWslOFxuzRWQi8SuBC6VhAeoo6kZ/kmPx5C zrWrKcaj2Ht0Vrjs2pVO2dQfqZg6yfEcqKfsdQRotKOiwgjIwORA5NREzsPmqFUjK7LO eXlJAbcvcxlr+gdI9uEcl5VknuB5tNSBkBYF4Wtu+m1D6nP7cYXn3yxKJwOGS46xhVf5 z90JM8jbM8/btkLxXG9RFhk13/9N+j/uvhbgCg9AbIN8MnfKOaGszrJbVjHBI3N7hawz mtNw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="G/7GqOFO"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 08 Apr 2022 09:47:49 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 37B641FFC3; Fri, 8 Apr 2022 17:47:45 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 12/15] tests/tcg: add memory-sve test for aarch64 Date: Fri, 8 Apr 2022 17:47:39 +0100 Message-Id: <20220408164742.2844631-13-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, Peter Maydell , berrange@redhat.com, stefanha@redhat.com, "open list:ARM TCG CPUs" , crosa@redhat.com, aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This will be helpful in debugging problems with tracking SVE memory accesses via the TCG plugins system. Signed-off-by: Alex Bennée Cc: Robert Henry Cc: Aaron Lindsay --- tests/tcg/aarch64/Makefile.softmmu-target | 7 +++++++ tests/tcg/aarch64/system/boot.S | 3 ++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/tests/tcg/aarch64/Makefile.softmmu-target b/tests/tcg/aarch64/Makefile.softmmu-target index a7286ac295..cc02814065 100644 --- a/tests/tcg/aarch64/Makefile.softmmu-target +++ b/tests/tcg/aarch64/Makefile.softmmu-target @@ -31,6 +31,13 @@ LDFLAGS+=-static -nostdlib $(CRT_OBJS) $(MINILIB_OBJS) -lgcc memory: CFLAGS+=-DCHECK_UNALIGNED=1 +memory-sve: memory.c $(LINK_SCRIPT) $(CRT_OBJS) $(MINILIB_OBJS) + $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) + +memory-sve: CFLAGS+=-DCHECK_UNALIGNED=1 -march=armv8.1-a+sve -O3 -fno-tree-loop-distribute-patterns + +TESTS+=memory-sve + # Running QEMU_BASE_MACHINE=-M virt -cpu max -display none QEMU_OPTS+=$(QEMU_BASE_MACHINE) -semihosting-config enable=on,target=native,chardev=output -kernel diff --git a/tests/tcg/aarch64/system/boot.S b/tests/tcg/aarch64/system/boot.S index e190b1efa6..f136363d2a 100644 --- a/tests/tcg/aarch64/system/boot.S +++ b/tests/tcg/aarch64/system/boot.S @@ -179,12 +179,13 @@ __start: isb /* - * Enable FP registers. The standard C pre-amble will be + * Enable FP/SVE registers. The standard C pre-amble will be * saving these and A-profile compilers will use AdvSIMD * registers unless we tell it not to. */ mrs x0, cpacr_el1 orr x0, x0, #(3 << 20) + orr x0, x0, #(3 << 16) msr cpacr_el1, x0 /* Setup some stack space and enter the test code. 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[209.51.188.17]) by mx.google.com with ESMTPS id k6-20020a81de06000000b002eb5b72ed13si909334ywj.364.2022.04.08.10.13.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 08 Apr 2022 10:13:01 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=xGDf7hmi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46856 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ncsAP-0007X2-5f for patch@linaro.org; Fri, 08 Apr 2022 13:13:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51330) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ncrsm-00088X-SQ for qemu-devel@nongnu.org; Fri, 08 Apr 2022 12:54:48 -0400 Received: from mail-ej1-x633.google.com ([2a00:1450:4864:20::633]:36820) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ncrsk-0003tk-Js for qemu-devel@nongnu.org; Fri, 08 Apr 2022 12:54:48 -0400 Received: by mail-ej1-x633.google.com with SMTP id k23so18505450ejd.3 for ; Fri, 08 Apr 2022 09:54:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lTvGAjUBHokhz47gGcffyY4wlijj7lVsJzRf6BwegRA=; b=xGDf7hmiNFTexqfTcIIkpU3WyMyDqDg9c0GoNmaFVZOvpDi9cR0uLeSVzIWH2uhjzB bntFNpPzVG+KUgmY9xFmLGFQ/7v5e67vpY1Nvp8J313Z3hrqumJlfxZ1OJaVpRATV599 8al9yB0crLGUAAGEFySYPLFdumj9LMDvMZ4ConiK/a2jB87ZaWM2gs39FyTOmxrZe7DQ odqmCu4QREhBf1Nq64Mpem7hQpe1w3svrN3+Q4Xmf9EFmCwzEBX9piiPaHMHTQegVUTk qYEJ/usj+f/hC0qYNakKLjsayuUAbHJ6xAc3m1FkX0hF/YqLs/Wfh6kRU7uvNrzgQ/RJ PSZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lTvGAjUBHokhz47gGcffyY4wlijj7lVsJzRf6BwegRA=; b=EnLVrBMu7mssy9pjxXmwJj457VwFm1NBZGxPXUqvgrzFcaiciOA80Ox0caG3+tQKcD 4nFfbn/SSbRKiIuZ8+6mJG9cjCzFFGMQR2sAIk/6NrVABlcGPaohhz96FF4LmFfXqHfq ywEbFvdi9cpAwTDv5Kebf1BokK1JcTX3wt+vlGHAbxpWrq//emXemoHMiXMFrveO20Mu r4+wOORsAib7svVlEUPvea1IlcnofxbtC5FxyPFJWkr0Um/1gaoF6XQxRKGxSMslr4Ah qsL3iW3Q+fpljlm2TOq6CrtE0lEulPj3CAy2/UQmrL9R90N787gR/xLxZTN+004wSf9d dz6Q== X-Gm-Message-State: AOAM531tB8a2xZB86Actz/9He2ZcllUmEiz+mZSx40jkRpOEDqhC5qpY 7GHnVaCqGkvxomuCAAGrws++TQ== X-Received: by 2002:a17:906:2991:b0:6cf:6b24:e92f with SMTP id x17-20020a170906299100b006cf6b24e92fmr18985833eje.748.1649436885195; Fri, 08 Apr 2022 09:54:45 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id p17-20020aa7d311000000b00419449b00e9sm10657021edq.64.2022.04.08.09.54.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Apr 2022 09:54:43 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 6614B1FFC4; Fri, 8 Apr 2022 17:47:45 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 13/15] plugins: extend execlog to filter matches Date: Fri, 8 Apr 2022 17:47:40 +0100 Message-Id: <20220408164742.2844631-14-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, stefanha@redhat.com, crosa@redhat.com, aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, Alexandre Iooss , =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Sometimes the whole execlog is just two much so add the ability to filter by instruction opcode or address. [AJB: this shows for example .qemu-system-aarch64 -display none -serial mon:stdio \ -M virt -cpu max \ -semihosting-config enable=on \ -kernel ./tests/tcg/aarch64-softmmu/memory-sve \ -plugin ./contrib/plugins/libexeclog.so,ifilter=st1w,afilter=0x40001808 -d plugin -D plugin.out the st1w SVE instruction is not instrumenting its stores.] Signed-off-by: Alex Bennée Reviewed-by: Alexandre Iooss Cc: Robert Henry Cc: Aaron Lindsay --- docs/devel/tcg-plugins.rst | 9 +++- contrib/plugins/execlog.c | 96 ++++++++++++++++++++++++++++++++------ 2 files changed, 90 insertions(+), 15 deletions(-) diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst index a7cc44aa20..a503d44cee 100644 --- a/docs/devel/tcg-plugins.rst +++ b/docs/devel/tcg-plugins.rst @@ -346,7 +346,7 @@ The execlog tool traces executed instructions with memory access. It can be used for debugging and security analysis purposes. Please be aware that this will generate a lot of output. -The plugin takes no argument:: +The plugin needs default argument:: qemu-system-arm $(QEMU_ARGS) \ -plugin ./contrib/plugins/libexeclog.so -d plugin @@ -364,6 +364,13 @@ which will output an execution trace following this structure:: 0, 0xd34, 0xf9c8f000, "bl #0x10c8" 0, 0x10c8, 0xfff96c43, "ldr r3, [r0, #0x44]", load, 0x200000e4, RAM +the output can be filtered to only track certain instructions or +addresses using the `ifilter` or `afilter` options. You can stack the +arguments if required:: + + qemu-system-arm $(QEMU_ARGS) \ + -plugin ./contrib/plugins/libexeclog.so,ifilter=st1w,afilter=0x40001808 -d plugin + - contrib/plugins/cache.c Cache modelling plugin that measures the performance of a given L1 cache diff --git a/contrib/plugins/execlog.c b/contrib/plugins/execlog.c index a5275dcc15..e659ac9cbb 100644 --- a/contrib/plugins/execlog.c +++ b/contrib/plugins/execlog.c @@ -20,6 +20,9 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_version = QEMU_PLUGIN_VERSION; /* Store last executed instruction on each vCPU as a GString */ GArray *last_exec; +static GPtrArray *imatches; +static GArray *amatches; + /** * Add memory read or write information to current instruction log */ @@ -85,12 +88,13 @@ static void vcpu_insn_exec(unsigned int cpu_index, void *udata) static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) { struct qemu_plugin_insn *insn; - uint64_t insn_vaddr; - uint32_t insn_opcode; - char *insn_disas; + bool skip = (imatches || amatches) ? true : false; size_t n = qemu_plugin_tb_n_insns(tb); for (size_t i = 0; i < n; i++) { + char *insn_disas; + uint64_t insn_vaddr; + /* * `insn` is shared between translations in QEMU, copy needed data here. * `output` is never freed as it might be used multiple times during @@ -99,20 +103,52 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) * a limitation for CISC architectures. */ insn = qemu_plugin_tb_get_insn(tb, i); - insn_vaddr = qemu_plugin_insn_vaddr(insn); - insn_opcode = *((uint32_t *)qemu_plugin_insn_data(insn)); insn_disas = qemu_plugin_insn_disas(insn); - char *output = g_strdup_printf("0x%"PRIx64", 0x%"PRIx32", \"%s\"", - insn_vaddr, insn_opcode, insn_disas); + insn_vaddr = qemu_plugin_insn_vaddr(insn); + + /* + * If we are filtering we better check out if we have any + * hits. The skip "latches" so we can track memory accesses + * after the instruction we care about. + */ + if (skip && imatches) { + int j; + for (j = 0; j < imatches->len && skip; j++) { + char *m = g_ptr_array_index(imatches, j); + if (g_str_has_prefix(insn_disas, m)) { + skip = false; + } + } + } + + if (skip && amatches) { + int j; + for (j = 0; j < amatches->len && skip; j++) { + uint64_t v = g_array_index(amatches, uint64_t, j); + if (v == insn_vaddr) { + skip = false; + } + } + } - /* Register callback on memory read or write */ - qemu_plugin_register_vcpu_mem_cb(insn, vcpu_mem, - QEMU_PLUGIN_CB_NO_REGS, - QEMU_PLUGIN_MEM_RW, NULL); + if (skip) { + g_free(insn_disas); + } else { + uint32_t insn_opcode; + insn_opcode = *((uint32_t *)qemu_plugin_insn_data(insn)); + char *output = g_strdup_printf("0x%"PRIx64", 0x%"PRIx32", \"%s\"", + insn_vaddr, insn_opcode, insn_disas); + + /* Register callback on memory read or write */ + qemu_plugin_register_vcpu_mem_cb(insn, vcpu_mem, + QEMU_PLUGIN_CB_NO_REGS, + QEMU_PLUGIN_MEM_RW, NULL); + + /* Register callback on instruction */ + qemu_plugin_register_vcpu_insn_exec_cb(insn, vcpu_insn_exec, + QEMU_PLUGIN_CB_NO_REGS, output); + } - /* Register callback on instruction */ - qemu_plugin_register_vcpu_insn_exec_cb(insn, vcpu_insn_exec, - QEMU_PLUGIN_CB_NO_REGS, output); } } @@ -132,6 +168,25 @@ static void plugin_exit(qemu_plugin_id_t id, void *p) } } +/* Add a match to the array of matches */ +static void parse_insn_match(char *match) +{ + if (!imatches) { + imatches = g_ptr_array_new(); + } + g_ptr_array_add(imatches, match); +} + +static void parse_vaddr_match(char *match) +{ + uint64_t v = g_ascii_strtoull(match, NULL, 16); + + if (!amatches) { + amatches = g_array_new(false, true, sizeof(uint64_t)); + } + g_array_append_val(amatches, v); +} + /** * Install the plugin */ @@ -145,6 +200,19 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id, */ last_exec = g_array_new(FALSE, FALSE, sizeof(GString *)); + for (int i = 0; i < argc; i++) { + char *opt = argv[i]; + g_autofree char **tokens = g_strsplit(opt, "=", 2); + if (g_strcmp0(tokens[0], "ifilter") == 0) { + parse_insn_match(tokens[1]); + } else if (g_strcmp0(tokens[0], "afilter") == 0) { + parse_vaddr_match(tokens[1]); + } else { + fprintf(stderr, "option parsing failed: %s\n", opt); + return -1; + } + } + /* Register translation block and exit callbacks */ qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans); qemu_plugin_register_atexit_cb(id, plugin_exit, NULL); From patchwork Fri Apr 8 16:47:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 558857 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp501335map; Fri, 8 Apr 2022 09:59:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzDRaurB4obT4JIHJs8rFVtmt5kLoR+mLSVoRnyOfU+5MByUE7OevcdVRsHPbl8phI7UBe2 X-Received: by 2002:a05:6902:13c1:b0:61d:969c:109c with SMTP id y1-20020a05690213c100b0061d969c109cmr14674298ybu.133.1649437172507; Fri, 08 Apr 2022 09:59:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649437172; cv=none; d=google.com; s=arc-20160816; b=ENkqBCn3L8TTCzrxD6MrbbuG1dvNCM/suxjNOpByN6QdoSsh9NwQuKxK++xbb9dKp8 cZ8QC9Oq0ZYmBJRsNVtvhUIay45F4b8Y5PXapfLxoKLLw19Ch0HJbNjiQde4083aGieF TJyjjSgux4y4l8+7Lc4gYKrcw1mXuqBBn03DuxlPBd9QzLOwPfryqGoPRrlzBCuQQsnS rSUkmw0LKcyot++CNk6hUI29ugKSQQHfrGTFz0YSw7pLBXh9oH36WIHWuTnII8+qYVsB abvUBVVYCkpJDFk8Vdsfj3j9JC0wJd9sdJ1+Z9zNRuFBTOjIFpwfxIeYhtHD4Od0UdpU gyug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=KFP0HbJwpn4b/8mC3zm1M94yL+pYYUEsnbWxKZ7xRO4=; b=cMCeGOeBsBr3UKmbMawDqpNEWjTjH/W96q+GaqpnsHxpcrRE23TQ/RzGUBXfhjKD4C UyF5de+Ue1kNuHWiQufs6SScM2MO0MxqyiHeGyJXsx2jiw10vt0zPKuzJi95G4dOBEBW JrtX65IKg07nv30/jYh/SyvxJO7LpGQe2ssgXBM15c6kek5E147ciZEPqu8uq7w1L2LI 5+DPNV6osLTBkw1lw8QBPdY2qyM1A/wuWVbyd+XVWgnl19uRKsCtaBGhMwP7OhFJjyLe kJmA82oXn25Tfucm4LEfCvEgUcEmT38vJpRxLmbDM5PtNvBEyoa5pJqtp/bwXx2E+tBs 2QXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="w2Bx6K/B"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 08 Apr 2022 09:54:43 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 97FCD1FFBA; Fri, 8 Apr 2022 17:47:45 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 14/15] plugins: Assert mmu_idx in range before use in qemu_plugin_get_hwaddr Date: Fri, 8 Apr 2022 17:47:41 +0100 Message-Id: <20220408164742.2844631-15-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52b; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, Damien Hedde , berrange@redhat.com, stefanha@redhat.com, crosa@redhat.com, Richard Henderson , aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, Alexandre Iooss , =?utf-8?q?Alex_?= =?utf-8?q?Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Coverity reports out-of-bound accesses here. This should be a false positive due to how the index is decoded from MemOpIdx. Fixes: Coverity CID 1487201 Signed-off-by: Richard Henderson Reviewed-by: Damien Hedde Message-Id: <20220401190233.329360-1-richard.henderson@linaro.org> Signed-off-by: Alex Bennée --- plugins/api.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/plugins/api.c b/plugins/api.c index 7bf71b189d..2078b16edb 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -289,6 +289,8 @@ struct qemu_plugin_hwaddr *qemu_plugin_get_hwaddr(qemu_plugin_meminfo_t info, enum qemu_plugin_mem_rw rw = get_plugin_meminfo_rw(info); hwaddr_info.is_store = (rw & QEMU_PLUGIN_MEM_W) != 0; + assert(mmu_idx < NB_MMU_MODES); + if (!tlb_plugin_lookup(cpu, vaddr, mmu_idx, hwaddr_info.is_store, &hwaddr_info)) { error_report("invalid use of qemu_plugin_get_hwaddr"); From patchwork Fri Apr 8 16:47:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 558859 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:6886:0:0:0:0 with SMTP id m6csp504081map; Fri, 8 Apr 2022 10:02:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzx5lGz12Uca4cl8GDYSEAHSXpcHBS/eu5hPUNvS3mNKLdp4KQ2Xr5aR+bk/k9dsE9KJxWv X-Received: by 2002:a5b:488:0:b0:61d:a178:68c9 with SMTP id n8-20020a5b0488000000b0061da17868c9mr14997011ybp.554.1649437349872; Fri, 08 Apr 2022 10:02:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1649437349; cv=none; d=google.com; s=arc-20160816; b=iLJUn//MCRMmmXSLrV52WSLtvBY3nFXxDQBwFeTL9ooyNiNp/X3s4rM6GCleVKQlfl HbK04KA7xGDd/EhjTKvtBZQ4YbDKIIaAuuCaY1ZkV0OSf0OcSi6W/8crozV/xpt72lap +vjugXm1EYcc3L/M4wxfPp3VzwnQ4qEGPDJckndSarVMf+p6YGHb4Hd2I4C9hPpVql+U sTKcQ/+0dancC1wRR/MgHNRS3OPPjH7/o8EMQjTAvtwDlWvEjtqreC51ZiCtIrYPsLz/ niBB/9FW3sHT4b0WGD0EwI+4SvwzszTFmh80w1bbE9lPz01XEMmuDdAwkDBdyuzrbMbf no8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=8RvB6WmUyabhe4EY+P1jACVM2phgaOzNjeVgtjqCztg=; b=Braanzl0RZ0dH762EwaIjVSuiRMUQAiPWe2OL1airV8cabJDafxaGgP+enjPIQWuP9 l+seGpmrJKUahW0RMTAAjH98wu5NMA6/mWbIHh7nNM7qIt5TZJHujllYf7uCb3UHEYm/ gjVZC6Mxe9LCCez6QYPqeYh8YZY1iV+tOWLFntBw9e24zaqZGWrU06h0lb9iWPmInogO bcj0EjKp49ZcnxyBpkMnRmDfO8K17aYPKHFG6q75TYMubzvCs3r4kv+HdouP+CC0vZmH 1t7WczYUzxx8SSt416EEg54cFY6gKgpKYLMz1wYXXsqcJjGvucWiiW/ep9UQdwxnik1Y HHdA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=YpXssetP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 08 Apr 2022 09:54:43 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id B9F681FFC5; Fri, 8 Apr 2022 17:47:45 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 15/15] accel/tcg: add heuristic to invalidate al TBs in a page [hack!] Date: Fri, 8 Apr 2022 17:47:42 +0100 Message-Id: <20220408164742.2844631-16-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, stefanha@redhat.com, crosa@redhat.com, Richard Henderson , aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is a dumb attempt to reduce to the execution time of UEFI booted kernels and almost certainly not what the final solution should be. The problem is if we have generated JIT code from running firmware we can spend a lot of time carefully invalidating every TB in a page when the kernel that eventually boots and clears all the pages in RAM. This fix simply assumes any write to the start of the page should invalidate everything in the page. Once that is done following writes to the page should all follow the fast path. Signed-off-by: Alex Bennée --- accel/tcg/translate-all.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 625c46dd9b..67884260fa 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1830,6 +1830,16 @@ void tb_invalidate_phys_page_fast(struct page_collection *pages, uintptr_t retaddr) { PageDesc *p = page_find(start >> TARGET_PAGE_BITS); + unsigned int nr = start & ~TARGET_PAGE_MASK; + + /* + * Assume any write to the start of the page is start of clearing + * the whole page. To avoid coming back multiple times lets just + * invalidate everything first. + */ + if (nr == 0) { + len = TARGET_PAGE_SIZE; + } if (trace_event_get_state_backends(TRACE_TB_INVALIDATE_PHYS_PAGE_FAST)) { TranslationBlock *tb = tcg_tb_lookup(retaddr); @@ -1850,10 +1860,8 @@ void tb_invalidate_phys_page_fast(struct page_collection *pages, build_page_bitmap(p); } if (p->code_bitmap) { - unsigned int nr; unsigned long b; - nr = start & ~TARGET_PAGE_MASK; b = p->code_bitmap[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG - 1)); if (b & ((1 << len) - 1)) { goto do_invalidate;