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[209.132.180.67]) by mx.google.com with ESMTP id p127si15875161pfp.119.2018.12.12.02.18.12; Wed, 12 Dec 2018 02:18:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Zv2SmyqN; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727102AbeLLKSM (ORCPT + 6 others); Wed, 12 Dec 2018 05:18:12 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:53560 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727100AbeLLKSL (ORCPT ); Wed, 12 Dec 2018 05:18:11 -0500 Received: by mail-wm1-f65.google.com with SMTP id y1so5112682wmi.3 for ; Wed, 12 Dec 2018 02:18:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=aA3D1IhSCKQz7ydTdRheC5zDEQ2AVfQeUKpiJ99CzJc=; b=Zv2SmyqNk0ZcoT3RgrBsgFumoEIbGymgm22C+BHHXZUfCyiY5TkYc8cCYA6mE9VjJR M361CR7pgrv2jS/+TXJ8HG5ahEaX5xp123DMPVhSUVmeETKSDEaA64xY0heVa4dVVJ/G oUBIxrMbIzuINVi4/8opKMxTHgQE3HoTaGxKI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=aA3D1IhSCKQz7ydTdRheC5zDEQ2AVfQeUKpiJ99CzJc=; b=fFtQxqCvLvgNhxfXKJ3c9Vw1ZqJIU8yirlI1Oi2K+xORvruH+fX87mSZxKqhU8EglY su28S5vsDBsVhKVRKVDc3VHGQFwUrvh6gumStfrY4HOJ+Pkkcu4whAPBNRgqIDK1/K5a mMbSSKzr5/RMGc4HUhly2A0S4UcE7no9c9IDbyvJ1hM4H3FmCnUB7vsBToQ6rFw2cH+1 +cRuyhRPj+5gcX/gf6BqBYFRnb5RQn2cCVTR4vbVZQfqaMAb9J8QiYdp+SvMFeNqZ8Co nGkU3TcFcXDmWtgBwGDQTNe+22oFBCfkvFlsMYbleSnPiWXs+m/oFWBCZ04HVVoQGKd3 14ww== X-Gm-Message-State: AA+aEWY494aNqOJpJ8/Bn8xWgH/TCrXivZgixnZgxFpAOJcrP22PP/re vSkF1fCKyKSokoWKNc2kN6bKeA== X-Received: by 2002:a1c:8095:: with SMTP id b143mr5535109wmd.63.1544609890293; Wed, 12 Dec 2018 02:18:10 -0800 (PST) Received: from localhost ([49.248.93.253]) by smtp.gmail.com with ESMTPSA id q9sm2941791wrv.26.2018.12.12.02.18.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 12 Dec 2018 02:18:09 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, mka@chromium.org, khasim.mohammed@linaro.org, devicetree@vger.kernel.org, Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Rob Herring , Mark Rutland , Douglas Anderson , Siddartha Mohanadoss , linux-iio@vger.kernel.org (open list:IIO SUBSYSTEM AND DRIVERS) Subject: [PATCH v1 1/2] dt-bindings: iio: adc: Add binding for ADC on pms405 PMIC Date: Wed, 12 Dec 2018 15:47:54 +0530 Message-Id: <3aac8c4cd7648589d0eef994376357509e284030.1544599950.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org PMS405 contains a variant of the spmi-adc-rev2 ADC. Create a new compatible inorder to handle any differences. Signed-off-by: Amit Kucheria --- Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt index b3c86f4ac7cd..7ee94496b144 100644 --- a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt +++ b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt @@ -13,6 +13,7 @@ VADC node: Definition: Should contain "qcom,spmi-vadc". Should contain "qcom,spmi-adc5" for PMIC5 ADC driver. Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver. + Should contain "qcom,pms405-adc" for PMS405 PMIC - reg: Usage: required