From patchwork Mon Dec 10 13:56:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 153266 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3588535ljp; Mon, 10 Dec 2018 05:56:47 -0800 (PST) X-Google-Smtp-Source: AFSGD/UmgwFRai0eP6wdH2tnwWTLndYAn1M5QawHZWwWgfMMqgIxg63qmnVTL4UnLkK/51KwleAW X-Received: by 2002:a62:83ce:: with SMTP id h197mr12366013pfe.187.1544450207403; Mon, 10 Dec 2018 05:56:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544450207; cv=none; d=google.com; s=arc-20160816; b=xhuAOJeS6C2shkrRykeCPz5MQmXPP93KH+kIDYJrbwFLwJXBi7R0mIQRh12eBzvUcV s0Ni6ogemrOT5D5tQlrftxRXVTHOPjPVe3aawkr+bw9LVtG5/rNtBAVfnu3iNyqafnRl IKgMVcCY5g4hYFtfQ6WG2o7CcdLtOQWAeKxZVPAs2q2MhOtZot46YOJJ4pk9TJR7w5jr 7mhFLVmCZeKZynyVCmsmIP5RIDTbWaxDcvUEVp2NrE9YREexRVR826dPSvcScrpRvJNt FOEzJSoaxLzolbqV5itbzjwVNdiA9ZJtBK8uhl1f14pSiBXGm0n1sO9pdu2folDSLbq8 8PRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pcqzNhK37A8PsauAg3JtU8lMxDR18aEHWGkU2JQ1rE0=; b=EqtUFNWxmVS8Y9hKp32pHzF/0WHoSw+Gz6nLotmnA4ZFjTwbzJs5F276Yo578JZ3QT Py0xctGCqAn9UDxUdOR9f4hEmMUwVdv3/mYl78BjeqRfMmm05ZvCuNhbbrJbNSBdUwUA LRiiXfCJmqOttE8fvsFTaIvcOsyXEZqOKwno9FbCkWKHMOBEl5fZ3cDmEb/4OXFtR3x0 TghPAwWoXbTKdugkZWNEbPiTpiMdp90n50XZ+wB1LiP5DYos8iYVqoe20oAuMPUtDpq2 THPYQGvOdX1FgTqRnBreo83m2ppnE52e5MkKcD6JrFE4FjXMlSoQIHyBY+3geAeyvBqS hcig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FEyYX0GK; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m1si9640858pgm.194.2018.12.10.05.56.47; Mon, 10 Dec 2018 05:56:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FEyYX0GK; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727642AbeLJN4n (ORCPT + 15 others); Mon, 10 Dec 2018 08:56:43 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:50379 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727583AbeLJN4m (ORCPT ); Mon, 10 Dec 2018 08:56:42 -0500 Received: by mail-wm1-f67.google.com with SMTP id n190so11081830wmd.0 for ; Mon, 10 Dec 2018 05:56:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pcqzNhK37A8PsauAg3JtU8lMxDR18aEHWGkU2JQ1rE0=; b=FEyYX0GKa7zyo+R0sR4Al5ZZHyAtV+pGZEqp4CiUepxHiYZqEBsXFlR1TYmcTrnVZw 8lg8RNseo7ueCBO4fPikaa03osiOzSFs5JvQb0VtPRQMTi9lN+AOYlegr2jN2MjgGgP9 XdtDj+BwrdDcwXtJJ/rVJDO5fAweLc3T5NdWk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pcqzNhK37A8PsauAg3JtU8lMxDR18aEHWGkU2JQ1rE0=; b=YyA3GDHYXpWdy4FqOZdvnMD6LE5AF8vGoEz0IQYoVOSg/x3yoOQHIDY17aHhBstv86 UV7U7EKWsWqS24Qszy+/o280l4HhPpi64mou0b+N1bnfp6UPqnxf/IzLgHH3VZn4/r05 8ko8zOO78cmxkjcIdXnFkfClQ810J4M/4qjvNZGCtOjdDsJajI+tz6xsG6+NA6LU11y6 gzYobHnSiB4wTj0BXr7rHx0It1UUk7TqwyIH0JOSUl3DsPc2L2NiQwoErmGPWwfLc5fT wgFOO5vmElyJcLB4gOZ1pzk7NcyUOqPj9QLaKo2T78rcrWecL8Ogz6ZXNfKH47ReZ8qP 5n4w== X-Gm-Message-State: AA+aEWa9263IPZoBJs0pSvVp3sDx2XMvvoCZcOZgKl9145bErh61cymh CVOt/KIutoddfl2pRu9bTYDvOg== X-Received: by 2002:a1c:d14d:: with SMTP id i74mr10129357wmg.100.1544450200855; Mon, 10 Dec 2018 05:56:40 -0800 (PST) Received: from srini-hackbox.lan (cpc89974-aztw32-2-0-cust43.18-1.cable.virginm.net. [86.30.250.44]) by smtp.gmail.com with ESMTPSA id c14sm8612506wme.13.2018.12.10.05.56.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 10 Dec 2018 05:56:40 -0800 (PST) From: Srinivas Kandagatla To: marc.zyngier@arm.com Cc: sudeep.holla@arm.com, tglx@linutronix.de, jason@lakedaemon.net, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, rnayak@codeaurora.org, sboyd@kernel.org, bjorn.andersson@linaro.org, nicolas.dechesne@linaro.org, ctatlor97@gmail.com, vkoul@kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v5 3/4] irqchip: gic-v3: Add quirk for msm8996 secured registers Date: Mon, 10 Dec 2018 13:56:32 +0000 Message-Id: <20181210135633.30283-4-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181210135633.30283-1-srinivas.kandagatla@linaro.org> References: <20181210135633.30283-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Access to GICR_WAKER is restricted on msm8996 SoC in Hypervisor. Its been more than 2+ years of wait for this to be fixed, which has no hopes to be fixed. This change was introduced for the "lead device" on msm8996 platform. It looks like all publicly available msm8996 and other Qualcomm SoCs have this implementation. So add a quirk to not access this register on msm8996. With this quirk MSM8996 can at least boot out of mainline, which can help community to work with boards based on MSM8996 and other SoCs with have this restrictions. This Quirk is based on device tree compatible string. Without this patch Qualcomm DB820c board reboots when GICR_WAKER is accessed. Signed-off-by: Srinivas Kandagatla --- drivers/irqchip/irq-gic-v3.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) -- 2.19.2 diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index df1ff3b5836a..0868a9d81c3c 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -41,6 +41,8 @@ #include "irq-gic-common.h" +#define FLAGS_WORKAROUND_GICR_WAKER_MSM8996 (1ULL << 0) + struct redist_region { void __iomem *redist_base; phys_addr_t phys_base; @@ -55,6 +57,7 @@ struct gic_chip_data { struct irq_domain *domain; u64 redist_stride; u32 nr_redist_regions; + u64 flags; bool has_rss; unsigned int irq_nr; struct partition_desc *ppi_descs[16]; @@ -139,6 +142,9 @@ static void gic_enable_redist(bool enable) u32 count = 1000000; /* 1s! */ u32 val; + if (gic_data.flags & FLAGS_WORKAROUND_GICR_WAKER_MSM8996) + return; + rbase = gic_data_rdist_rd_base(); val = readl_relaxed(rbase + GICR_WAKER); @@ -1067,6 +1073,15 @@ static const struct irq_domain_ops partition_domain_ops = { .select = gic_irq_domain_select, }; +static bool gic_enable_quirk_msm8996(void *data) +{ + struct gic_chip_data *d = data; + + d->flags |= FLAGS_WORKAROUND_GICR_WAKER_MSM8996; + + return true; +} + static int __init gic_init_bases(void __iomem *dist_base, struct redist_region *rdist_regs, u32 nr_redist_regions, @@ -1272,6 +1287,11 @@ static void __init gic_of_setup_kvm_info(struct device_node *node) } static const struct gic_quirk gic_quirks[] = { + { + .desc = "GICv3: Qualcomm MSM8996 broken firmware", + .compatible = "qcom,msm8996-gic-v3", + .init = gic_enable_quirk_msm8996, + }, { } };