From patchwork Fri Dec 7 17:51:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153182 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp781711ljp; Fri, 7 Dec 2018 09:52:25 -0800 (PST) X-Google-Smtp-Source: AFSGD/WtqC4NsLX+IM/3kBMCmEBuR3OmrtSUuD8mjugW04k5w9h8UXR9Q2GS99cAddWiEFcIoOnW X-Received: by 2002:a63:2744:: with SMTP id n65mr2777801pgn.65.1544205145104; Fri, 07 Dec 2018 09:52:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544205145; cv=none; d=google.com; s=arc-20160816; b=RKZJ2QR17Tddsay+F7nw4lS20NSGwnLBW15O55OcS5nNsnMWr01gP2CNIXMMLn5wlz 9lh77FR1adrbgXUpfrlutKgvW+kMGdBH0mdGoqHQa8UW9Z77FgKBxZKTLz182wYu+H0y SMbu+QdzmnYqdENWYSok0VuYX30CUrYOqvGHFSpaLx+h3nq+I8Y4lLRNwRfOYx9yMI5P kV5k4SX+Pc7xTvQ7M//dXre1eVmKazmXTJgq8pytMDbIM0vZjiEXRtET9YyH66Gz5b5h ynQuxHsk7QT8e7TyrnO/sbLx10dIQ0QNmqHTy3As+jnLC53Y99xs2H9vhjaD22UFXB1n yxUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ZLG0p6pOlEKJqG/ydnT1Alp81sx/m3rHMuhpQtuwbbQ=; b=tOCuVz+LX35PH5rBczjJdFHT84Rqwpvigekci+PGqA6t02aY0pB7XODcV/eyi9R9S5 cYqs2j4dfao17t6y5kqf7XLAESCMz/b5TJ7zPgdy9hbok9JhcGGJrZcZdXHhFvwumpr5 DvGIDWQQBBUsbQRPo2FsrAL+y3xjeCuW+Jgb4o4pqptNIKNil3vFlq6RWC8KYwtzKbXc 2wW3b9KqxQx0yMvmFT22CckKxokaiUXMG+Hpc8H+BWG+Ln4CBA0qbpJYqEKZbGOMcCgv Vy7ljiynFCCoKIhxRUy8QPqdNMKjvVvJMWSwBTlYbD/2zFOT/TleUTm2vAZfMNO6Q0jN hnvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CDG64jxc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a90si3437189plc.314.2018.12.07.09.52.24; Fri, 07 Dec 2018 09:52:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CDG64jxc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726207AbeLGRwW (ORCPT + 31 others); Fri, 7 Dec 2018 12:52:22 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:44290 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726191AbeLGRwV (ORCPT ); Fri, 7 Dec 2018 12:52:21 -0500 Received: by mail-pf1-f194.google.com with SMTP id u6so2267480pfh.11 for ; Fri, 07 Dec 2018 09:52:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZLG0p6pOlEKJqG/ydnT1Alp81sx/m3rHMuhpQtuwbbQ=; b=CDG64jxcm0aKiEOo/CvP1uys/yXY2smXYvbDa0wDPtM8KyZzjnrpE98lu/weu2FH6H MwV/wzmSJuWzFMvVdd89RVDLduEi+Rlt7hzCAxh4V2PFzY3dnAoM6tIK5ZU+tJQAjGYV EzMakTWhCKQ7hwc9EM1KhNOp/rB1+UwEUF9fY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZLG0p6pOlEKJqG/ydnT1Alp81sx/m3rHMuhpQtuwbbQ=; b=f/U/p3XNajZiuiiZ+pLppCa+0/mjgnHJlTdK1+H5Rq67Hb3LRDwg2DSw5VXO1hOeLu Q4jkA/fLF464FtYkOVc4znxTio2lK7EiD0edI6Khj45TYw2ADBI2A4FaUe8Yl7Fu/Ro3 HH96KjwtSQ8bKFihXcUpKEuajVmL6iaQpl+tSX6kIHiP2cBiwji9LhXJz+wrcMKmnV8M B0blqNRWS9CP9t+rhzoGN2SKjXSS7RLrwql89NztM/uRb9hYjvKVZnaayHkVc7i4TWS8 VHNi2/bgTp/p3lzAO5OUBGyGuHuxVJh0rZkH9IT0hr7d5cuXwSducyHdw96vFrfoWlAx RTtQ== X-Gm-Message-State: AA+aEWaOt6g/gCTKefzDKq8azVLAs/mxIZTYRV6DYE2i4K+JQFOVTAPR hMuijQbBWfQ5baoXo6GmsbpM X-Received: by 2002:aa7:824f:: with SMTP id e15mr2487484pfn.192.1544205141034; Fri, 07 Dec 2018 09:52:21 -0800 (PST) Received: from localhost.localdomain ([2405:204:7207:e9c8:7189:c4b2:429f:42db]) by smtp.gmail.com with ESMTPSA id k191sm4611387pgd.9.2018.12.07.09.52.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Dec 2018 09:52:20 -0800 (PST) From: Manivannan Sadhasivam To: vinholikatti@gmail.com, jejb@linux.vnet.ibm.com, martin.petersen@oracle.com, liwei213@huawei.com, robh+dt@kernel.org Cc: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, john.stultz@linaro.org, amit.kucheria@linaro.org, guodong.xu@linaro.org, Manivannan Sadhasivam Subject: [PATCH 2/3] arm64: dts: hisilicon: hi3670: Add UFS controller support Date: Fri, 7 Dec 2018 23:21:50 +0530 Message-Id: <20181207175151.8969-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181207175151.8969-1-manivannan.sadhasivam@linaro.org> References: <20181207175151.8969-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add UFS controller support for HiSilicon HI3670 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 6ccdf5040ffd..285219dd657f 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -654,6 +654,24 @@ clock-names = "apb_pclk"; }; + /* UFS */ + ufs: ufs@ff3c0000 { + compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1"; + /* 0: HCI standard */ + /* 1: UFS SYS CTRL */ + reg = <0x0 0xff3c0000 0x0 0x1000>, + <0x0 0xff3e0000 0x0 0x1000>; + interrupt-parent = <&gic>; + interrupts = ; + clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>, + <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>; + clock-names = "ref_clk", "phy_clk"; + freq-table-hz = <0 0>, <0 0>; + /* offset: 0x84; bit: 12 */ + resets = <&crg_rst 0x84 12>; + reset-names = "rst"; + }; + /* SD */ dwmmc1: dwmmc1@ff37f000 { compatible = "hisilicon,hi3670-dw-mshc"; From patchwork Fri Dec 7 17:51:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153183 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp781822ljp; Fri, 7 Dec 2018 09:52:33 -0800 (PST) X-Google-Smtp-Source: AFSGD/WpgKJqE0z7q5PIRaboDztIEsvSiXt4mBkvR8dFfIcQ19rFMJR683tEK6RGFjzNAd39Ee5k X-Received: by 2002:a63:30c8:: with SMTP id w191mr2877636pgw.120.1544205152868; Fri, 07 Dec 2018 09:52:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544205152; cv=none; d=google.com; s=arc-20160816; b=HR/6de8YQy3lU87FN3l2AmUWw1AFaCGoWxeU0ZjuERzDdCRJNiKZh+/Fp+yY+6t6xQ J9RwsSmK4eDio8Y7EkkS2xJASn9LKpr1dyHruTUqo0zGET12HMTo7hwR1k4NFGza2CcW Dj4Mnox7xggDv4TNfJ8moOHEqeVSMkEYJwroGM+cwKvebMy82R8SdpzB2njxTwYzR/nx Ftt9efAhPMcC0l7+VsxH8zaDViC3P3FrUbpR7A1EChXujTgIz5ZQzaCO6gMcgec+5xWU 0oUHe5GPQXKq/svXRTkujnc8rE9h6C4uCAgmnrMCQdkopikJCGyVvUlYpCxLZVT7LnXH 5dMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=jxq8DubluUc6WyBU2XbyE9/uiwXvqfVs8mJ2HYI7f2c=; b=suP6r30Sh5QrBquUG3pDEUAablH4cVlQgNEigY03TwgZbRGrjsmtkfqa17zKlN8Bmv f35AFaODQ4Lb5312Kj0tsvZbPa4srD0hWcEgyEp+iwJGAtdjkAeaY5BhJBDtRl27nIFI +skq6npJ0F+uFJgj8xj3cUiTXOfSIyXxgnZO3pSlpAwwFf8Uti1vbakEmaFlnKkVDVpc USct+0rFeQ2YbMFQrsehSJybn0SpaxFMBIoOqGPbrUYxcgZ5HoDIuLN0GhmcTxNSn7WP Wm2VQR8j1gKsf7u0FrPeN6pVnzHj3xFbJCU7ZjC6qpd8/nLfzILc6x98VqQ/s78f22JJ ATyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CmmR0UI+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f63si3820331pfg.136.2018.12.07.09.52.32; Fri, 07 Dec 2018 09:52:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CmmR0UI+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726226AbeLGRw3 (ORCPT + 31 others); Fri, 7 Dec 2018 12:52:29 -0500 Received: from mail-pf1-f196.google.com ([209.85.210.196]:36052 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726152AbeLGRw2 (ORCPT ); Fri, 7 Dec 2018 12:52:28 -0500 Received: by mail-pf1-f196.google.com with SMTP id b85so2289576pfc.3 for ; Fri, 07 Dec 2018 09:52:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jxq8DubluUc6WyBU2XbyE9/uiwXvqfVs8mJ2HYI7f2c=; b=CmmR0UI+jMgZYkZQUtx8BwBB1ifEK8Jf6J2NAy2jmOZZsK/F7vSSSBPaI3WMvRSE10 D6Mo4kH7ez2od4RjsP3lJ+RaZwflYkeFlW7VcB1A0bLKTE0c7khoLokMx/LYliW0J5c6 KA2FEvIMtw8evnfAxTAt7TTFCTsT0FCzSzdC4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jxq8DubluUc6WyBU2XbyE9/uiwXvqfVs8mJ2HYI7f2c=; b=RvLtXomdhIvGBjdD+zS5t6xEzJ65+FeQp6sV+mFdnMXJiE4X2iUFPeStMgr5jYw1OO h5YqrKWYNVETluJ+Ro6n90V8tGnUAOQ/U6s6pT75SezUWJLw2yBdAk40o3vOyL1WGcqC ixJyKf9vsvG2Ec34Ww+ZO26o7HcGBnkuK+esOcdLfnXvGEM/qCi9+EKTNqVO1m2bg3AE mqFL4d8qJnDLSpfYGD8RXKdm0D+wtDeQ7X+TPAigl6pmYjXeN5SLc1z8qFRdGPNBCywU E6nDi1CQB158PlNhP3pWHD7X6mUDkUfSYUG/ZebRmR0a28j19Kmi9IfdgpGpf/uRfblP d//g== X-Gm-Message-State: AA+aEWYEtfXxxgtDoUqBbmH3uG5fchQjX0zbTGavjpf7dC5thJslgsvN +1aCE8P60983UbWgzXdeFoxg X-Received: by 2002:a62:2781:: with SMTP id n123mr3220054pfn.138.1544205147793; Fri, 07 Dec 2018 09:52:27 -0800 (PST) Received: from localhost.localdomain ([2405:204:7207:e9c8:7189:c4b2:429f:42db]) by smtp.gmail.com with ESMTPSA id k191sm4611387pgd.9.2018.12.07.09.52.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Dec 2018 09:52:27 -0800 (PST) From: Manivannan Sadhasivam To: vinholikatti@gmail.com, jejb@linux.vnet.ibm.com, martin.petersen@oracle.com, liwei213@huawei.com, robh+dt@kernel.org Cc: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, john.stultz@linaro.org, amit.kucheria@linaro.org, guodong.xu@linaro.org, Manivannan Sadhasivam Subject: [PATCH 3/3] scsi: ufs: Add HI3670 SoC UFS driver support Date: Fri, 7 Dec 2018 23:21:51 +0530 Message-Id: <20181207175151.8969-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181207175151.8969-1-manivannan.sadhasivam@linaro.org> References: <20181207175151.8969-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add HI3670 SoC UFS driver support by extending the common ufs-hisi driver. One major difference between HI3660 ad HI3670 SoCs interms of UFS is the PHY. HI3670 has a 10nm variant PHY and hence this parameter is used to distinguish the configuration. Signed-off-by: Manivannan Sadhasivam --- drivers/scsi/ufs/ufs-hisi.c | 127 +++++++++++++++++++++++++++++------- drivers/scsi/ufs/ufs-hisi.h | 4 ++ 2 files changed, 109 insertions(+), 22 deletions(-) -- 2.17.1 diff --git a/drivers/scsi/ufs/ufs-hisi.c b/drivers/scsi/ufs/ufs-hisi.c index 452e19f8fb47..f2d3df357a97 100644 --- a/drivers/scsi/ufs/ufs-hisi.c +++ b/drivers/scsi/ufs/ufs-hisi.c @@ -66,7 +66,7 @@ static int ufs_hisi_check_hibern8(struct ufs_hba *hba) return err; } -static void ufs_hi3660_clk_init(struct ufs_hba *hba) +static void ufs_hisi_clk_init(struct ufs_hba *hba) { struct ufs_hisi_host *host = ufshcd_get_variant(hba); @@ -80,7 +80,7 @@ static void ufs_hi3660_clk_init(struct ufs_hba *hba) ufs_sys_ctrl_set_bits(host, BIT_SYSCTRL_REF_CLOCK_EN, PHY_CLK_CTRL); } -static void ufs_hi3660_soc_init(struct ufs_hba *hba) +static void ufs_hisi_soc_init(struct ufs_hba *hba) { struct ufs_hisi_host *host = ufshcd_get_variant(hba); u32 reg; @@ -139,6 +139,7 @@ static void ufs_hi3660_soc_init(struct ufs_hba *hba) static int ufs_hisi_link_startup_pre_change(struct ufs_hba *hba) { + struct ufs_hisi_host *host = ufshcd_get_variant(hba); int err; uint32_t value; uint32_t reg; @@ -153,6 +154,14 @@ static int ufs_hisi_link_startup_pre_change(struct ufs_hba *hba) ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8121, 0x0), 0x2D); /* MPHY CBOVRCTRL3 */ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8122, 0x0), 0x1); + + if (host->caps & UFS_HISI_CAP_PHY10nm) { + /* MPHY CBOVRCTRL4 */ + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8127, 0x0), 0x98); + /* MPHY CBOVRCTRL5 */ + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8128, 0x0), 0x1); + } + /* Unipro VS_MphyCfgUpdt */ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD085, 0x0), 0x1); /* MPHY RXOVRCTRL4 rx0 */ @@ -173,10 +182,21 @@ static int ufs_hisi_link_startup_pre_change(struct ufs_hba *hba) ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8113, 0x0), 0x1); ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD085, 0x0), 0x1); - /* Tactive RX */ - ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008F, 0x4), 0x7); - /* Tactive RX */ - ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008F, 0x5), 0x7); + if (host->caps & UFS_HISI_CAP_PHY10nm) { + /* RX_Hibern8Time_Capability*/ + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0092, 0x4), 0xA); + /* RX_Hibern8Time_Capability*/ + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0092, 0x5), 0xA); + /* RX_Min_ActivateTime */ + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008f, 0x4), 0xA); + /* RX_Min_ActivateTime*/ + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008f, 0x5), 0xA); + } else { + /* Tactive RX */ + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008F, 0x4), 0x7); + /* Tactive RX */ + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008F, 0x5), 0x7); + } /* Gear3 Synclength */ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0095, 0x4), 0x4F); @@ -208,7 +228,8 @@ static int ufs_hisi_link_startup_pre_change(struct ufs_hba *hba) if (err) dev_err(hba->dev, "ufs_hisi_check_hibern8 error\n"); - ufshcd_writel(hba, UFS_HCLKDIV_NORMAL_VALUE, UFS_REG_HCLKDIV); + if (!(host->caps & UFS_HISI_CAP_PHY10nm)) + ufshcd_writel(hba, UFS_HCLKDIV_NORMAL_VALUE, UFS_REG_HCLKDIV); /* disable auto H8 */ reg = ufshcd_readl(hba, REG_AUTO_HIBERNATE_IDLE_TIMER); @@ -253,7 +274,7 @@ static int ufs_hisi_link_startup_post_change(struct ufs_hba *hba) return 0; } -static int ufs_hi3660_link_startup_notify(struct ufs_hba *hba, +static int ufs_hisi_link_startup_notify(struct ufs_hba *hba, enum ufs_notify_change_status status) { int err = 0; @@ -391,6 +412,28 @@ static void ufs_hisi_set_dev_cap(struct ufs_hisi_dev_params *hisi_param) static void ufs_hisi_pwr_change_pre_change(struct ufs_hba *hba) { + struct ufs_hisi_host *host = ufshcd_get_variant(hba); + + if (host->caps & UFS_HISI_CAP_PHY10nm) { + /* + * Boston platform need to set SaveConfigTime to 0x13, + * and change sync length to maximum value + */ + /* VS_DebugSaveConfigTime */ + ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0xD0A0), 0x13); + /* g1 sync length */ + ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x1552), 0x4f); + /* g2 sync length */ + ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x1554), 0x4f); + /* g3 sync length */ + ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x1556), 0x4f); + /* PA_Hibern8Time */ + ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x15a7), 0xA); + /* PA_Tactivate */ + ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x15a8), 0xA); + ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xd085, 0x0), 0x01); + } + if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME) { pr_info("ufs flash device must set VS_DebugSaveConfigTime 0x10\n"); /* VS_DebugSaveConfigTime */ @@ -429,7 +472,7 @@ static void ufs_hisi_pwr_change_pre_change(struct ufs_hba *hba) ufshcd_dme_set(hba, UIC_ARG_MIB(0xd046), 32767); } -static int ufs_hi3660_pwr_change_notify(struct ufs_hba *hba, +static int ufs_hisi_pwr_change_notify(struct ufs_hba *hba, enum ufs_notify_change_status status, struct ufs_pa_layer_attr *dev_max_params, struct ufs_pa_layer_attr *dev_req_params) @@ -567,25 +610,72 @@ static int ufs_hi3660_init(struct ufs_hba *hba) return ret; } - ufs_hi3660_clk_init(hba); + ufs_hisi_clk_init(hba); + + ufs_hisi_soc_init(hba); + + return 0; +} + +static int ufs_hi3670_init(struct ufs_hba *hba) +{ + int ret = 0; + struct device *dev = hba->dev; + struct ufs_hisi_host *host; + + ret = ufs_hisi_init_common(hba); + if (ret) { + dev_err(dev, "%s: ufs common init fail\n", __func__); + return ret; + } + + ufs_hisi_clk_init(hba); + + ufs_hisi_soc_init(hba); - ufs_hi3660_soc_init(hba); + /* Add cap for 10nm PHY variant on HI3670 SoC */ + host = ufshcd_get_variant(hba); + host->caps |= UFS_HISI_CAP_PHY10nm; return 0; } -static struct ufs_hba_variant_ops ufs_hba_hisi_vops = { +static struct ufs_hba_variant_ops ufs_hba_hi3660_vops = { .name = "hi3660", .init = ufs_hi3660_init, - .link_startup_notify = ufs_hi3660_link_startup_notify, - .pwr_change_notify = ufs_hi3660_pwr_change_notify, + .link_startup_notify = ufs_hisi_link_startup_notify, + .pwr_change_notify = ufs_hisi_pwr_change_notify, .suspend = ufs_hisi_suspend, .resume = ufs_hisi_resume, }; +static struct ufs_hba_variant_ops ufs_hba_hi3670_vops = { + .name = "hi3670", + .init = ufs_hi3670_init, + .link_startup_notify = ufs_hisi_link_startup_notify, + .pwr_change_notify = ufs_hisi_pwr_change_notify, + .suspend = ufs_hisi_suspend, + .resume = ufs_hisi_resume, +}; + +static const struct of_device_id ufs_hisi_of_match[] = { + { .compatible = "hisilicon,hi3660-ufs", .data = &ufs_hba_hi3660_vops }, + { .compatible = "hisilicon,hi3670-ufs", .data = &ufs_hba_hi3670_vops }, + {}, +}; + +MODULE_DEVICE_TABLE(of, ufs_hisi_of_match); + static int ufs_hisi_probe(struct platform_device *pdev) { - return ufshcd_pltfrm_init(pdev, &ufs_hba_hisi_vops); + const struct of_device_id *of_id; + struct ufs_hba_variant_ops *vops; + struct device *dev = &pdev->dev; + + of_id = of_match_node(ufs_hisi_of_match, dev->of_node); + vops = (struct ufs_hba_variant_ops *)of_id->data; + + return ufshcd_pltfrm_init(pdev, vops); } static int ufs_hisi_remove(struct platform_device *pdev) @@ -596,13 +686,6 @@ static int ufs_hisi_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id ufs_hisi_of_match[] = { - { .compatible = "hisilicon,hi3660-ufs" }, - {}, -}; - -MODULE_DEVICE_TABLE(of, ufs_hisi_of_match); - static const struct dev_pm_ops ufs_hisi_pm_ops = { .suspend = ufshcd_pltfrm_suspend, .resume = ufshcd_pltfrm_resume, diff --git a/drivers/scsi/ufs/ufs-hisi.h b/drivers/scsi/ufs/ufs-hisi.h index 3df9cd7acc29..667dfe39b57e 100644 --- a/drivers/scsi/ufs/ufs-hisi.h +++ b/drivers/scsi/ufs/ufs-hisi.h @@ -91,6 +91,9 @@ enum { #define UFS_HISI_LIMIT_HS_RATE PA_HS_MODE_B #define UFS_HISI_LIMIT_DESIRED_MODE FAST +#define UFS_HISI_CAP_RESERVED BIT(0) +#define UFS_HISI_CAP_PHY10nm BIT(1) + struct ufs_hisi_host { struct ufs_hba *hba; void __iomem *ufs_sys_ctrl; @@ -112,4 +115,5 @@ struct ufs_hisi_host { ufs_sys_ctrl_writel((host), \ ((~(mask)) & (ufs_sys_ctrl_readl((host), (reg)))), \ (reg)) + #endif /* UFS_HISI_H_ */