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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id z1-20020a0565120c0100b00447a7c10e4dsm827132lfu.31.2022.03.18.05.11.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Mar 2022 05:11:27 -0700 (PDT) From: Krzysztof Kozlowski To: arm@kernel.org, soc@kernel.org, Arnd Bergmann , Olof Johansson , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Dinh Nguyen , Rob Herring , Krzysztof Kozlowski Subject: [PATCH] arm64: dts: n5x: drop invalid property and fix edac node name Date: Fri, 18 Mar 2022 13:10:44 +0100 Message-Id: <20220318121044.108750-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The intel,sysmgr-syscon in EDAC/memory controller node is not a recognized and documented property, so drop it to fix error: sdr_edac@f87f8000: 'intel,sysmgr-syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Align also the node name with Devicetree specification (generic, not specific, and EDAC is purely Linux term). Fixes: ef82c9be844f ("arm64: dts: n5x: add sdr edac support") Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts index 50b29fa7ee01..62c66e52b656 100644 --- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts @@ -26,11 +26,10 @@ memory { }; soc { - sdram_edac: sdr_edac@f87f8000 { + sdram_edac: memory-controller@f87f8000 { compatible = "snps,ddrc-3.80a"; reg = <0xf87f8000 0x400>; interrupts = <0 175 4>; - intel,sysmgr-syscon = <&sysmgr 0xb8>; status = "okay"; }; };