From patchwork Wed Mar 16 13:10:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 552834 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88B57C43217 for ; Wed, 16 Mar 2022 13:11:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355992AbiCPNMj (ORCPT ); Wed, 16 Mar 2022 09:12:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356123AbiCPNMg (ORCPT ); Wed, 16 Mar 2022 09:12:36 -0400 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5024C62A36; Wed, 16 Mar 2022 06:11:09 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.90,186,1643641200"; d="scan'208";a="114619598" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 16 Mar 2022 22:11:09 +0900 Received: from localhost.localdomain (unknown [10.226.92.179]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 8BBC2429C369; Wed, 16 Mar 2022 22:11:06 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter , Rob Herring Cc: Biju Das , Laurent Pinchart , Kieran Bingham , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Chris Paterson , Biju Das , Prabhakar Mahadev Lad Subject: [PATCH v2 1/7] dt-bindings: display: renesas, du: Document r9a07g044l bindings Date: Wed, 16 Mar 2022 13:10:54 +0000 Message-Id: <20220316131100.30685-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220316131100.30685-1-biju.das.jz@bp.renesas.com> References: <20220316131100.30685-1-biju.das.jz@bp.renesas.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Extend the Renesas DU display bindings to support the r9a07g044l DU module found on RZ/G2L LCDC. Signed-off-by: Biju Das --- v1->v2: * Updated commit description. * Removed LCDC references * Changed clock name from du.0->aclk * Changed reset name from du.0->du RFC->v1: * Changed minItems->maxItems for renesas,vsps. RFC: https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-18-biju.das.jz@bp.renesas.com/ --- .../bindings/display/renesas,du.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/Documentation/devicetree/bindings/display/renesas,du.yaml b/Documentation/devicetree/bindings/display/renesas,du.yaml index 13efea574584..f560608bf4e8 100644 --- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -40,6 +40,7 @@ properties: - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU - renesas,du-r8a779a0 # for R-Car V3U compatible DU + - renesas,du-r9a07g044l # for RZ/G2L compatible DU reg: maxItems: 1 @@ -824,6 +825,59 @@ allOf: - reset-names - renesas,vsps + - if: + properties: + compatible: + contains: + enum: + - renesas,du-r9a07g044l + then: + properties: + clocks: + items: + - description: Main clock + - description: Register access clock + - description: Video clock + + clock-names: + items: + - const: aclk + - const: pclk + - const: vclk + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + reset-names: + items: + - const: du + + ports: + properties: + port@0: + description: DPAD 0 + port@1: + description: DSI 0 + port@2: false + port@3: false + + required: + - port@0 + - port@1 + + renesas,vsps: + maxItems: 1 + + required: + - clock-names + - interrupts + - resets + - reset-names + - renesas,vsps + additionalProperties: false examples: